JPS6338575Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention mainly relates to improvement of distortion in the output stage of a power amplifier circuit.

Generally, a power amplifier consists of a voltage amplification stage, a large amplitude voltage excitation stage, and a power amplification stage (output stage), but most of the distortion in the power amplifier is generated from the power amplification stage (output stage). . The power amplification stage usually uses an emitter follower (source follower) push-pull circuit, and the emitter follower (source follower) circuit itself is a 100% negative feedback circuit, so distortion is inherently low, but the load impedance is very high compared to a general voltage amplification stage. Because it is low, considerable distortion occurs. Since the power amplification stage itself is a 100% negative feedback circuit, no further improvement can be expected from negative feedback in the power amplification stage alone, so it is necessary to connect a large number of output transistors in parallel, or to provide a large amount of negative feedback from the output end to the first stage. Unless it is applied, distortion cannot be improved. However, as is well known, such a large amount of negative feedback to the first stage deteriorates the transient characteristics of the circuit, causing transient distortion and oscillation instability.

The present invention was created in consideration of the above-mentioned drawbacks, and aims to provide a low distortion power amplifier by reducing distortion in the output stage including the driver, which generates the most distortion among amplifiers. be.

FIG. 1 shows an embodiment of the present invention. Input terminal 1 is a first power amplifier circuit including a driver,
That is, it is commonly connected to the input terminal of the output stage 2 and the non-inverting input terminal of the OP amplifier 4 which operates as a differential amplifier, and is also connected to the input terminal of the second power amplifier circuit, that is, the output stage 3 via the adder 11. . The output terminals of the output stage 2 and the output stage 3 are commonly connected to an output terminal 10 through a first impedance 7 and a second impedance 8, respectively, and are connected in common to an output terminal 10 through a resistor 5 and a resistor 6. Connect to input terminal. The output terminal of the OP amplifier 4 is connected to an adder 11, and the output terminal 10 is grounded via a load resistor 9.

The operation in the above configuration will be explained. When the input signal e ₁ is applied to the input terminal 1 and the amplification degree including the nonlinear component of the first output stage 2 is A ₂ , the output signal e ₂ of the first output stage 2 is as follows: e ₂ =A ₂・e ₁ ...(1) Let A 3 be the amplification factor of the second output stage 3 including non-linear components, and A ⁴ be the amplification factor of the OP amplifier 4, and A ⁴ should have ^a sufficiently large amplification factor. Assuming that ⁴ ≒∞, the output signal of the OP amplifier 4
After e ₄ is amplified by the second output stage 3, negative feedback is provided to the inverting input terminal of the OP amplifier 4 via the resistor 6, so that the signal e 4 is
The level of the inverting input terminal of the OP amplifier 4, that is, the common connection point of the resistors 5 and 6 becomes equal to the level of the input signal _e1 . Therefore, the current i ₁ flowing through the resistor 5 and the resistor 6 increases the resistance value of the resistor 5 and the resistor 6, respectively, by R ₅
and R ₆ , i ₁ = e ₂ - e ₁ / R ₅ = A ₂ - 1 / R ₅ e ₁ ...(2) Therefore, the output signal e ₃ of the second output stage 3 is e ₃ = e ₁ −i ₁・R ₆ = (1 − A ₂ − 1 / R ₅・R ₆ ) e ₁ = (R ₅ + R ₆ / R ₅ − R ₆ / R ₅・A ₂ ) e ₁ ……(3 ) Here, if the impedances of the first impedance 7 and the second impedance 8 are Z ₇ and Z ₈ respectively, and the currents flowing through them are i ₂ and i ₃ , then the output signal e ₅ supplied to the load resistor 9 is, e ₅ = (i ₂ + i ₃ )・R ₉ ...(4) (However, the resistance value of the load resistor 9 is R ₉ ) and i ₂
And i ₃ is i ₂ = e ₂ − _{e 5} / Z ₇ ...(5) i ₃ = e ₃ − e ₅ / Z ₈ ... (6) From the above formula, the output signal e ₅ is e ₅ = 1/ R ₉ +1/Z ₇ +1/Z ₈ (A ₂ /Z ₇ −R ₆ /R ₅ A ₂ /Z ₈ )e ₁ +R ₅ +R ₆ /R ₅ Z ₈ e ₁ ...
(7) Therefore, if the term in the box on the right side of equation (7) is set to zero, the output signal e ₅ will be distorted regardless of the amplification degree A ₂ that includes the nonlinear component of the first output stage 2. It is possible to obtain output without Therefore, in order to make the term in the box on the right side of equation (7) zero, R ⁶ /R ⁵ =Z ⁸ /Z ⁷ ...(8) In this way, the resistance values of resistors 5 and 6 and the impedance 7 If the impedance values of and 8 are set to satisfy the condition of equation (8), the output signal will be distortion-free,
In this case, e ₅ is e ₅ = R ⁹ / (Z ⁷ Z ⁸ ) + R ⁹ · e ₁ ...(9) In this way, by the amplification A ³ including the nonlinear component of the second output group 3, Since the generated distortion is negatively fed back to the OP amplifier 4 via the resistor 6, the distortion generated at the output terminal of the amplifier ³ due to the nonlinear component of the amplification degree A3 is reduced to an extremely small value that can be ignored. . Next, the distortion caused by the amplification A ² including the non-linear component of the first output stage 2 is also applied to the amplifier 3 via the negative feedback circuit described above, and the output terminal of the amplifier 3 is sent to the output terminal of the amplifier 2. The distortion that appears at the output terminal and the opposite phase distortion appear,
This distortion is applied to the output terminal 10 via the second impedance 8, and is canceled out by the distortion of the amplifier 2, making it possible to obtain a distortion-free output signal determined by equation (9). Also, in this case, only the distortion component is negatively fed back via the OP amplifier 4, and the input signal is
Since it is supplied to the load via the second output stage and the first and second impedances, transient distortion occurs due to delays in the input signal components in the negative feedback signal, as in conventional negative feedback circuits. Never.

Note that the output power capacities of each of the first output stage 2 and the second output stage 3 can be arbitrarily determined.
That is, as long as the condition of the above equation (8) is satisfied, the second output stage 3 supplies almost the same output power as the first output stage 2 to the load resistor 9, and the output power of the first output stage 2 is increased. Distortion can be removed, and in the same way R ⁵ < R ⁶ , Z ⁷
<Z ⁸ , the second output stage 3 supplies less power to the load resistor 9 than the first output stage 2, while
Since the distortion of the first output stage 2 can be removed, the same distortion removal effect can be obtained even if a small output transistor with low power loss is used as the output transistor used in the second output stage 3.

Figure 2 shows the OP amplifier 4 and adder 1 in Figure 1.
This is another embodiment of the present invention specifically showing part 1 of the present invention. In the figure, the OP amplifier 4 is a floating positive power supply 11-1 that follows the input signal and operates in a floating manner.
Since it is driven by the floating negative power supply 11-2, the addition of the differential input signal of the OP amplifier 4 and the input signal e1 applied to the input terminal ₁ can be performed with a simple configuration. The basic operation in FIG. 2 is the same as that in FIG. 1, so the explanation thereof will be omitted.

As described above, according to the present invention, since distortion components are mainly negatively fed back in the parallel amplifier, an excellent effect can be obtained in that there is less deterioration in performance due to deterioration of transient characteristics as in conventional negative feedback circuits.

[Brief explanation of drawings]

1 and 2 are circuit diagrams each showing an embodiment of the present invention. In the figure, 2 and 3 are the first and second output stages, and 4 is the
OP amplifier, 5 and 6 are resistors, 7 and 8 are first and second impedances, and 11 is an adder.

Claims (1)

[Scope of utility model registration request] In a parallel amplifier configured by adding the outputs of the first and second amplifiers to which input signals are applied via first and second impedances, the first and second
A series circuit of first and second resistors is connected between the output terminals of the amplifier, and a difference signal between the signal at the connection point of the first and second resistors and the input signal is amplified,
An amplifier characterized in that it is added to an input signal of the second amplifier.