JPH05191157A - Balanced input type audio amplifying circuit - Google Patents

Abstract

PURPOSE:To obtain a low noise level and a high in-phase signal elimination ratio and to simplify the constitution. CONSTITUTION:Signals having opposite phases are supplied to input terminals 11 and 12 and are amplified by amplifiers A11 and A12 respectively, but components having the same phase and the same level are cancelled at the middle point of a resistance R5. Outputs of amplifiers A11 and A12 are inputted to an amplifier A13 and are subjected to subtraction processing, namely, amplification of difference components.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a balanced input type amplifier circuit for processing a voice signal.

[0002]

2. Description of the Related Art FIGS. 5A and 5B show a conventional balanced input type amplifier circuit. FIG. 3A is used as a microphone input amplifier for business use, and hot input H and cold input C are supplied to one and the other input terminals of the primary side coil of transformer T1. Transformer T
One and the other output terminals of the secondary coil of 1 are connected to the input terminals of operational amplifiers A1 and A2, respectively, and the output terminals of these operational amplifiers A1 and A2 are
It is connected to one and the other input terminals of the secondary coil.
The output is the output terminal O of the secondary coil of the output transformer T2.
It is derived from the UT.

Since a transformer is used in the balanced input section of this balanced input type amplifier circuit, there is a problem that it becomes a large-scale circuit and is not suitable for high-density mounting. Moreover, since the transformer is used, there is a fear of weakness against external noise due to the electromagnetic induction.

FIG. 1B shows the differential amplifier A3 and the differential amplifier A3 used as a direct input circuit. The hot input H and the cold input C are respectively connected to the positive of the differential amplifier A3 via a resistor,
It is supplied to the negative input terminal. A bias is applied to the positive input terminal and an output terminal is formed at the negative input terminal, and a feedback loop from OUT is even formed. This balanced input type amplifier circuit has a simplified configuration, but the input impedance on the cold input side is defined by the resistor R1, and if this is made high impedance, the signal source resistance is increased. Similarly, the noise level deteriorates. In addition, the above-mentioned circuits both have a common-mode rejection ratio of 60 dB.
It is a degree.

[0005]

According to the above-mentioned conventional balanced input type amplifier circuit, there is one using a transformer on the input side, and this type is not suitable for downsizing, and it is easy to pick up noise due to electromagnetic induction. There is. Also, there are some that use a differential amplifier as a direct input circuit, but with this type, sufficient input impedance cannot be obtained,
There is a problem that the noise level deteriorates when used for high impedance. Further, both of the above types also have a problem of low performance in the common mode rejection ratio.

Therefore, an object of the present invention is to provide a balanced input type amplifier circuit which can obtain a low noise level and a high common mode signal rejection ratio and can be realized with a simple structure.

[0007]

According to the present invention, there is provided a first operational amplifier in which a first input signal is supplied to a positive input terminal,
A second operational amplifier in which a second input signal having a phase opposite to that of the first signal is supplied to a positive input terminal, and in-phase and same-level components included in the first and second input signals are removed. For this purpose, the difference between the outputs of the first and second operational amplifiers and the unnecessary component removal circuit in which the negative electrode input terminals of the first and second operational amplifiers are connected and the negative electrode input terminals and the output terminals are connected A third operational amplifier for amplifying the component.

[0008]

According to the above means, the input impedance can be set independently of the signal source resistance and the noise level can be improved by configuring both the hot and cold inputs by the positive-phase input type operational amplifier. Further, by connecting the feedback sides of the two operational amplifiers in the input stage, a common-mode signal removal effect can be obtained, and the configuration is simple.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. The input terminal 11 is a hot (H) input terminal, is grounded through the resistor R1, and is connected to the positive input terminal of the positive-phase input operational amplifier A11, and the input terminal 12 is cold (C).
The input terminal is grounded through the resistor R2 and is connected to the positive input terminal of the operational amplifier A12. Resistors R3 and R4 are connected between the output terminals and the negative input terminals of the operational amplifiers A11 and A12, respectively. Operational amplifier A1
A resistor R5 is connected between the negative input terminals of 1 and A12. The output terminal of the operational amplifier A12 is connected to the negative input terminal of the operational amplifier A13 via the resistor R6, and the output terminal of the operational amplifier A11 is connected to the operational amplifier A1 via the resistor R7.
3 is connected to the positive input terminal. This operational amplifier A1
The resistor R8 is also connected between the output terminal of No. 3 and the negative input terminal 13, and the positive input terminal is grounded via the resistor R9. In this circuit, the resistance value of each resistor is R3 = R4, R6 = R
9, R7 = R8.

According to this circuit, both the H input and the C input are positive phase inputs. Therefore, the input impedance can be freely defined by the resistors R1 and R2. Further, since inputs of opposite phases are supplied to the H input and the C input, signals at the same level appear at the other ends of the amplifiers via the feedback circuit. Since these signals have mutually opposite phases, they cancel each other out at the middle point of the resistor R5, and the middle point of R5 becomes a virtual ground point. Therefore, the amplification factor of the first stage is (2 · R2 + R5) / R5. When a signal of the same phase is input, no current flows through R5 and the amplification factor is 0.
Becomes That is, it functions as an amplification factor of 0 for unnecessary in-phase components.

The respective signals inputted from the H input terminal and the C input terminal are respectively amplified and subjected to subtraction processing in the operational amplifier A13. To increase the common-mode rejection ratio,
It is advantageous to increase the amplification factor of the first stage. In the above embodiment, when the amplification factor of the former stage was set to 40 dB and the latter stage was set to 0 dB, a noise level of -85 dB _J (JISA) and a common mode signal rejection ratio of 90 dB (at 1 KHz) could be obtained. As described above, according to this embodiment, a circuit scale suitable for high-density mounting can be obtained, and a low noise level and a high common-mode signal rejection ratio can be obtained. The present invention is not limited to the above embodiments.

According to the circuit of the above embodiment, the DC component can be amplified, which is useful when used for measurement. Then, as shown in FIG. 2A, the output reference potential can be adjusted by providing the output offset voltage adjusting means 21.

However, when the above circuit is used as a microphone amplifier or as a general low frequency signal amplifier, a capacitor C1 for cutting off unnecessary low frequency components is used as shown in FIG. 2B. It may be provided in series with the resistor R5. In this way, the means 2 for offset adjustment
However, since the capacitor C1 is provided, the noise induced in the capacitor C1 is also amplified, and the noise level deteriorates. Therefore, in the second embodiment, a circuit is realized in which the DC offset means can be eliminated and adjustment is not required, and an increase in noise level can be reduced.

FIG. 3A shows another embodiment of the present invention, and the same parts as those in FIG. 1 are designated by the same reference numerals. In the case of this embodiment, a series circuit having a capacitor C1 between the resistors R5a and R5b is connected between the negative input terminals of the operational amplifiers A11 and A12. According to this circuit,
5a = R5b, and the capacitor C1 portion becomes a virtual ground point. The amplification rate of the first stage is (R3 + R5a) / R
It becomes 5. Also, hot (H) input terminal, cold (C)
The signal input from the input terminal is the operational amplifier A11 and A
Each output is amplified by 12 and each output is subtracted by the operational amplifier A13. When signals of the same phase and the same level are input to the H input terminal and the C input terminal, the amplification factor becomes 0.
The noise induced by the capacitor C1 is the operational amplifier A1.
At 3, the same phase and the same input level are reached, and they are removed by the subtraction processing.

With the above arrangement, unnecessary DC components can be removed, that is, band limitation on DC can be obtained, offset adjustment is not necessary, and effective balance for low frequency components such as audio signals. It can be an input type amplifier circuit.

FIG. 3B shows an example in which the first-stage amplifier section is composed of a transistor differential amplifier circuit. The cold (C) input terminal is grounded via the resistor R11 and connected to the base of the transistor Q2, and the hot (H) input terminal is grounded via the resistor R12 and connected to the base of the transistor Q1. To be done. Transistor Q
The collectors of 1 and Q2 have resistors R13 and R14, respectively.
Is connected to the positive power supply line via. Transistor Q1
Between the collector of Q2 and the collector of Q2, resistor R15 and capacitor C1
1 connected in series. A series circuit including a resistor R17, a capacitor C12, and a resistor R16 is connected between the emitters of the transistors Q1 and Q2.
A resistor R18 is connected in parallel with this series circuit. Further, the emitters of the transistors Q1 and Q2 are connected to the collectors of the transistors Q3 and Q4, respectively. The emitters of the transistors Q3 and Q4 are connected to the negative power supply line via resistors R19 and R20, respectively.
A resistor R21 is connected between the emitters of the two. Further, the bases of the transistors Q3 and Q4 are connected to the negative power supply line via resistors R23 and R24, respectively.
The base of the transistor Q3 is grounded via the resistor R25, and the base of the transistor Q4 is connected to the output terminal of the operational amplifier A21 via the resistor R24. The negative input terminal of the operational amplifier A21 is connected to the collector of the transistor Q1, and the positive input terminal is connected to the collector of the transistor Q2.

The positive power supply terminal and the negative power supply terminal of the operational amplifier A21 are connected to the positive power supply line and the negative power supply line, respectively. In the above circuit, R17 = R16, R1
6 >> R18 is set. The gain is G = (R16 + R
17) / R21. Coupling capacitor C12
Is inserted between the resistors R17 and R16, the capacitor C12 becomes a virtual ground point. As a result, it is possible to obtain the characteristic of blocking the low frequency component without deteriorating the noise level. The balanced input type amplifier circuit described above
It is designed so that the distortion rate does not deteriorate even at high output.

That is, the bases of the transistors Q3 and Q4 are directly connected to the negative power supply line via the resistors R23 and R24, respectively. That is, it means that the base potential of the transistor Q3 is always stable and the same. Further, only the feedback voltage on the output side is applied to the base of the transistor Q4, so that the gain variation and the distortion rate deterioration do not occur even at the time of a large output. If the base potential difference between the transistors Q3 and Q4 changes independently of the feedback voltage, the distortion rate deteriorates. The base voltage of the transistors Q3 and Q4 is determined by the resistors R24 and R2 that determine the feedback ratio.

FIG. 4 shows an embodiment in which the above embodiment is slightly modified. According to this embodiment, the resistors R22 and R23 are
Has one end connected to the bases of the transistors Q3 and Q4, and the other end connected to the emitter of the transistor Q5. The collector of the transistor Q5 is connected to the negative power supply line. The base is connected to the negative power supply line via the Zener diode D1 and is connected to the positive power supply line via the resistor R30. The other parts are the same as those in the previous embodiment and are therefore given the same reference numerals. Also in this embodiment, the base potentials of the transistors Q3 and Q4 can be arbitrarily set as in the previous embodiment. However, since the current flowing through the Zener diode D1 is constant even if the output fluctuates, gain fluctuation and distortion rate deterioration do not occur. In this embodiment, in order to suppress the gain fluctuation at the time of a large output by the negative feedback effect, a feedback voltage obtained by feeding back the output of the operational amplifier at the output stage to one of the bias circuits that sets the gains of the two operational amplifiers. The bias circuit is a constant current circuit in order to provide

[0021]

As described above, according to the present invention,
The balanced input type amplifier circuit can obtain a low noise level and a high common-mode signal rejection ratio, and can be realized with a simple configuration.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram which is a premise of another embodiment of the present invention.

FIG. 3 is a circuit diagram showing another embodiment of the present invention.

FIG. 4 is a circuit diagram showing still another embodiment of the present invention.

FIG. 5 is a circuit diagram showing a conventional balanced input type amplifier circuit.

[Explanation of symbols]

 A11 to A13 ... Operational amplifier, R1 to R9 ... Resistors.

Claims (3)

[Claims] 1. A first operational amplifier having a first input signal supplied to a positive input terminal, and a second operational signal having a phase opposite to that of the first signal supplied to a positive input terminal. And the negative input terminals of the first and second operational amplifiers for removing the in-phase and same-level components included in the first and second input signals, and the negative input terminals A balanced input type amplifier circuit comprising: an unnecessary component removing circuit having output terminals connected to each other; and a third operational amplifier for amplifying a difference component of the outputs of the first and second operational amplifiers. 2. The unnecessary component removing circuit includes a series circuit in which resistors symmetrical in series with respect to a capacitor are connected in series between the negative input terminals of the first and second operational amplifiers. 1. The balanced input type amplifier circuit according to 1. 3. The output of the third operational amplifier is negatively fed back to a bias circuit that sets the gains of the first and second operational amplifiers in order to suppress the gain fluctuation at the time of high output by a negative feedback action. Therefore, the bias circuit is configured as a voltage load circuit, and the negative feedback voltage is supplied to the load circuit.