JPS633466B2 - - Google Patents

Info

Publication number
JPS633466B2
JPS633466B2 JP15012386A JP15012386A JPS633466B2 JP S633466 B2 JPS633466 B2 JP S633466B2 JP 15012386 A JP15012386 A JP 15012386A JP 15012386 A JP15012386 A JP 15012386A JP S633466 B2 JPS633466 B2 JP S633466B2
Authority
JP
Japan
Prior art keywords
gate
region
conductivity type
cathode
fixed potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15012386A
Other languages
Japanese (ja)
Other versions
JPS62174972A (en
Inventor
Junichi Nishizawa
Tadahiro Oomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP15012386A priority Critical patent/JPS62174972A/en
Publication of JPS62174972A publication Critical patent/JPS62174972A/en
Publication of JPS633466B2 publication Critical patent/JPS633466B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7391Gated diode structures
    • H01L29/7392Gated diode structures with PN junction gate, e.g. field controlled thyristors (FCTh), static induction thyristors (SITh)

Description

【発明の詳細な説明】 本発明は、大電流領域で高速度のスイツチング
を行なう両面ゲート型静電誘導サイリスタに関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a double-sided gate type electrostatic induction thyristor that performs high-speed switching in a large current region.

ソース前面に現れる電位障壁をゲート電圧及び
ドレイン電圧により制御して、ソースからのキヤ
リア注入量を制御し、不飽和型電流電圧特性を示
す静電誘導トランジスタ(以下SITと称す。)は、
大電流が流せて変換コンダクタンスが大きく、し
かも耐圧を大きくすることが容易であり、ゲート
の静電容量も小さくできて、大電力高周波動作が
行なえる。接合型SITには、二つの動作モードが
存在する。ゲートをソースと同電位に保つたとき
に、導通状態にあり、主動作状態でゲートに逆方
向バイアスを加えて動作させるモード(ノーマリ
オン型)と、ゲートをソースと同電位に保つたと
きに、遮断状態にあり、ゲートに順方向バイアス
を加えて導通状態にするモード(ノーマリオフ
型)とである。ゲートを順方向バイアスして動作
させる場合には、必然的にゲートからチヤンネル
に少数キヤリアが注入される。勿論、適度のチヤ
ンネルへの少数キヤリアの注入は、ソースからの
多数キヤリアの注入効率を高めて、変換コンダク
タンス、電流利得を大きくして有効に動くが、過
度に少数キヤリアが注入されると、チヤンネル中
での過剰少数キヤリアの蓄積効果が顕著になつ
て、動作速度の低下をもたらす事になる。
A static induction transistor (hereinafter referred to as SIT), which controls the amount of carrier injection from the source by controlling the potential barrier appearing in front of the source using the gate voltage and drain voltage, exhibits unsaturated current-voltage characteristics.
It allows a large current to flow, has a large conversion conductance, and can easily increase the withstand voltage.The gate capacitance can also be reduced, allowing high-power, high-frequency operation. There are two operating modes in junction-type SIT. When the gate is kept at the same potential as the source, it is in a conductive state, and in the main operating state, the gate is operated by applying a reverse bias (normally-on type), and when the gate is kept at the same potential as the source, it is in a conductive state. , the gate is in a cut-off state, and a forward bias is applied to the gate to make it conductive (normally-off type). When the gate is operated with a forward bias, minority carriers are inevitably injected from the gate into the channel. Of course, injection of a moderate amount of minority carriers into the channel increases the injection efficiency of majority carriers from the source, increasing the conversion conductance and current gain, and is effective, but if too many minority carriers are injected, the channel The accumulation effect of excess minority carriers inside becomes noticeable, resulting in a decrease in operating speed.

本願発明者が提案した分割ゲート型SIT(特許
第1302727号(特公昭60−20910号)「静電誘導ト
ランジスタ及び半導体集積回路」、特許第1236163
号(特公昭59−12017号)「半導体集積回路」、特
許第1247054号(特公昭59−21176号)「静電誘導
トランジスタ半導体集積回路」、特許第1231827号
(特公昭59−8068号)「半導体集積回路」に詳述)
は、上述した過剰少数キヤリアの蓄積効果を無く
して、しかも変換コンダクタンスを殆んど小さく
することになく、ゲートの静電容量を小さくして
おり、高速度動作にきわめて適している。分割ゲ
ート構造は、静電誘導サイリスタにももちろん有
効である。
Split gate SIT proposed by the inventor of the present application (Patent No. 1302727 (Special Publication No. 60-20910) "Static Induction Transistor and Semiconductor Integrated Circuit", Patent No. 1236163
(Special Publication No. 59-12017) "Semiconductor integrated circuit", Patent No. 1247054 (Special Publication No. 59-21176) "Static induction transistor semiconductor integrated circuit", Patent No. 1231827 (Special Publication No. 59-8068) " (Details in “Semiconductor Integrated Circuits”)
This eliminates the accumulation effect of excess minority carriers mentioned above, reduces the gate capacitance without reducing the conversion conductance, and is extremely suitable for high-speed operation. Of course, the split gate structure is also effective for electrostatic induction thyristors.

本発明の目的は、分割ゲート構造を導入した大
電流の高速スイツチングを行なうことのできる両
面ゲート型静電誘導サイリスタを提供することに
ある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a double-sided gate type electrostatic induction thyristor that incorporates a split gate structure and is capable of high-speed switching of large currents.

以下図面を参照して本発明を詳細に説明する。 The present invention will be described in detail below with reference to the drawings.

第1図は本発明の両面ゲート型静電誘導サイリ
スタの一実施例の断面図である。
FIG. 1 is a sectional view of an embodiment of a double-sided gate type electrostatic induction thyristor of the present invention.

n+領域1はカソード、p+領域2,3はそれぞ
れカソード側の電子注入を制御する駆動ゲート、
固定電位領域、n-領域4及びp-領域14はそれ
ぞれカソード側及びゲート側のチヤンネル領域、
p+領域11はアノード、n+領域12,13はそ
れぞれアノード側のホール注入を制御する駆動ゲ
ート及び固定電位ゲート、1′,2′,11′,1
2′は、それぞれAl、Mo等の金属もしくは低抵
抗ポリシリコンからなるカソード、カソード側の
駆動ゲート、アノード及びアノード側の駆動ゲー
トの電極である。領域6は、SiO2、Si3N4
Al2O3等の絶縁層もしくは、これらを複数個組み
合せた複合絶縁層である。各領域の不純物密度
は、それぞれ1,11が1018乃至1021cm-3程度、
2,3,12,13は1016乃至1021cm-3程度、4,
14は1011乃至1016cm-3程度とすれば良い。駆動
ゲートと固定電位ゲートにはさまれるチヤンネル
の幅は、固定電位ゲートに与える電圧によつて異
なるが、駆動ゲートの電位がカソード及びアノー
ドと同電位のとき、チヤンネルが両方のゲートか
ら延びる空乏層によつて完全におおわれて、ある
程度の電位障壁ができて、遮断状態にあるように
選ばれる。チヤンネルの不純物密度、ゲートの不
純物密度によつて異なるわけで、チヤンネルの不
純物密度が高いほど、チヤンネル幅は通常狭くし
なければならない。カソード、アノード間隔は、
ソース、ドレイン間の電子の走行時間が、動作の
周波数特性を劣化させない程度の長さにすればよ
い。たとえば、1nsecのスイツチング速度を得る
のであれば20μm程度以下にすればよい。固定電
位ゲート3及び13はカソード1あるいはアノー
ド11と直結でも、また所定の逆方向バイアス
(この場合には、負電圧)でもかまわない。また、
駆動ゲート2及び12の動作電圧もOと順方向バ
イアス(この場合には、正電圧)だけに限るわけ
ではなく、逆方向ゲートバイアスにしておいて、
Oバイアスに戻してもよいわけである。しかし、
通常は駆動ゲートバイアス零で遮断、所定の順方
向バイアスを加えて初めて導通になるようにする
方が使い易いことが多い。例えば駆動ゲートに所
定の順方向バイアスを加えると、カソードから大
量に電子及びアノードから正孔が注入される。動
作は、電極1′に対して電極11′を正電圧にし
て、電極2′に順方向電圧(1′に対してわずかな
正電圧)を印加すると同時に、電極12′に順方
向電圧(11′に対してわずかに負電圧)を印加
すると両方から電子とホールが同時に注入される
ようになつて、1′と11′間の電圧は低下しわず
かな保持電圧になる。このとき、ホール及び電子
は殆んどそれぞれの固定電位ゲート3,13′に
流れて駆動ゲートには流れない。遮断時には両方
の駆動ゲートに加わるバイアスを元に戻せばよ
い。ゲートがひとつしかない片面ゲート型の静電
誘導サイリスタにくらべ、本発明の両面ゲート型
静電誘導サイリスタはターンオン及びターンオフ
の時間が著しく短くなり、また保持電圧も小さく
なる。
N + region 1 is a cathode, p + regions 2 and 3 are drive gates that control electron injection on the cathode side, respectively.
The fixed potential regions, n - region 4 and p - region 14 are channel regions on the cathode side and gate side, respectively;
The p + region 11 is an anode, and the n + regions 12 and 13 are drive gates and fixed potential gates that control hole injection on the anode side, respectively, 1', 2', 11', 1
Reference numerals 2' denote a cathode, a drive gate on the cathode side, an anode, and an electrode of the drive gate on the anode side, each made of a metal such as Al or Mo or low-resistance polysilicon. Region 6 contains SiO 2 , Si 3 N 4 ,
It is an insulating layer such as Al 2 O 3 or a composite insulating layer that combines multiple of these. The impurity density in each region is approximately 10 18 to 10 21 cm -3 for 1 and 11, respectively.
2, 3, 12, 13 are about 10 16 to 10 21 cm -3 , 4,
14 may be approximately 10 11 to 10 16 cm −3 . The width of the channel sandwiched between the drive gate and the fixed potential gate varies depending on the voltage applied to the fixed potential gate, but when the potential of the drive gate is the same as that of the cathode and anode, the width of the channel is a depletion layer extending from both gates. It is chosen so that it is completely covered by , creating some potential barrier and being in a blocking state. This varies depending on the impurity density of the channel and the impurity density of the gate, and the higher the impurity density of the channel, the narrower the channel width usually has to be. The spacing between cathode and anode is
The transit time of electrons between the source and the drain may be set to a length that does not deteriorate the frequency characteristics of the operation. For example, if a switching speed of 1 nsec is to be obtained, the thickness should be about 20 μm or less. The fixed potential gates 3 and 13 may be directly connected to the cathode 1 or the anode 11, or may be biased in a predetermined reverse direction (in this case, a negative voltage). Also,
The operating voltages of the drive gates 2 and 12 are not limited to O and forward bias (positive voltage in this case), but are also set to reverse gate bias.
Therefore, it is possible to return to the O bias. but,
Normally, it is often easier to use a circuit that is cut off when the drive gate bias is zero and becomes conductive only when a predetermined forward bias is applied. For example, when a predetermined forward bias is applied to the drive gate, a large amount of electrons is injected from the cathode and holes are injected from the anode. The operation is performed by applying a positive voltage to electrode 11' with respect to electrode 1', applying a forward voltage (a slight positive voltage with respect to electrode 1') to electrode 2', and simultaneously applying a forward voltage (11' to electrode 12'). When a slightly negative voltage is applied to 1' and 11', electrons and holes are simultaneously injected from both sides, and the voltage between 1' and 11' decreases to a small holding voltage. At this time, most of the holes and electrons flow to the respective fixed potential gates 3 and 13' and do not flow to the drive gate. When shutting off, the bias applied to both drive gates can be returned to its original state. Compared to a single-sided gate type electrostatic induction thyristor having only one gate, the double-sided gate type electrostatic induction thyristor of the present invention has significantly shorter turn-on and turn-off times and a lower holding voltage.

次に第1図に示した両面ゲート型静電誘導サイ
リスタの平面的な構成について述べる。第1図の
説明から明らかなように、それぞれのゲートはカ
ソード、アノードに対して相補的な動作をするの
で以下の説明は、カソードとカソード側のゲート
領域について行なうがアノードとアノード側のゲ
ート領域についても全く同様である。第2図はゲ
ートが駆動ゲートと固定電位ゲートに分割された
分割ゲートを有する両面ゲート型静電誘導サイリ
スタの構造例である。第2図a,bはそれぞれ平
面図であり、第2図cは第2図aのA−A′線に
沿う断面図であり、第2図dは第2図bのB−
B′線に沿う断面図である。第2図a乃至dでは
簡単のために電極配線及びアノード側の構造は示
されていない。n+領域1はカソード、p+領域2,
3はそれぞれ駆動ゲート、固定電位ゲート、n-
領域4及びp-領域14はそれぞれチヤンネル、
1′,2′はそれぞれカソード電極及び駆動ゲート
電極である。第2図aは、固定電位ゲートがカソ
ードや駆動ゲートを完全に囲んだ構造になつてい
る。第2図bでは、駆動ゲート電極2′と固定電
位ゲート間の静電容量を減らすように固定電位ゲ
ートの一部に切れ目のある構造になつている。第
2図dで示されるように、カソード電極1′は固
定電位ゲート3と直接接触しており、固定電位ゲ
ートがカソードと同電位に保たれる場合を示して
いる。もちろん、固定電位ゲートをカソードと同
電位にせず、所定の一定バイアスを与えるように
することもできる。駆動ゲートの静電容量をさら
に小さくしてしかも電流利得を大きくした、本発
明の両面ゲート型の静電誘導サイリスタの別の実
施例を第3図に示す。
Next, the planar configuration of the double-sided gate type electrostatic induction thyristor shown in FIG. 1 will be described. As is clear from the explanation of Fig. 1, each gate operates complementary to the cathode and anode, so the following explanation will be made regarding the cathode and the gate region on the cathode side, but the anode and the gate region on the anode side will be explained below. The same is true for FIG. 2 shows an example of the structure of a double-sided gate type static induction thyristor having a divided gate in which the gate is divided into a drive gate and a fixed potential gate. Figures 2a and b are plan views, Figure 2c is a sectional view taken along line A-A' in Figure 2a, and Figure 2d is a cross-sectional view taken along line A-A' in Figure 2b.
FIG. 3 is a sectional view taken along line B'. In FIGS. 2a to 2d, the electrode wiring and the structure on the anode side are not shown for the sake of simplicity. n + region 1 is cathode, p + region 2,
3 are drive gate, fixed potential gate, n -
Region 4 and p - region 14 are channels, respectively.
1' and 2' are a cathode electrode and a driving gate electrode, respectively. FIG. 2a shows a structure in which a fixed potential gate completely surrounds the cathode and drive gate. In FIG. 2b, the fixed potential gate has a structure in which a part of the fixed potential gate has a cut in order to reduce the capacitance between the drive gate electrode 2' and the fixed potential gate. As shown in FIG. 2d, the cathode electrode 1' is in direct contact with the fixed potential gate 3, illustrating the case where the fixed potential gate is kept at the same potential as the cathode. Of course, it is also possible to apply a predetermined constant bias to the fixed potential gate instead of setting it at the same potential as the cathode. FIG. 3 shows another embodiment of the double-sided gate type electrostatic induction thyristor of the present invention in which the capacitance of the drive gate is further reduced and the current gain is increased.

第3図aは平面図、第3図bはA−A′線に沿
う断面図である。駆動ゲート2は円筒状、ソース
1は円環状、固定電位ゲート3は所要の全面にわ
たつている。第3図のように、円筒、円環状に構
成されたときが、もつとも小さな駆動ゲートでも
つとも広いチヤンネルを制御できることになつ
て、駆動ゲートの静電容量が小さく、電流利得が
大きい。チヤンネルに注入される少数キヤリア
は、ただちに固定電位ゲートから吸い出されるか
ら、少数キヤリアの蓄積効果はほとんどなく、極
めてスイツチング速度は速くなる。カソード電極
1′は絶縁層6を介して固定電位ゲートと対抗す
るが、通常カソードと固定電位ゲートは直結され
るかあるいは一定電圧に保たれるから、両者間の
容量が増加することは動作にまつたく影響しな
い。通常スイツチング動作のときは、カソード接
地の回路で行なわれることも、前述のことを一層
確かにする。動作は第2図の例と殆んど同様であ
る。
FIG. 3a is a plan view, and FIG. 3b is a sectional view taken along line A-A'. The drive gate 2 has a cylindrical shape, the source 1 has an annular shape, and the fixed potential gate 3 extends over the required entire surface. As shown in FIG. 3, when the drive gate is configured in a cylindrical or annular shape, a wide channel can be controlled even with a small drive gate, and the capacitance of the drive gate is small and the current gain is large. Since the minority carriers injected into the channel are immediately sucked out of the fixed potential gate, there is little effect of accumulation of minority carriers and the switching speed is extremely fast. The cathode electrode 1' opposes the fixed potential gate via the insulating layer 6, but since the cathode and the fixed potential gate are usually directly connected or kept at a constant voltage, an increase in the capacitance between them is not a problem. It doesn't affect me at all. The fact that normal switching operations are performed in a cathode-grounded circuit further confirms the above. The operation is almost the same as the example shown in FIG.

第1図で領域1と領域2,3及び領域11と領
域12,13とは分離されて示されているが、も
ちろん直接接触していてもよい。第1図でそれぞ
れ1と11とが対向する例が示されているが、こ
うする必要はかならずしもない。
Although region 1 and regions 2 and 3 and region 11 and regions 12 and 13 are shown separated in FIG. 1, they may of course be in direct contact. Although FIG. 1 shows an example in which 1 and 11 face each other, it is not always necessary to do so.

第1図、第2図、第3図で駆動ゲートと固定電
位ゲートの表面からの深さは、殆んど皆同じ場合
の構造を示したが、異なつていてもよいことはも
ちろんである。固定電位ゲートをより深くすれ
ば、カソード側とアノード側の駆動ゲートに流れ
る電流が減少して、電流利得が更に大きくなる。
第1図、第2図、第3図ではカソード・ゲート及
びアノード・ゲートがいずれも同一平面上にある
表面配線型構造のものについて断面構造を示した
が、さらに駆動ゲートの静電容量を減少させ、電
流利得を大きくするために、矩形状、V字型等の
切り込みを設けその側面に駆動ゲートを設けるこ
ともできる。
In Figures 1, 2, and 3, the depths from the surface of the driving gate and the fixed potential gate are almost the same, but it goes without saying that they may be different. . Making the fixed potential gate deeper reduces the current flowing through the drive gates on the cathode and anode sides, further increasing the current gain.
Figures 1, 2, and 3 show the cross-sectional structure of a surface wiring type structure in which the cathode gate and anode gate are all on the same plane, but the capacitance of the drive gate is further reduced. In order to increase the current gain, a rectangular or V-shaped cut may be provided and a drive gate may be provided on the side surface of the cut.

本発明の構造は、従来公知の結晶成長技術、微
細加工技術、選択拡散技術、選択エツチング技術
(ドライ・ケミカル)、イオン打込み技術等により
製造できる。
The structure of the present invention can be manufactured by conventionally known crystal growth techniques, microfabrication techniques, selective diffusion techniques, selective etching techniques (dry chemical), ion implantation techniques, and the like.

チヤンネルにキヤリアを供給するカソード及び
アノードを駆動ゲートと固定電位ゲートの間に介
在させたユニツトを複数個並列に配置した本発明
の両面ゲート型静電誘導サイリスタは、駆動ゲー
トの静電容量が小さく、チヤンネル中のキヤリア
の著積効果が殆んど存在せず、電流利得が大き
く、大電流の高速度スイツチングが行なえ、その
工業的価値はきわめて高い。
The double-sided gate type electrostatic induction thyristor of the present invention has a plurality of units arranged in parallel, each having a cathode and an anode that supply a carrier to the channel, interposed between the drive gate and the fixed potential gate, and the capacitance of the drive gate is small. , there is almost no significant carrier effect in the channel, the current gain is large, and high-speed switching of large currents can be performed, so its industrial value is extremely high.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の両面ゲート型静電誘導サイリ
スタの断面図、第2図a及びbは本発明の両面ゲ
ート型静電誘導サイリスタの構造例の平面図、第
2図cはa図中A−A′線に沿う断面図、第2図
dはb図中B−B′線に沿う断面図、第3図aは
本発明の両面ゲート型の静電誘導サイリスタ構造
例の平面図、第3図bはa図中A−A′線に沿う
断面図である。
Figure 1 is a sectional view of a double-sided gate type electrostatic induction thyristor of the present invention, Figures 2 a and b are plan views of a structural example of a double-sided gate type static induction thyristor of the present invention, and Figure 2 c is in Figure a. 2d is a sectional view taken along line A-A', FIG. 2d is a sectional view taken along line B-B' in FIG. FIG. 3b is a sectional view taken along line A-A' in FIG. 3a.

Claims (1)

【特許請求の範囲】 1 第1導電型の高抵抗領域の一方の表面上に前
記第1導電型の高抵抗領域と同導電型の高不純物
密度領域よりなる複数個のカソード領域、前記第
1導電型の高抵抗領域とは反対導電型の高不純物
密度領域よりなる第1のゲート領域を具備し、前
記カソード領域の片方のゲート領域を駆動ゲート
領域とし、カソード領域に対して駆動ゲート領域
の反対側のゲート領域を固定電位ゲート領域と
し、前記第1導電型の高抵抗領域の他方の表面に
接した第2導電型の高抵抗領域の表面上に前記第
2導電型の高抵抗領域と同じ導電型の高不純物密
度領域よりなる複数個のアノード領域、前記第2
導電型の高抵抗領域とは反対導電型の高不純物密
度領域よりなる第2のゲート領域を具備し、前記
アノード領域の片方のゲート領域を駆動ゲート領
域とし、アノード領域に対して駆動ゲート領域の
反対側のゲート領域を固定電位ゲート領域とし、
前記第1、第2の駆動ゲート領域それぞれに電極
配線をし、前記第1、第2の固定電位ゲート領域
は外部配線しないことを特徴とする両面ゲート型
静電誘導サイリスタ。 2 前記第1の固定電位ゲート領域をカソード領
域に、前記第2の固定電位ゲート領域をアノード
領域に電極により直結することを特徴とする前記
特許請求の範囲第1項記載の両面ゲート型静電誘
導サイリスタ。
[Scope of Claims] 1. A plurality of cathode regions each comprising a high impurity density region of the same conductivity type as the high resistance region of the first conductivity type, on one surface of the high resistance region of the first conductivity type, the first The first gate region includes a high impurity density region of a conductivity type opposite to the high resistance region of the conductivity type, one gate region of the cathode region is a drive gate region, and the drive gate region is opposite to the cathode region. The gate region on the opposite side is a fixed potential gate region, and the high resistance region of the second conductivity type is formed on the surface of the high resistance region of the second conductivity type that is in contact with the other surface of the high resistance region of the first conductivity type. a plurality of anode regions comprising high impurity density regions of the same conductivity type;
A second gate region is provided with a high impurity density region of a conductivity type opposite to the high resistance region of the conductivity type, one gate region of the anode region is a drive gate region, and the drive gate region is opposite to the anode region. The gate region on the opposite side is a fixed potential gate region,
A double-sided gate type electrostatic induction thyristor, wherein electrode wiring is provided in each of the first and second drive gate regions, and no external wiring is provided in the first and second fixed potential gate regions. 2. The double-sided gate type electrostatic capacitor according to claim 1, wherein the first fixed potential gate region is directly connected to a cathode region, and the second fixed potential gate region is directly connected to an anode region by an electrode. induction thyristor.
JP15012386A 1986-06-26 1986-06-26 Double-gate-type electrostatic induction thyristor Granted JPS62174972A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15012386A JPS62174972A (en) 1986-06-26 1986-06-26 Double-gate-type electrostatic induction thyristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15012386A JPS62174972A (en) 1986-06-26 1986-06-26 Double-gate-type electrostatic induction thyristor

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP74078A Division JPS5493982A (en) 1978-01-06 1978-01-06 Electrostatic induction semiconductor

Publications (2)

Publication Number Publication Date
JPS62174972A JPS62174972A (en) 1987-07-31
JPS633466B2 true JPS633466B2 (en) 1988-01-23

Family

ID=15489983

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15012386A Granted JPS62174972A (en) 1986-06-26 1986-06-26 Double-gate-type electrostatic induction thyristor

Country Status (1)

Country Link
JP (1) JPS62174972A (en)

Also Published As

Publication number Publication date
JPS62174972A (en) 1987-07-31

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