JPS6212674B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that has high current gain and performs high-speed switching in a large current region.

A static induction transistor (hereinafter referred to as SIT) exhibits unsaturated current-voltage characteristics by controlling the potential barrier appearing in front of the source using the gate voltage and drain voltage to control the amount of carriers injected from the source.
can carry a large current, have a large conversion conductance, and can easily increase the withstand voltage.
Gate capacitance can also be reduced, allowing high-power, high-frequency operation. There are two operating modes in junction-type SIT. When the gate is kept at the same potential as the source, it is in a conductive state, and in the main operating state, the gate is operated by applying a reverse bias (normally-on type), and when the gate is kept at the same potential as the source, it is in a conductive state. , the gate is in a cut-off state, and a forward bias is applied to the gate to make it conductive (normally-off type). When the gate is operated with a forward bias, minority carriers are inevitably injected from the gate into the channel. Of course, injection of minority carriers into a moderate channel works effectively by increasing the injection efficiency of majority carriers from the source and increasing conversion conductance and current gain.
If too many minority carriers are injected, the effect of accumulating excess minority carriers in the channel becomes significant, resulting in a reduction in operating speed.

Split gate SIT proposed by the inventor of this application (Japanese Patent Publication No. 1983-20910 "Static Induction Transistor and Semiconductor Integrated Circuit", Patent No. 1236163 "Semiconductor Device",
Patent No. 1247054 "Static induction transistor semiconductor integrated circuit", Patent No. 1231827 "Semiconductor integrated circuit"
(detailed in 2003) eliminates the accumulation effect of excess minority carriers mentioned above, reduces the gate capacitance without reducing the conversion conductance, and is extremely suitable for high-speed operation.
Split gate structures are of course useful for static induction thyristors. The present invention is an "electrostatic induction type semiconductor device" proposed by the present inventor (Japanese Patent Application Laid-Open No. 1983-93982).
This is a further improvement on the characteristics of . First, the content of the invention in the above-mentioned application, which is the prior art, will be explained.

FIG. 1 is a structural example of a divided gate SIT in which the gate is divided into a drive gate and a fixed potential gate.
Figures 1a and b are plan views, respectively, and Figure 1c
is a sectional view taken along the line AA' in FIG. 1a, and FIG. 1d is a sectional view taken along the line BB' in FIG. 1b. In FIGS. 1a and 1b, electrode wiring is not shown for simplicity. n ⁺ region 1 is the source, P ⁺ region 2,
3 are drive gate, fixed potential gate, n ^-
Area 4 is an area including a portion corresponding to a channel;
n ⁺ region 5 is a drain. 1', 2', 5' are
The source, drive gate, and drain electrodes are made of metal such as Al, Mo, or low-resistance polysilicon, respectively. FIG. 1a shows a structure in which a fixed potential gate completely surrounds the source and drive gate. In FIG. 1b, the fixed potential gate has a structure in which a part of the fixed potential gate has a cut so as to reduce the capacitance between the drive gate electrode 2' and the fixed potential gate. As shown in FIG. 1d, the source electrode 1' is in direct contact with the fixed potential gate 3, illustrating the case where the fixed potential gate is kept at the same potential as the source. Of course, it is also possible to apply a predetermined constant bias to the fixed potential gate instead of setting it at the same potential as the source. Region 6 is SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃
This is an insulating layer such as, or a composite insulating layer that is a combination of multiple insulating layers. The impurity density of each region is about 10 ¹⁸ to 10 ²¹ cm ^-3 for 1, about 10 ¹⁶ to 10 21 cm ^-3 for 2 and 3, about 10 ¹¹ to 10 ¹⁶ cm -3 for 4, and about 10 ¹⁶ cm ^-3 for 5.
It is about 10 ¹⁷ to 10 ²⁰ cm ^-3 . The width of the channel sandwiched between the drive gate and the fixed potential gate varies depending on the voltage applied to the fixed potential gate, but when the potential of the drive gate is the same as that of the source, the width of the channel is due to the depletion layer extending from both gates. It is chosen so that it is completely covered, creating some potential barrier and being in a blocking state. This varies depending on the impurity density of the channel and the impurity density of the gate, and the higher the impurity density of the channel, the narrower the channel width usually has to be. sauce,
The distance between the drains may be set to such a length that the transit time of electrons between the source and the drain does not deteriorate the frequency characteristics of the operation. For example, if a switching speed of 1 nsec is to be obtained, the thickness should be about 20 μm or less. Although the fixed potential gate is often directly connected to the source, it is of course possible to apply a predetermined reverse bias.

Even if a voltage (positive voltage in this case) is applied to the drain, the diffusion potential of the gate creates a potential barrier in front of the source, so no current flows. To some extent,
When a voltage is applied to the drive gate, in this case, for example, about +0.4 to +0.7V (for Si, about 0.6 to 1.1V for GaAs), the potential barrier height decreases or a neutral region appears. and changes to conductive state.
At this time, holes are injected into the channel from the forward biased gate. The injected electrons are
Promotes injection of electrons from the source to lower conduction state resistance. In addition, the injected holes are
Since the fixed potential gate is kept at the same potential as the source, for example, it will be sucked out to the fixed potential gate and will not accumulate in the channel. Since the channel width is usually shorter than the hole diffusion length in the channel region, the hole sucking effect by the fixed potential gate is extremely effective. Therefore, the switch-off when the driving gate voltage is cut off is extremely fast, and there is almost no delay due to the accumulation effect of minority carriers.
The drive gate that controls the channel has a small volume and a small capacitance. Minority carriers injected from the drive gate cross the channel and flow into the fixed potential gate, so they always exist in the channel portion, effectively causing majority carrier injection from the source and working effectively. Therefore, the current gain will be extremely high. Of course, the conversion conductance is also large. FIG. 2 shows a structural example of a split gate SIT in which the capacitance of the drive gate is further reduced and the conversion conductance and current gain are increased.

FIG. 2a is a plan view, and FIG. 2b is a sectional view taken along line A-A'.

The drive gate 2 has a cylindrical shape, the source 1 has an annular shape, and the fixed potential gate 3 extends over the required entire surface. As shown in FIG. 2, when the drive gate is configured in a cylindrical or annular shape, a wide channel can be controlled even with a small drive gate, and the capacitance of the drive gate is small and the conversion conductance and current gain are large. Since the minority carriers injected into the channel are immediately sucked out of the fixed potential gate, there is almost no minority carrier accumulation effect and the switching speed is extremely fast. The source electrode 1' faces the fixed potential gate via the insulating layer 6, but normally the source and the fixed potential gate are directly connected or kept at a constant potential.
Increasing the capacitance between the two does not significantly affect operation. The fact that the switching operation is normally performed in a source-grounded circuit further confirms the above. The operation is almost the same as the example in FIG.

Operate by forward biasing the drive gate
In SIT (bipolar mode SIT, hereinafter referred to as BSIT), only a very small voltage, usually around IV, is applied between the source and gate, so there is almost no need for withstand voltage.

Therefore, the source and gate may be separated by a high resistance region as shown in FIGS. 1 and 2, or
It doesn't matter if you are in direct contact. Of course, the structure of the channel is not limited to the striped or annular shape as shown in FIGS. 1 and 2, but may be of any shape such as an ellipse or a rectangle.

It is sufficient that the gates surrounding the channel are divided, one part serving as a fixed potential gate and the other serving as a driving gate, and the fixed potential gate serving as an electrode for extracting minority carriers injected from the driving gate into the channel.

Of course, the conductivity type may be reversed.

The structure described above in which a fixed potential gate and a driving gate are provided and minority carriers are sucked out from the fixed potential gate to suppress the accumulation effect is also effective when applied to an electrostatic induction thyristor. The surface pattern may be the stripe type shown in Figure 1 or the second pattern.
The annular structure shown in the figure or any other structure may be used. Examples of the cross-sectional structure are shown in FIGS. 3a, b, and c. In FIG. 3a, P ⁺ region 7 is an anode, and 7' is an anode electrode. The fixed potential gate 3 may be directly connected to the source 1 or may be biased in a predetermined reverse direction (in this case, a negative voltage). Further, the operating voltage of the drive gate 2 is not limited to O and forward bias (positive voltage in this case), but may be set to reverse gate bias and then returned to O bias. However, it is usually easier to use a configuration in which the circuit is cut off when the drive gate bias is zero and becomes conductive only after a predetermined forward bias is applied. For example, when a predetermined forward bias is applied to the drive gate, a large amount of electrons are injected from the source. Since a positive voltage is applied to the anode, the injected electrons flow toward the anode, and as a result, a large amount of holes are injected into the region 4 from the anode 7. The source-anode voltage decreases,
A large current flows with a holding voltage of about 1V to several V. Holes flowing from the anode flow into the fixed potential gate, which has a lower potential, and only a small amount flows into the drive gate, so that the current flowing through the drive gate is small. Even when the voltage applied to the drive gate is returned to the cutoff state, for example, if the potential of the fixed potential gate is set lower than the potential of the drive gate, the holes existing in region 4 will flow into the fixed potential gate. If the fixed potential gate is directly connected to the source, it will have the same potential as the drive gate when cut off, so the amount of holes flowing into the gate is determined in proportion to the area ratio. In the configuration shown in FIG. 2a, it takes time to suck out electrons, and the switch-off time tends to be longer. Examples of structures of electrostatic induction thyristors that overcome these drawbacks are shown in FIGS. 3b and 3c. FIG. 3b shows a structure in which split gate structures for injecting electrons and holes, respectively, are provided on two opposing main surfaces. 11 is an anode region for injecting holes, 12 is a driving gate for controlling hole injection, 13 is a fixed potential gate, and 11' and 12' are an anode electrode and a driving gate electrode, respectively.
The operation is performed by applying a positive voltage to electrode 11' with respect to electrode 1', applying a forward voltage (a slight positive voltage with respect to electrode 1') to electrode 2', and simultaneously applying a forward voltage (11' to electrode 12'). When a slightly negative voltage is applied to 1' and 11', electrons and holes are simultaneously injected from both sides, and the voltage between 1' and 11' decreases to a small holding voltage. At this time, holes and electrons are almost all fixed potential gates 3 and 1.
3' and does not flow to the drive gate. When shutting off, the bias applied to both drive gates can be returned to its original state. The configuration shown in FIG. 3b has the disadvantage that the circuit is complicated because control signals of different polarities must be supplied to the two gates.
A structure that improves this defect is shown in FIG. 3c. n ^-
At the interface between the region 4 and the anode region 7, an n ⁺ region 8 is provided in a stripe shape, a mesh shape, etc., and the n ⁺ region 8 and the anode region 7 are directly connected by an external electrode. The electrons injected from source 1
The operation is almost the same as in FIG. 3a, except that it flows into the n ⁺ region 8. In the structure shown in FIG. 3c, there is only one drive gate for controlling conduction cutoff, and fixed potential gates 3 and 8 are provided for sucking out holes and electrons, respectively, so that the switching speed is extremely high. The circuit is a little complicated, but fixed potential gates 3 and 8 are connected to source 1.
If the anode 7 and the anode 7 are biased in the reverse direction with an independent power source, the effect of sucking out holes and electrons will be remarkable, and at the same time, almost no current will flow through the drive gate even when it is conducting or when it is cut off, resulting in an excellent current gain that is extremely high. The desired operation is realized. Even if only 3 is reverse biased, the effect is significant.

However, the BSIT shown in Figures 1 to 3,
SIT thyristors also have drawbacks. In the BSIT shown in FIGS. 1 and 2, the minority carriers injected into the n ^- region 4 from the bottom surface of the drive gate have little effect on operation and tend to cause an accumulation effect. On the other hand, the SIT thyristor shown in Figure 3 has the disadvantage that when the source and fixed potential gate are directly connected (usually used in this state), current also flows to the drive gate when cut off, making it difficult to increase the current gain. There is.

SUMMARY OF THE INVENTION An object of the present invention is to overcome the above-mentioned drawbacks and provide a static induction type semiconductor device which has a high operating speed and an extremely large current gain.

Hereinafter, the present invention will be explained in detail with reference to the drawings.
Since the planar structure may have any shape as shown in FIGS. 1A and 2B, FIG.

FIG. 4 shows an example of the cross-sectional structure of a BSIT in the electrostatic induction semiconductor device of the present invention in which unnecessary minority carrier injection from the bottom surface of the drive gate is reduced. FIG. 4a shows an example in which the drive gate 2 is provided along the side surface of the cut region, and the bottom surface of the gate electrode 2'' is covered with a thick insulating film 6' (SiO ₂ , Si ₃ N ₄ ,
Al ₂ O ₃ , etc. or a composite insulating film made by combining multiple of these materials). Therefore, the capacitance of the drive gate decreases and the area of the drive gate becomes smaller, so that the minority carriers injected from the drive gate, which is forward biased when conducting, are effectively injected only into the channel, and the minority carriers from the source are injected only into the channel. Promotes electron injection and lowers resistance when conducting. Region 2'' may be low resistance polysilicon or a metal such as Al. The drive gate in FIG. 4b consists of P ⁺ polysilicon formed on an insulating film 6'. Naturally, carrier injection does not occur from the bottom surface, but effectively occurs only in the channel direction at the front of the source.Therefore, unnecessary minority carrier injection does not occur.Dimensions of the BSIT channel in Figure 4 and the impurity density are set so that when the drive gate is at the same potential as the source, a sufficiently high potential barrier is formed in front of the source and the source is in a cut-off state.The impurity density in each region is as shown in Figs. This is the same as in the case shown in the figure. In Figures 4a and 4b, the source region 1 and the fixed potential gate are shown to be directly connected by electrodes, but it is not necessarily necessary to connect them directly, and by taking out the respective electrodes, A predetermined reverse bias may be applied to the fixed potential gate.In any case, the minority carriers injected into the channel from the driving gate are increasingly absorbed by the fixed potential gate.

FIG. 5 shows an example of the cross-sectional structure of the electrostatic induction thyristor of the present invention, which reduces the current flowing through the drive gate and increases the current gain. Basically, the structure is the same as that in FIG. 3a, but the structure of the drive gate is designed to prevent current from flowing. Figure 5 a, b
is an example in which a drive gate region is provided on a part of the side surface of a region cut into a rectangular or V-shape,
Its area is extremely small compared to a fixed potential gate, and the current when cut off is extremely small. In FIG. 5c, the driving gate is on the insulating film 6'.
This is an example formed of P ⁺ polysilicon. Since the bottom surface of the drive gate facing the anode region 7 is formed of an insulating film, most of the holes flowing from the anode do not flow into the drive gate, but instead flow into the fixed potential gate and flow as a current to the electrode 1'. . In FIGS. 5a, b, and c, a part of the drive gate still forms a Pn junction with the channel, so the structure is such that holes flow into it, especially when the gate is cut off, although the number is small. Figures 5d and 5e show examples in which the current flowing through the drive gate is further reduced to improve the current gain. In FIGS. 5d and 5e, the drive gate is constructed of an insulated gate, and almost no carriers flow into it. Figure 5 d is rectangular;
In Figure e, an insulated gate is formed in a V-shape. Region 2 is P ⁺ polysilicon, low resistance polysilicon,
Made from metals such as Al and Mo. Of course, a combination of these may also be used.

In Fig. 5, the electrons are sucked out slowly at the time of cut-off, so the speed at the time of cut-off is slightly lowered, but if the n ⁺ regions 8 are provided at a predetermined interval adjacent to the anode as shown in Fig. 6, the electrons can be The flow from the channel also improves. Regions 7 and 8 may be directly connected by electrodes. Although FIG. 6 shows the case of FIG. 5d, the same applies to the other examples of FIG.

In addition to high speed and large current gain, the performance required of a thyristor includes a large blocking voltage, and a high blocking voltage when conducting.
It is required that the holding voltage be small.
In order to increase the blocking voltage compared to FIGS. 5 and 6, it is sufficient to increase the potential barrier generated in front of the source region, so as shown in FIG. It is sufficient to provide a high i region 9. The thicker the i-layer
The blocking voltage will be high, but if it is too thick,
The holding voltage becomes high. The i-layer thickness is
If the length is made shorter than the diffusion length of electrons and holes in that region, there will be almost no deterioration in the holding voltage. Although Figure 7 shows only the example in Figure 6,
Similar to the case of FIG. 6, the same can be applied to other examples of FIG.

In FIGS. 4 to 7, the source 1 and the driving gate 2,
Although it is shown that it is in direct contact with the fixed potential gate 3, it may of course be separated. Of course, a structure in which the conductivity types are completely reversed may also be used. Although the case where the notches of the fixed potential gate and the drive gate are almost equal is shown, it goes without saying that they may be different. In short, a source that supplies carriers to the channel is interposed between the drive gate and the fixed potential gate, and multiple units are arranged in parallel, with the drive gate formed as a Pn junction on the side of the notch region and a rectifying electrode like an insulated gate. Any configuration is sufficient.

The structure of the present invention can be manufactured by conventionally known crystal growth techniques, microfabrication techniques, selective diffusion techniques, selective etching techniques (dry chemicals), ion implantation techniques, and the like.

The electrostatic induction type semiconductor device of the present invention has a plurality of units arranged in parallel, in which a source for supplying a carrier to a channel is interposed between a drive gate and a fixed potential gate, and the drive gate is provided by a cut region. It has a small capacitance, almost no carrier accumulation effect in the channel, large conversion conductance and current gain, and can perform high-speed switching of large currents, so its industrial value is extremely high.

[Brief explanation of the drawing]

Figures 1a and b are plan views of conventional split gate BSIT structure examples, Figure 1c is a cross-sectional structural diagram taken along line A-A' in figure a, and Figure 1d is B-B' in figure b. Fig. 2a is a plan view of a conventional split gate BSIT structure example, Fig. 2b is a sectional view taken along line A-A' in Fig. a, and Figs. 3a to c are conventional structure diagrams. dividing gate
Examples of the cross-sectional structure of the SIT thyristor, FIGS. 4a and b are examples of the cross-sectional structure of the BSIT of the present invention, and FIGS.
6 and 7 are examples of the cross-sectional structure of the SIT thyristor of the present invention.

Claims (1)

[Scope of Claims] 1. A channel region comprising a high-resistance region and a drain region in contact with the high-resistance region and a high impurity density region of the same conductivity type, the opposite side of the channel region not being in contact with the drain region. A source region made of a high impurity density region of the same conductivity type as the channel is provided on the main surface of the channel, a high impurity region of a conductivity type opposite to the source region is provided in contact with the source region and serves as a fixed potential gate region; A drive gate region made of single crystal or polycrystal, which is a high impurity density region of the same conductivity type as the fixed gate region, is provided in a part of the cut region on the opposite side surface of the source region in contact with the fixed potential gate region. An insulating layer is formed in a portion facing the drain region in contact with the source region, the driving gate region, the fixed gate region and the insulating material provided on these main surfaces are considered as one unit, and a large number of these units are formed. A static induction transistor characterized by being arranged in parallel. 2. The static induction transistor according to claim 1, wherein the fixed potential gate region is directly connected to the source region by an electrode. 3. A channel region made of a high resistance region and an anode region made of a high impurity density region of a conductivity type opposite to the high resistance region in contact with the channel region, and a main surface of the channel region on the opposite side not in contact with the anode region. A cathode region made of a high impurity density region of the same conductivity type as the channel is provided, and a high impurity density region of the opposite conductivity type to the cathode region is provided in contact with the cathode region to serve as a fixed potential gate region, and the fixed potential gate A drive gate region made of single crystal or polycrystal, which is a high impurity density region of the same conductivity type as the fixed potential gate region, is provided in a part of the notch region on the opposite side surface of the source region that is in contact with the gate region, and An insulating layer is formed in a portion facing the anode region in contact with the anode region, and the cathode region, driving gate region, fixed gate region, and insulating layer provided on these main surfaces are considered as one unit, and a large number of these units are formed. An electrostatic induction thyristor characterized by being arranged in parallel. 4. The electrostatic induction thyristor according to claim 3, wherein the drive gate is an insulated gate provided along the cut region. 5. According to claim 3 or 4, high impurity density regions of the same conductivity type as the cathode region are arranged at predetermined intervals so as to be in direct or indirect contact with the anode region. electrostatic induction thyristor. 6. Any one of claims 3 to 5, characterized in that a high resistance region is provided adjacent to the cathode region and interposed between the drive gate and the fixed potential gate. The electrostatic induction thyristor described in Section.