JPS633398B2 - - Google Patents

Info

Publication number
JPS633398B2
JPS633398B2 JP58219115A JP21911583A JPS633398B2 JP S633398 B2 JPS633398 B2 JP S633398B2 JP 58219115 A JP58219115 A JP 58219115A JP 21911583 A JP21911583 A JP 21911583A JP S633398 B2 JPS633398 B2 JP S633398B2
Authority
JP
Japan
Prior art keywords
analog
digital
value
digits
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58219115A
Other languages
Japanese (ja)
Other versions
JPS60111398A (en
Inventor
Yoshinori Kameyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP58219115A priority Critical patent/JPS60111398A/en
Publication of JPS60111398A publication Critical patent/JPS60111398A/en
Publication of JPS633398B2 publication Critical patent/JPS633398B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values

Landscapes

  • Analogue/Digital Conversion (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は数値のアナログ記憶方式で、特に記憶
すべきデジタル値を複数桁に分割して記憶する方
式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an analog storage method for numerical values, and particularly to a method for storing a digital value by dividing it into a plurality of digits.

〔従来の技術と問題点〕[Conventional technology and problems]

従来、周波数、電圧、電流、電力、利得、時
間、角度、重量、速度等の自然現象を計測して得
る表示値は連続して変化する量の或る瞬間におけ
る状態を示すアナログ値である。このアナログ値
は現在は10進デジタル表示するのが普通である。
この数値を10進デジタル記憶で記憶すると、3桁
の数値を記憶するのに12個のデジタル記憶素子が
必要であり、これをアナログ記憶器使用だと2桁
ないし3桁が1素子で記憶可能である。この記憶
方式を第1図について説明すると記憶すべきデジ
タル値をデジタル・アナログ(以下D/Aと書
く)変換器2を通して書込命令によつてアナログ
記憶器3に記憶され、再現には読出し命令によつ
てアナログ記憶器3のアナログ値を読出し、アナ
ログ・デジタル(以下A/Dと書く)変換器で変
換されて元のデジタル値に復元される、しかしな
がらアナログ記憶素子には記憶可能桁数の制限が
あるため、再現値にも制限が生じる。
Conventionally, display values obtained by measuring natural phenomena such as frequency, voltage, current, power, gain, time, angle, weight, speed, etc. are analog values that indicate the state of a continuously changing quantity at a certain moment. These analog values are now commonly expressed in decimal digital format.
If this value is stored in decimal digital storage, 12 digital storage elements are required to store the 3-digit value, whereas if an analog memory is used, 2 or 3 digits can be stored in one element. It is. To explain this storage method with reference to FIG. 1, the digital value to be stored is stored in the analog storage 3 by a write command through a digital-to-analog (hereinafter referred to as D/A) converter 2, and is reproduced by a read command. The analog value in the analog memory 3 is read out by the analog memory device 3, and converted by an analog-to-digital (hereinafter referred to as A/D) converter to restore the original digital value. Due to the limitations, there are also limitations on the reproducible value.

〔発明の目的〕[Purpose of the invention]

本発明はアナログ記憶方式の利点である記憶素
子数の節約と、アナログ記憶方式の欠点である桁
数不足を補うため桁数の分割記憶と再現時の読出
値の合成復元する桁分割アナログ記憶方式の提供
を目的とする。
The present invention is a digit division analog storage method that saves the number of storage elements, which is an advantage of the analog storage method, and compensates for the lack of digits, which is a drawback of the analog storage method, by dividing the storage of the number of digits and combining and restoring the read value during reproduction. The purpose is to provide.

〔発明の構成〕[Structure of the invention]

本発明は記憶すべきデジタル値を必要に応じた
桁数で分割し、アナログ記憶には分割された桁数
毎にD/A変換してアナログ記憶部に記憶し、一
部デジタル桁の記憶は直接デジタル記憶部に記憶
される。再現時にはデジタル記憶桁数分はそのま
ま読出され、アナログ記憶値は読出し後A/D変
換器を通してデジタル値とし、分割読出されたデ
ジタルデータと桁合成に復元処理された元のデジ
タル値となる記憶方式である。
According to the present invention, a digital value to be stored is divided into the number of digits as required, and in analog storage, D/A conversion is performed for each divided number of digits and stored in the analog storage section. Stored directly in digital storage. At the time of reproduction, the number of digital storage digits is read out as is, and the analog storage value is converted into a digital value through an A/D converter after being read out, and the original digital value is restored by dividing the read digital data and digit composition. It is.

〔実施例〕〔Example〕

本発明の実施例を第2図、第3図、第4図につ
いて説明する。第2図は記憶すべきデジタル値1
Aを分割し、その分割桁は2ないし3桁を単位と
する、下位の桁をD/A変換器2を通してアナロ
グ記憶器に書込命令により記憶される。残りの上
位桁はそのまま書込命令によりデジタル記憶器6
に記憶される。再現時には読出し命令によりアナ
ログ記憶器3からアナログ値を読出し、A/D変
換器4を通してデジタル値に変換し、一方デジタ
ル記憶器の記憶値は読出し命令によりデジタル値
を読出し、上位桁と下位桁を合成して復元し、デ
ジタル値5Aを再現するものであり、特に一定の
数値を中心として変化量の少い数値に有効であ
る。第3図は記憶すべきデジタル値1Aの上位適
当桁をD/A変換器2を通して書込命令によりア
ナログ記憶部3に記憶し、再現時には読出し命令
によりアナログ記憶部の記憶値を読出しA/D変
換器4を通して復元したデジタル値を上位桁と
し、記憶すべきデジタル値1Aの残りの下位適当
桁を書込命令によつてデジタル記憶器6に記憶
し、再現時には読出命令で記憶値を読出され、デ
ジタル値の下位桁とし、復元した上位桁とデジタ
ル値の桁合成してデジタル値5Aを再現するもの
である。上記のごとく記憶すべきデジタル値の下
位桁をアナログ記憶する第2図と記憶すべきデジ
タル値の上位桁をアナログ記憶する第3図の構成
のいづれを選ぶかは、記憶すべきデジタル値1A
の全桁数と上位桁、下位桁の重要度を考慮して決
定すべきである。
An embodiment of the present invention will be described with reference to FIGS. 2, 3, and 4. Figure 2 shows the digital value 1 to be memorized.
A is divided, and the divided digits are divided into units of 2 or 3 digits, and the lower digits are stored in the analog storage through the D/A converter 2 by a write command. The remaining high-order digits are written directly to the digital memory 6 by a write command.
is memorized. At the time of reproduction, an analog value is read from the analog memory 3 by a read command, and converted to a digital value through the A/D converter 4. On the other hand, the stored value of the digital memory is read out as a digital value by a read command, and the upper and lower digits are This method combines and restores the data to reproduce the digital value 5A, and is particularly effective for numerical values that have a small amount of change, centering on constant numerical values. FIG. 3 shows that the upper appropriate digits of the digital value 1A to be stored are stored in the analog storage section 3 by a write command through the D/A converter 2, and when reproducing, the stored value of the analog storage section is read out by a read command and the A/D The digital value restored through the converter 4 is used as the upper digit, and the remaining lower appropriate digits of the digital value 1A to be stored are stored in the digital memory 6 by a write command, and when reproducing, the stored value is read out by a read command. , the lower digits of the digital value, and the reconstructed upper digits and the digital value digits are combined to reproduce the digital value 5A. As mentioned above, the choice is made between the structure shown in FIG. 2, in which the lower digits of the digital value to be stored are stored in analog form, and the structure shown in Fig. 3, in which the upper digits of the digital value to be stored are stored in analog form.
It should be determined by considering the total number of digits and the importance of the upper and lower digits.

第4図は特許請求の範囲第2項の実施例であ
る。記憶すべきデジタル値1Bを適当桁(図では
上位桁・中位桁・下位桁の3分割)に分割して、
上位桁は第1のD/A変換器2Aを通して書込命
令により第1のアナログ記憶器3Aに記憶し、中
位桁は第2のD/A変換器2Bを通して書込命令
により第2のアナログ記憶器3Bに記憶し、下位
桁は第3のD/A変換器2Cを通して書込命令に
より第3のアナログ記憶器3Cに記憶する。再現
に際しては第1のアナログ記憶器3Aの記憶値は
読出命令で読出され第1のA/D変換器4Aを通
つて復元したデジタル値を再現デジタル値5Bの
上位桁に、第2のアナログ記憶器3Bの記憶値は
読出し命令により読出され第2のA/D変換器4
Bを通つて復元したデジタル値を再現デジタル値
5Bの中位桁に、第3のアナログ記憶器3Cの記
憶値は読出し命令により読み出され第3のA/D
変換器4Cを通つて復元したデジタル値を再現デ
ジタル値5Bの下位桁にデジタル桁合成して再現
するものである。
FIG. 4 is an embodiment of claim 2. Divide the digital value 1B to be memorized into appropriate digits (in the figure, divide into three parts: upper digit, middle digit, and lower digit),
The upper digits are stored in the first analog storage 3A through the first D/A converter 2A in response to a write command, and the middle digits are stored in the second analog memory 3A through the second D/A converter 2B in response to a write command. The lower digits are stored in the memory 3B, and the lower digits are stored in the third analog memory 3C by a write command through the third D/A converter 2C. At the time of reproduction, the stored value of the first analog memory 3A is read out by a read command, and the digital value restored through the first A/D converter 4A is reproduced, and the upper digit of the digital value 5B is transferred to the second analog memory. The stored value of the converter 3B is read out by a read command and sent to the second A/D converter 4.
The stored value of the third analog memory 3C is read out by the read command to the middle digit of the digital value 5B.
The digital value restored through the converter 4C is reproduced by synthesizing the digital digits with the lower digits of the reproduced digital value 5B.

〔発明の効果〕〔Effect of the invention〕

本発明により記憶素子の大幅削減が可能であ
り、D/A変換器、A/D変換器を付設してもな
おIC素子が削減できるし、小型化省電力化に裨
益するところ大である。
According to the present invention, it is possible to significantly reduce the number of memory elements, and even if a D/A converter and an A/D converter are attached, the number of IC elements can be reduced, and there are great benefits to miniaturization and power saving.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来型のアナログ記憶方式のブロツク
図、第2図は本発明の一実施例を示すブロツク
図、第3図は本発明の第2実施例を示すブロツク
図、第4図は本発明の第3の実施例を示すブロツ
ク図である。 1,1A,1B……記憶すべきデジタル値、
2,2A,2B,2C……D/A変換器、3,3
A,3B,3C……アナログ記憶器、4,4A,
4B,4C……A/D変換器、5,5A,5B…
…再現されたデジタル値。
FIG. 1 is a block diagram of a conventional analog storage system, FIG. 2 is a block diagram showing one embodiment of the present invention, FIG. 3 is a block diagram showing a second embodiment of the present invention, and FIG. 4 is a block diagram of the present invention. FIG. 7 is a block diagram showing a third embodiment of the invention. 1, 1A, 1B...Digital values to be stored,
2, 2A, 2B, 2C...D/A converter, 3, 3
A, 3B, 3C...Analog memory, 4, 4A,
4B, 4C...A/D converter, 5, 5A, 5B...
...reproduced digital value.

Claims (1)

【特許請求の範囲】 1 記憶すべきデジタル値がデジタル・アナログ
変換器で変換したアナログ値をアナログ記憶器に
記憶する手段と、アナログ記憶器に記憶されたア
ナログ値をアナログ・デジタル変換器でデジタル
値に複元する手段とを具備した記憶方式におい
て、記憶すべきデジタル値の一部桁はデジタル値
でデジタル記憶器に記憶し、その他の桁のデジタ
ル値はデジタル・アナログ変換器で変換してアナ
ログ記憶器に記憶し、再現時にはアナログ記憶器
のアナログ値をアナログ・デジタル変換器で変換
してデジタル値に復元したのち、デジタル記憶器
の出力デジタル値と桁合成して、元のデジタル値
を再現する桁分割でアナログ・デジタル複合記憶
を特徴とする記憶方式。 2 記憶すべきデジタル値を任意の桁に分割し、
分割に対応したデジタル・アナログ変換器で変換
し、複数のアナログ記憶器に分散して記憶し、再
現時にはそれぞれのアナログ記憶器からアナログ
値を読出し、アナログ値を各アナログ・デジタル
変換器で変換し、全ての出力デジタル値の桁合成
をして元のデジタル値に再現する桁分割アナログ
記憶を特徴とする特許請求の範囲第1項記載の記
憶方式。
[Claims] 1. Digital values to be stored include means for storing an analog value converted by a digital-to-analog converter in an analog storage device, and converting the analog value stored in the analog storage device into a digital value by the analog-to-digital converter. In a storage system equipped with means for duplicating values, some digits of the digital value to be stored are stored as digital values in a digital storage device, and the digital values of other digits are converted by a digital-to-analog converter. It is stored in an analog memory, and when reproducing it, the analog value in the analog memory is converted to a digital value by an analog-to-digital converter, and then the digits are combined with the output digital value of the digital memory to restore the original digital value. A storage method featuring analog/digital composite storage with reproduced digit division. 2 Divide the digital value to be memorized into arbitrary digits,
Convert it with a digital-to-analog converter that supports division, store it in multiple analog storage devices, and when reproducing it, read the analog value from each analog storage device and convert the analog value with each analog-to-digital converter. . The storage system according to claim 1, characterized by digit division analog storage in which digits of all output digital values are synthesized to reproduce the original digital value.
JP58219115A 1983-11-21 1983-11-21 Memory system Granted JPS60111398A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58219115A JPS60111398A (en) 1983-11-21 1983-11-21 Memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58219115A JPS60111398A (en) 1983-11-21 1983-11-21 Memory system

Publications (2)

Publication Number Publication Date
JPS60111398A JPS60111398A (en) 1985-06-17
JPS633398B2 true JPS633398B2 (en) 1988-01-23

Family

ID=16730479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58219115A Granted JPS60111398A (en) 1983-11-21 1983-11-21 Memory system

Country Status (1)

Country Link
JP (1) JPS60111398A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343439A (en) * 1976-09-30 1978-04-19 Nec Corp Memory unit
JPS53138244A (en) * 1977-05-10 1978-12-02 Takeda Riken Ind Co Ltd Digital memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5343439A (en) * 1976-09-30 1978-04-19 Nec Corp Memory unit
JPS53138244A (en) * 1977-05-10 1978-12-02 Takeda Riken Ind Co Ltd Digital memory

Also Published As

Publication number Publication date
JPS60111398A (en) 1985-06-17

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