JPS633363A - Column editing processor for word processor - Google Patents

Abstract

PURPOSE:To continuously store the character data in a 2nd memory means over plural columns by using a means to give the prescribed control to the character data received from a 1st memory means. CONSTITUTION:The columns 21-24 are set to a sentence memory 9 serving as the 2nd memory means. A CPU 4 controls so that the character data delivered from a buffer memory 7 serving as the 1st memory means are continuously stored in the columns 21-24 according to the memory start address received from an address control circuit 10. Thus it is possible to store continuously the character data sent from the memory 7 in the memory 9 over those columns 21-24.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a column editing processing device for a word processor.

[Conventional technology]

FIG. 7 is a diagram for explaining the column editing processing function of a conventional word processor. In Figure 7, 12
is a word processor CRT display device,
In a word processor having a column editing function, on the screen 12a of the CRT display device 12, vertical border lines 31a and 31b and horizontal border lines 32a and 3
2b and display screen 12a in multiple columns 2+, 22.
The screen 12a is divided into 23, 24, and 25 columns, and text data can be input from the keyboard into each column on the screen 12a. By setting columns 21 to 25 on this screen 12a, the corresponding column 2 will be displayed on the text memory of the word processor that stores text data.
1 to 25 are set, and by inputting the text data described above, the text data is manually entered and stored in the corresponding column of the text memory.

[Problem that the invention seeks to solve]

However, in this conventional word processor, each column 2+, 22.2 set in the text memory is
3.24 and 25 are each independent, for example, the first position ff12 of column 21 on screen +2a
When inputting character data from 1a, set the cursor on screen 12a of display device 12 to column 21L:I) first digit 121a, then input character data from the keyboard to the last position 21b of column 21. When you do this, you will not be able to enter any more character data. Therefore, when inputting character data from column 21 to column 22, move the cursor on screen 12a of display screen 2 to the first position 22 of column 22.
After specifying the first address of column 22 on the text memory by setting a, it was necessary to input character data using the keyboard. This not only makes input operations complicated, but also makes it impossible to input and store text data that has been input into a word processor and stored, for example, in an external storage device, in each column on the text memory.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and to make it possible to set a plurality of columns set on the screen of a display device of a word processor and on a text memory to respective related columns on the text memory. An object of the present invention is to provide a column editing processing device for a word processor that can continuously input and store character data output from a storage means such as an external storage device across columns.

[Structure of the invention]

The present invention has a first character data storage means for storing and outputting character data, and a first character data storage means having at least two rows and at least two columns of addresses, and a first character data storage means for storing the character data for each row from a storage start address of each row. a column setting means for dividing the second character data storage means into at least two columns and setting a column having addresses of a predetermined number of rows and a predetermined number of columns; column address storage means for storing and outputting the storage start address of each row of the character data output means; It is characterized by comprising a control means for controlling the character data to be stored in the second character data storage means.

〔Example〕

FIG. 2 is a perspective view showing the external appearance of a word processor having a column editing processing function, which is an embodiment of the present invention. In FIG. 2, l is a word processor main body, and the word processor main body 1 is equipped with an external memory device 6, such as a floppy disk device, and keys 1;
A card 2, a CRT display 12, and a printer 14 are connected.

The keyboard 2 includes character keys 2a for inputting character data and fun keys 2b for executing special functions, which will be described in detail later.

FIG. 3 is a front view showing the screen +2a of the CRT display 12 of the word processor of FIG. γ showing the column editing function of the present invention. Upper vertical border lines 31a and 31b1 and horizontal border lines 32a and 32))
Set screen 12a to 5 columns 21 to 25.
It is set to be divided into. As shown in FIG. 3, by setting the vertical border line 3]a or 31b in the vertical direction of the screen 12a, columns 21 and 22, respectively, are placed on the left and right sides of the vertical border line 31a or 31b as a boundary. Columns 23 and 24 can be set and similarly:
By setting the horizontal boundary line 32a or 32b in the horizontal direction of the screen 12a, columns can be set above and below the horizontal boundary line 32a or 32b as a boundary. That is, columns 21 and 22 are set in the soil below the horizontal boundary line 32a, on the right and left sides of the vertical boundary line 31a, and below the horizontal boundary line 32a and below the horizontal boundary line 32b.
Columns 23 and 24 are set above and on the right and left sides of the vertical boundary line 31b, and furthermore, a column 25 is set below the horizontal boundary line 32b.

The settings in columns 21 to 25 on this screen 12a will be described in detail later.The corresponding column 21 on the text memory 9
J8 to 2S are set, and when the operator inputs text data into columns 21 to 25 on screen 12a using keyboard 2, the text data is input into corresponding columns 21 to 25 on text memory 9. be remembered. It is necessary to set at least one of these columns 21 to 25 as a column in which input is prohibited. In column 9, human power is prohibited, either literal data or human power cannot be used. For example, by setting column 23 as a column in which manual input is prohibited, continuous input is set between columns 21 and 22, 22 and 2□1, and 24 and 25.

In FIG. 3, the horizontal solid line indicates the character string display, and the dotted line indicates the continuous manual setting. Therefore, when a large number of character strings are input continuously using the keyboard 2, the character input using the keyboard 2 next to the character displayed at the last position 21b of column 21 is displayed at the first position of column 22. 22a. Similarly, the next character displayed in the last position 22b of column 22, which is manually written, skips column 23 and is displayed in the first position 24a of column 24, and is displayed in the last position 24b of column 24. The f character is displayed next to the human power j4. The f two characters are the most ' of column 25! It is displayed at position 25a of JJ.

To, each column 2+, 22, 2.1. The character data displayed in and 25 are stored in the corresponding columns 21 to 25 of the engineering memory 9 in the detailed text 1--',) 4th
The figure is a plan view showing a part of the function keys 2b of the keyboard 2 of the word processor shown in Fig. 1, and in Fig. 4, 1 to KIO are shown as the minimum function keys required for column editing processing. In Figure 1, Kl is the boundary mode for setting the horizontal boundary line, K2 is the vertical boundary key for setting the vertical boundary line, and K3 is the vertical boundary key for setting the vertical boundary line.
is the call key to call up the text to be entered manually on the screen 12a, K4 is the r second key to set the format of the document to A4 size for inputting the meaning of the text, K5 is the key to set the format of the document to input the text 85 key to set the size to 85, K6 is f to set the 0 column (hereinafter referred to as "manual prohibited column") for manually editing the text, second input prohibited column key, Kl
thru KIO are cursor movement keys for moving the cursor on the screen 12a V5 in the respective indicated directions.

FIG. 5 is a block diagram of the word processor shown in FIG. 1, and in FIG. 5, the same parts as second to first are given the same reference numerals.

In FIG. 5, character keys 2a and function keys 2b of the keyboard 2 are each connected to a keychain control circuit 3 in the word processor body 1,
Characters entered manually using
Enter the code or key fob control circuit 3.

The keyboard control circuit 3 converts the manually entered key codes into corresponding character codes or control codes, and outputs the converted codes to the main controller (hereinafter referred to as CPU) 4. CPU
In addition to inputting text into columns, 4 controls the six types of editing processing that the word processor has, and includes a cursor ho 11 control circuit 5, an external memory 6, a buffer memory 7, a column control circuit 8, and a text memory 9, which will be described in detail later. , address sterilization circuit IO1 display control circuit 11 and print control circuit 13 (
i control. The cursor control circuit 5 lights a horizontal cursor counter and a vertical cursor counter connected to the CPU t, and each counter has a maximum value and a minimum value (^ or preset), and each counter has a maximum value or less and a minimum value: Set to a value higher than or equal to 1. Press the cursor movement key 7 as shown in Figure 1.
By pressing KIO or KIO, the control code is input from the keyboard control circuit 3 via the CPU 4, and in response, each counter value of the cursor control circuit 5 is increased or decreased. Furthermore, when 4 is pressed on the A4 key of the function keys 2b, the control code is input from the keyboard control circuit 3 to the cursor control circuit 5 via the CPU 4, and the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to 40. At the same time, the maximum value of the vertical cursor counter is set to 34.

Note that the minimum values of the structural cursor counter and vertical cursor counter of the cursor control circuit 5 are always set to 0 regardless of the paper size. The maximum value "40" set in this horizontal cursor counter means that when text data is printed on A4 size paper, the number of characters in one line is 40. The value "34" means that the number of lines when text data is printed on A4 size paper is 34 lines.

Furthermore, when the B5 key of the function keys 2b is pressed, the control code is input from the keyboard control circuit 3 to the cursor control circuit 5 via the CPU 4, and the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to " 3
5" and the maximum value of the vertical cursor counter is set to 28". The maximum value "35" set in this horizontal cursor counter means that the number of characters in one line is 35 when text data is printed on B5 size paper, and similarly the maximum value set in the vertical cursor counter is 35 characters. The value "28" means that the number of lines when text data is printed on BS size paper is 28 lines.

The external memory 6 is a storage device such as a floppy disk device, and is controlled by the CPU 4 and stores text data. This text data is input between the external memory 6 and the buffer memory 7. Buffer memory 7 is C
This memory is connected to the PU 4, the external memory 6, and the text memory 9, and temporarily stores text data input and output from these circuits. Text data input to the keyboard 2 is manually input into the buffer memory 7 via the keyboard control circuit 3 and the CPU 4, temporarily stored, and output to the external memory 6 and the text memory 9.

Also, the text data stored in the external memory 6 is input to the buffer memory 7, temporarily stored, and output to the text memory 9. Further, the text data stored in the text memory 9 is temporarily stored in the buffer memory 7 and output to the external memory 6 for storage.

The column control circuit 8 is connected to the CPU 4 and is controlled by the CPU 4, and also temporarily stores various control data for inputting text data into the column output from the CPU 4, and controls the address control circuit 10 using the control data. Control. The structure and operation of this column control circuit 8 will be described in detail later with reference to FIG.

The text memory 9 is controlled by the CPU 4 and the address control circuit IO, stores text data input via the buffer memory 7 as described in the article, and transfers the text data to the CRT.
The signal is output to the display control circuit 11 for display on the display 12, and is output to the print control circuit 13 for output to the printer 14. The address control circuit 10 is a CPU
4 and a column control circuit 8, and specifies an address for storing text data in the text memory 9.

The display control circuit 11 is controlled by the CPU 4 and converts the text data outputted from the text memory 9 into a character pattern corresponding to the character code and displays it on the CRT display 1.
Output to 2. The CRT display I2 displays the character pattern output from the display control circuit 11 on the screen +2a.
Display above.

The print control circuit 13 is controlled by the CPU 4 and converts the character code of text data output from the text memory 9 into a corresponding character pattern and outputs it to the printer 14. The printer 14 prints out the character pattern output from the print control circuit 13 onto printer paper set in the printer 14.

Figure 1 shows the column control circuit 8 of the word processor in Figure 5.
and a block diagram of a text memory 9, in which the same parts in FIG. 1 as in FIG. 5 are given the same reference numerals. In FIG. 1, for convenience of explanation, the text memory 9 is CR
1 in the horizontal direction corresponding to the screen 12a of the T-display 12.
It is assumed that there are 132 character memories of 2 characters and 11 lines in the vertical direction, and the character code of one character is stored in the character memory of ti.

Assuming that the column addresses of the text memory 9 are A to 11 and the row addresses are 1 to 11, the row and column addresses of one character memory will be expressed in the order of row address and column address, for example, "3E". Now, in the text memory 9, as shown in FIG.
Assume that the settings are continuous from A to 5L. Columns 21 and 22 are set on both the left and right sides of the vertical border line 31a by the vertical border line 31a and the horizontal border line 32a, and the columns 21 and 22 are set on both the left and right sides of the vertical board border line 31b by the vertical border line 31b and the horizontal border line 32a. Set columns 23 and 24 respectively. That is, column 21 is set in the area on text memory 9 surrounded by row and column addresses IA, 1E, 4A, and 4E, and column 22 is set in the area on text memory 9 surrounded by row and column addresses IA, 1E, 4A, and 4E.
It is set in an area on the text memory 9 surrounded by IL, 4G, and 4L.

Column 23 is column address 6A, 6C, l IA
and IIC, and column 24 has matrix addresses 6E and 6L.

It is set in the area on the text memory 9 surrounded by 11E and llL.

These vertical boundary lines 31a and 31b and horizontal boundary line 32
Each row and column address on the text memory 9 of a is
4 to the vertical boundary buffer 8a and horizontal boundary buffer 8b of the column control circuit 8 and are stored therein, and their matrix addresses are output to the column area calculation circuit 8c. In the example of FIG. 1, the vertical boundary buffer 8a contains 1 F
, 2 F, 3 F, 4 F'.

6D, 7D, 8D, 9D, 10D and IID matrix addresses are stored, and 5A is stored in the boundary buffer 8b.

5B, 5C, 5D, 5E, 5F', 5C;, 5F(, 5
I, 5J.

5K and 5L row and column addresses are stored.

Format data indicating the area to be occupied on the text memory 9 is input from the CPU 4 to the column area calculation circuit 8C, and the column and column addresses of the vertical boundary line and horizontal boundary line are input from the vertical boundary buffer 8a and the horizontal boundary buffer 8b. Based on these input human data, the column area calculation circuit 8C calculates the matrix address on the text memory 9 of the column surrounded by the vertical boundary line and the horizontal boundary line, and outputs it to the column buffer 8d. do. The column address of this column is the leftmost column address which is the first address of each row of the column (hereinafter referred to as column head address), and the rightmost column address which is the last address (hereinafter referred to as column row end address). ) is column buffer 8
d and stored. In the example of FIG. 1, the column buffer 8d includes lA, lE, 2A, 2E, 3A, 3E,
4A, 4E.

I G, I L, 2 G, 2 L, 3 G, 3 L,
4 G, 4 L, 6 A.

6C1? A, 7C, 8A, 8C, 9A, 9C, 10A,
10C, l lA, 11G, 6E, 6L, 7E, 7L,
8E.

8L, 9E, '9L, l OE, 10L, l IE and Q
The column line start address and column line end address 'llL' are temporarily stored.

The column start address and the column end address stored in the column buffer 8d are sequentially input to the input prohibited column arithmetic circuit 8e and the character number arithmetic circuit 8 for each pair of the start and end addresses of each row according to the control signal input from the character number counter 81.
r, and its column row head address is output to the comparator circuit 8h.

The input prohibited column arithmetic circuit 8e receives from the CPU 4 the matrix address in the text memory 9 that is specified by the cursor or on the screen +2a of the CRT display 12 when 6 is pressed on the input prohibited column key, and also inputs the column header address. and the column end address are input from the column buffer 8d, and based on these input data, the input prohibited column arithmetic circuit 8e searches to see if the cursor's matrix address is included in the row of the column, and stores the searched column. The column header addresses of all columns are output to the input-prohibited column bath sofa 8g. This input prohibited column - the column searched by the arithmetic circuit 8e is a column in which input of text data is prohibited (hereinafter referred to as an input prohibited column), and in the example of FIG. It is assumed that B is specified in the column for which human labor is prohibited.

The human input prohibited column buffer 8g stores the column start address of each row of the input prohibited column that is input manually from the input prohibited column arithmetic circuit 8e, and outputs the column start address to the comparison circuit 8h.

The comparison circuit 8h compares whether or not the line start address input sequentially from the column buffer 8d is stored in the input inhibition power lambda buffer 8g for each control signal manually inputted from the character number counter 81, and compares whether or not the line start address input from the column buffer 8d is stored in the input inhibition power lambda buffer 8g. If the input-prohibited column buffer 8g (this is not stored), manually transfers the 7-r two-column line start address from the column buffer 8d to the address control circuit 10.

When the number of characters is 1, the arithmetic circuit 8 ":" calculates the number of characters that can be input in that line from the column line start address and column line end address input from the column buffer 8d, and outputs it to the character-number counter 81.Character number counter At 81, the number of characters that can be manually inputted from the character number calculation circuit 8F is set using the keyboard 2, and a character transfer signal outputted from the CPU 4 each time the operator inputs one character is inputted to the character number counter 81. Each time, the number of characters that can be input in the column or the set value of the counter that is set is counted down by one.
”, it is assumed that the input of text data to that line has been completed, and a control signal for calculating the number of inputtable characters in the next line is output to the column buffer 8d and the comparison circuit 8h.

The address control circuit 10 calculates an address by counting up the address by l in response to a character transfer signal manually inputted from the CPU 4 from the column sentence start address transferred from the comparison circuit 8h, and stores the address in the text memory 9. Output. The document memory 9 stores the character code outputted from the hasher memory 77)X in the address ○ character memory instructed by the address control circuit 10, and then sends the character code to the display control circuit 11 and the print control circuit 13. Output.

6(A) and 6(B) are flowcharts showing column editing processing of the word processor of FIG. 2. FIG.

The column editing process will be explained below with reference to the drawings. When performing the column editing process, the operator must first set the format of the document. , when the A4 key is pressed =1, the processing flow advances to step II (Sll) DN and step 12 (S12).

In steady l 2 (S l 2), CPU-1
inputs the A4 size formatted control code to the cursor control circuit 5, the maximum value of the vertical cursor counter of the cursor control circuit 5 is set to 40, and further step 13 (S
After the maximum value of the vertical cursor counter of the cursor control circuit 5 reaches 34 in step 13), step 11(,
Return to 5ll).

Also, the operator or keyboard 2's funk key 2b
When 5 is pressed on the B5 key, the processing flow advances from step 2+ (S2+) to step 22 (S22). In step 22 (S22), the CPU 4
The control code for formatting the size is manually input to the cursor control circuit 5, the maximum value of the cursor counter of the cursor control circuit 5 is set to 35, and step 23 (S23)
After the maximum value of the vertical cursor counter of the cursor control circuit 5 is set to 28 in step 11 (Sll)
Return to

When the document size setting described above is completed, next to set the column boundaries, use the cursor key 7 or KIO in FIG.
Move the cursor to the boundary of that column. For example, if the user wants to move the cursor displayed on the screen 12a of the CRT display 12 to the right on the screen 12a, the user presses the cursor key KIO. By pressing 10 on this cursor key, the processing flow advances from step 31 (S31) to step 32 (S32), where it is determined whether the value of the horizontal cursor counter of the cursor control circuit 5 is "0", and if "0'', it is assumed that the cursor is at the left edge boundary position of the format size, and the cursor on the screen 12a is not moved and the process returns to step 10 (SIO). - On the other hand, if the value of the horizontal cursor counter is not “0”,
The process proceeds to step 32 (S32), where the value of the horizontal cursor counter is subtracted by 1 and the cursor on the screen 12a is moved to the right by one character, and then the process returns to step 10 (SIO).

Further, if the user wants to move the cursor on the screen 12a to the left on the screen 12a, press 9 on the cursor key.

By pressing 9 on this cursor key, the processing flow is as follows:
Proceeding from step 41 (S41) to step 42 (S42), it is determined whether the value of the horizontal cursor counter of the cursor control circuit 5 is the previously set maximum value, and if it is the maximum value, the cursor is moved to the format size. As the rightmost border position of the screen! Return to step 10 (SIO) without moving the cursor on 2a. - On the other hand, if the value of the horizontal cursor counter is not the maximum value, the process proceeds to step 43 (S43), the value of the horizontal cursor counter is added by 1, and the screen 1 is
After moving the cursor on 2a to the left by one character,
Return to step 11 (Sll).

Furthermore, if the user wants to move the cursor on the screen 12a downward on the screen 12a, press 8 on the cursor key.

By pressing 8 on this cursor key, the processing flow is as follows:
Proceeding from step 51 (S51) to step 52 (S52), it is determined whether the value of the vertical cursor counter of the cursor control circuit 5 is "0", and if it is "O", the cursor or the lower end of the format size is Assuming that it is at the boundary position, do not move the cursor on screen +2a and proceed to step 10 (S
Return to IO). - On the other hand, the value of the vertical cursor counter is “0”
If not, proceed to step 53 (953), subtract l from the value of the vertical cursor counter, move the cursor on the screen 12a down by one character, and then proceed to step II (S
Return to ll).

Furthermore, if the user wants to move the cursor on the screen 12a upwards on the screen 12a, press 7 on the cursor key. By pressing 7 on this cursor key, the processing flow changes from step 61 (S61) to step 62 (S62).
), it is determined whether the value of the vertical cursor counter of the cursor control circuit 5 is the previously set maximum value,
If it is the maximum value, it is assumed that the cursor is at the top boundary position of the format size, and the cursor on screen +2a is not moved and the process returns to step 10 (SIO). - On the other hand, if the value of the vertical cursor counter is not the maximum value, step 63 (S63
), the value of the vertical cursor counter is incremented by 1, the cursor on the screen 12a is moved down by one character, and then the process returns to step 11 (Sit).

To set up a column, you need to set a horizontal border line and a vertical border line. When setting the horizontal boundary line of a column, first move the cursor on the screen 12a to the position where the horizontal boundary line is to be set using the cursor keys 7 to KIO, and press 1 on the horizontal boundary key.The process flow goes to step 71. (S71)
The process then proceeds to step 72 (S72). Step 72 (S
In step 72), the CPU 4 calculates the value of the horizontal cursor counter and the value of the vertical cursor counter of the cursor control circuit 5, and uses these values to determine the screen of the cursor when the horizontal boundary key Kl is pressed in step 73 (S73). 12a (hereinafter referred to as the cursor instruction address). Next, in step 7.1 (S74),
The address in the text memory 9 of the horizontal boundary designated by this cursor instruction address (hereinafter referred to as the horizontal boundary address).

), the horizontal boundary address is transferred from the CPU 4 to the horizontal boundary buffer 8b of the column control circuit 8 in step 75 (S75). Furthermore, step 76 (
In S76), it is determined whether the transferred horizontal boundary address is already stored in the horizontal boundary buffer 8b, and if the horizontal boundary address is already stored, the process flow proceeds to step 77 (S77). After not storing the transferred horizontal boundary address in the horizontal boundary buffer 8b and erasing the same horizontal boundary address already stored in the horizontal boundary buffer 8b, the process proceeds to step 89 (S89). The process of step 77 (S77) is performed by manually inputting the horizontal boundary data stored in the mouse boundary buffer 8b.
This process is provided in case you want to delete a response.
That is, if you want to cancel the horizontal boundary line, you can move the cursor on the screen 12a to the position of the previously input horizontal boundary line and press the horizontal boundary key Kl.

On the other hand, if the horizontal boundary address transferred to the horizontal boundary buffer 8b in step 76 (S76) is not yet stored in the horizontal boundary buffer 8b, step 78 (S78)
After storing this transferred horizontal boundary address in the horizontal boundary buffer 8b, the process advances to step 89 (S89).

Next, when setting the vertical border of the column, first
When the cursor on a is moved to the position where a vertical boundary line is to be provided using the cursor keys 7 to 10 and the vertical boundary key Kl is pressed, the processing flow advances from step 81 (S81) to step 82 (S82).

In step 82 (S82), the CPU 4 retrieves the values of the horizontal cursor counter and the vertical cursor counter of the cursor control circuit 5, and uses those values in step 83 (S82).
In step 83), the cursor instruction address of the cursor when 2 is pressed on the vertical boundary key is calculated. Next, in step 84 (S84), the address in the text memory 9 of the specified vertical boundary (hereinafter referred to as vertical boundary address) is calculated from this cursor instruction address, and then in step 7
5 (S75), this vertical boundary address is
The data is then transferred to the vertical boundary buffer 8a of the column control circuit 8. Further, in step 86 (S86), it is determined whether or not this transferred vertical boundary address has already been stored in the vertical boundary buffer 8a, and if the vertical boundary address has already been stored, the processing flow advances to step 87 (S87). ,
After not storing the transferred vertical boundary address in the vertical boundary buffer 8a and erasing the same vertical boundary address already stored in the vertical boundary buffer 8a, step 89 (S89
). This process of step 87 (S87) is a process provided for the same purpose as the process of step 77 (S77), that is, when you want to cancel the vertical border line, move the cursor on the screen 12a to f. All you have to do is move it to the loading boundary line and press 2 on the vertical boundary key.

On the other hand, if the vertical boundary address transferred to the vertical boundary buffer 8a in step 86 (S86) is not yet stored in the vertical boundary buffer 8a, step 88 (S88)
After storing the transferred vertical boundary address in the vertical boundary buffer 8a, the process advances to step 89 (S89).

As described above, after the vertical boundary address and the horizontal boundary address are stored in the vertical boundary buffer 8a and the horizontal boundary buffer 8b, respectively, in step 89 (S89), the vertical boundary address and the horizontal boundary address are stored in the column area calculation circuit 8c. At the same time, data of the format size is inputted to the CPU 4 to the column area calculation circuit 8c, and the column area is calculated for each line, and as a result, the column line start address and the column line end address are calculated. Next, in step 90 (S90), the calculated column line start address and column line end address are transferred from the column area calculation circuit 8c to the column buffer 8d and stored therein.
l Return to 1).

Furthermore, when the operator sets a column for which manual input is prohibited, first he moves the cursor on the screen 12a into the input prohibited column using the cursor key 7 or KIO, and then presses 6 on the manual input prohibition column key.

By pressing 6 on this input prohibition column key, the processing flow changes from step 91 (S91) to step 92 (S92).
). In step 92 (S92), CPtJ
4 retrieves the value of the horizontal cursor counter and the value of the vertical cursor counter of the cursor control circuit 5, and calculates the cursor instruction address when 6 is pressed on the manual input prohibited column key in step 93 (S93) from those values. .

Next, in step 94 (S94), the CPU 4 selects the address (hereinafter referred to as
This is called a prohibited column address. ), in step 95 (S95), the input prohibited column address is calculated by the input prohibited column calculation circuit 8 in the column control circuit 8.
Transfer to e. Furthermore, in step 96 (896), after all column start addresses in the input prohibited column are calculated from the input prohibited column address input from the CPU 4 and the column start address and column end address manually entered from the column buffer 8d. , step 97
In (S97), all the column line start addresses in the calculated input-prohibited columns are stored in the input-prohibited column buffer 8.
g and stored therein, and the processing flow goes to step 11 (
Return to Sll).

After setting the columns and setting the input-prohibited columns as described above, when inputting text data stored in the external memory 6 into the set column, the operator first presses the call key 3 on the keyboard 2, and then processes the data. The flow is step 1
The CPU 4 proceeds from step 01 (SIOI) to step 102 (S+02), where the CPU 4 sends a control signal to the display control circuit 11 to display "Input file name?" in a predetermined area on the screen 12a of the CRT display 12, and performs display control. circuit 1
1 displays “Input file name?” on the CRT display 12.
is displayed on the screen 12a. Thereafter, the operator uses the keyboard 2 to input the file name on the external memory 6 of the text data to be input into the set column, and the process flow proceeds to step +03 (S103). Step 103 (
At S+03), the CPU 4 searches the file name list stored in the external memory 6 to see if the input file name has been input in the external memory 6, and if it is stored in the external memory 6, the CPU 4 searches the file name list stored in the external memory 6, and if it is stored in the external memory 6, the CPU 4 searches the file name list stored in the external memory 6 to see if the input file name has been input in the external memory 6.・1
The process advances to (S104), and if the input file name is not stored in the external memory 6, the process returns to step 102 (SIO2) in order to instruct the operator to re-enter the name.

In step to4 (S104), the text data of the input file name is read from the external memory 6 and temporarily stored on the buffer memory 7, and then step +0
5 (S105), CPt, '4 instructs the column buffer 8d to output the column head address stored in the column buffer 8d to the comparison circuit 8h. After this column head address is transferred from the column buffer 8d to the comparison circuit 8h, step 106 (S10
Proceeding to step 6), the comparison circuit 8h determines whether the column head address transferred from the column buffer 8d is stored in the input-prohibited column buffer 8g, and if the column head address transferred from the column buffer 8d is If it is stored in the input prohibited column buffer 8g, the process advances to step 116 (Sll6). - On the other hand, if the column head address transferred from the column buffer 8d is not stored in the input-prohibited column buffer 8g, the process proceeds to step 107 (S107), and the step 10 described above is performed.
It is determined whether the comparison of address data in step 6 (9106) has been completed for all column head addresses stored in the input prohibited column buffer 78g,
When all comparisons have been completed, step 108 (S1
The process proceeds to step 08), and if all comparisons on the - side have not been completed, the process returns to step 106 (SIO6).

In step 108 (S108), it is assumed that the column start address that is not stored in the input prohibited column buffer 8g is not the column start address of the input prohibited column, and after the line start address of this column is transferred from the comparison circuit 8h to the address control circuit IO. , text data is input into this column using the following steps:

Next, in step 109 (S109), the CPU 4 instructs the column buffer 8d to transfer the column line start address and column line end address to the character number calculation circuit 8r, and the column line start address and column line end address are transferred to the character number calculation circuit 8'. After being transferred, step 110 (Silo
). In step 110 (S110), the character count calculation circuit 8r calculates the number of characters in the line from the input column line start address and column line end address, and then transfers the number of characters calculated in step l1l (S111) to the character count counter 81. 112 (S112).

In step 112 (S112), the CPU 4 outputs a character transfer signal to the address control circuit IO, and receives instructions from the address control circuit IO on the text memory 9 for one character out of the text data stored in the buffer memory 7. After transferring to the address, in step 113 (S113), the CPU Ill also outputs a character transfer signal to the character number counter 81 to cause the value of the character number counter to be subtracted by 1, and the process proceeds to step 114 (S114). Step 11
4 (Sl14), it is determined whether the value stored in the character number counter 81 has become zero due to the subtraction in step 113 (S113), and the original character number counter 81 is determined.
If the value stored in is zero, step 116
(S116), if the value stored in the character number counter 81 is not zero, step 115 (S1
Proceed to step 15).

In step 115 (S115), the CPU 4 outputs a character transfer signal to the address control circuit IO, and in response, the address control circuit IO instructs the text memory 9 to the next address on the text memory 9, and then in step +12 ( S
112).

- On the other hand, in step 116 (S116), the CPU 4
Is there a next column line start address for column buffer 8d? After searching, step 117 (S117
), and if there is a next column start address, return to step 105 (S105) and repeat the above process, and if there is no next column start address in step +17 (S117), the set The input of text data into the column is completed, and this column editing process ends. If in step 101 (Slot),
If 3 is not pressed on the call key, step 11
Return to (Sll).

In the flow of the column editing process shown in FIGS. 6(A) and 6(B), when the function key Kl or KIO of the keyboard 2 is not pressed, the process flow starts from step 11 (Sll) and then steps 21 ( S2
1), step 31 (S31), step 41 (S41
), step 51 (S51), step 61 (S61)
, step 71 (S71), step 81 (S81),
Step 91 (S91) and Step 101 (Slot
) and returns to step 11 (Sit) is always performed, and when any one of the function keys Kl to KIO on the keyboard 2 is pressed,
At this time, the above-described processing flow provided for each key is executed, and after completing each of these processes, the process returns to the above-described loop processing except when the call key is pressed with 3. In addition, step 1
After the process from ot (SIOI) to step 117 (S117) when the call key is pressed is 3, the column editing process ends without going to the loop process as described above.

As explained above, in the processing flow of FIGS. 6(A) and (B), first, the A=1 key is 4 or the BS key is 5
After pressing the document format size setting key to set the format, move the cursor on the screen 12a using the cursor key 7 or KIO, and press the horizontal border key Kl or the vertical border key 2 to set the M border. Set a line or vertical border. By using the above-described formatting and setting of horizontal and vertical boundaries, columns can be set in the area on the screen 12a surrounded by the horizontal and vertical boundaries.

By setting the columns on this screen 12a, the corresponding columns on the text memory 9 are set. Among these set columns, in order to set an input-prohibited column that is stored in the external memory 6 and in which you do not want to input text data, move the cursor to the input-prohibited column using the 7 or KIO key. , press 6 on the input prohibited column key. After the above settings, press 3 on the call key and input the file name of the text data stored in the external memory 6, so that the text data with that file name is
From the external memory 6 via the pub memory 7 to the columns set above except for the input-prohibited columns on the text memory 9,
In addition to being able to input data continuously in a predetermined order of consecutive columns, the text data stored in the text memory 9 is outputted to the CRT display 12 via the display control circuit 11, and the text data input in the columns is outputted to the CRT display 12 via the display control circuit 11. It is possible to display written text data.

Further, if necessary, the text data stored in the text memory 9 is output to the printer 11 via the print control circuit 13, and the text data input in the column is output to the printer 14.
It is equipped with a printer that can print on paper.

Further, the text data stored in the text memory 9 can be output to the external memory 6 via the buffer memory 7 and stored therein.

In the above embodiment, the set column 21 in FIG.
．． The order in which text data is input into columns 22.24 and 25 is as shown in Figure 3.
Text data should be input in this order. That is, the screen 12a
Starting from the top left column above, then to the column to the right of the top left column, and then to the right of the column to the right, and if there is no column to the right, then the top left column. Column order is set in the order of the leftmost column at the bottom of the column.

In the above embodiment, as shown in FIG.
b and the vertical border lines 31a, 31t+ may be displayed with diagonal lines to distinguish them from the columns 21, 22, 23, 24, and 25 set for the operator.
For example, the square corresponding to one character may be displayed as a symbol filled with the color used to display the character. Similarly, on the screen 12a of the Cf1T display 12, input prohibited columns are changed to columns 21 and 22 in which other text data is input to the operator.
゜In order to identify it as 2.1 and 25, the input is 1E.
For example, the entire column 23 may be displayed with diagonal lines or filled with a color used to display characters.

In the above embodiment, the text data stored in the external memory 6 is input into columns on the text memory 9, but the text data input by the operator using the keyboard 2 is sequentially input to the CPU 4 and The data may be input into columns on the text memory 9 via the buffer memory 7.

〔Effect of the invention〕

As detailed above, according to the present invention, the character data outputted by the first character data storage means is continuously stored in at least two columns for each row from the storage start address outputted by the column address storage means. Since the control means is provided for controlling the storage in the second character data storage means in which the column is set, the character data outputted by the first character data storage means is continuously stored in the plurality of related columns. This has the advantage that it can be input and stored in the second character data storage means. Furthermore, the operability of the word processor can be improved.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a column control circuit and text memory of a word processor having a column editing processing function which is an embodiment of the present invention, Fig. 2 is a perspective view showing the external appearance of the word processor of Fig. 1, and Fig. 3 is Fig. 71 is a front view showing the CRT display screen of the word processor shown in Fig. 1; Fig. 71 is a front view showing the function keys of the keyboard of the word processor shown in Fig. 1; Fig. 5 shows the entire system of the word processor shown in Fig. 1. Block diagram: Figures 6 (8) and 6 (B) are flowcharts showing the column editing process of the word processor in Figure 1, and Figure 7 is a CR showing the column editing process of the conventional word processor.
FIG. 3 is a front view of the screen of the T-display. l... Word processor main body, 2 Keyboard, 3... Keyboard control circuit, 4... Main control unit (CPU), 5 - Cursor control circuit, 6... External memory, 7... Buffer memory, 8 Column Control circuit, 8a... Vertical boundary buffer, 8b... Horizontal boundary buffer, 8C Column area calculation circuit, 8d Column buffer, 8e... Input prohibited column calculation circuit, 8f Character number calculation circuit, 8g... Input. Inhibited column buffer, 8h...Comparison circuit, 81...Character counter, 9.Text memory, 10.Address control circuit, 11.Display control circuit, 12.CRT display, 12a.CRT display screen, 13.・Print control circuit, 14...Printer, 21.22.23.24.25...Column, 31a, 3
lb-vertical boundary line, 32a, 32b...horizontal boundary line.

Claims (2)

[Claims] (1) A first character data storage means for storing and outputting character data, and a second character data storage means having at least two rows and at least two columns of addresses and storing the character data for each row from the storage start address of each row. character data storage means; column setting means for dividing the second character data storage means into at least two columns and setting a column having addresses of a predetermined number of rows and a predetermined number of columns; column address storage means for storing and outputting a storage start address of each row; and a column address storage means for storing and outputting a storage start address of each row; A column editing processing device for a word processor, comprising a control means for controlling storage in a second character data storage means. (2) A column editing processing device for a word processor according to claim 1, wherein the first character data storage means is an external storage device.