JPS633364A - Column editing processor for word processor - Google Patents

Abstract

PURPOSE:To continuously store the character data in a character data memory means over plural columns by using a means to give the prescribed control to the character data received from a character data output means. CONSTITUTION:The columns 21-24 are set to a sentence memory 9 serving as a character data memory means. A CPU 4 controls so that the character data outputted from a buffer memory 7 serving as a character output means are continuously in the columns 21-24 according to the memory start address sent from an address control circuit 10. In such a way, the character data received from the memory 7 can be continuously stored in the memory 9 over columns 21-24.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a column editing processing device for a word processor.

[Prior Art] FIG. 7 is a diagram for explaining the column editing processing function of a conventional word processor. In Figure 7, 12
is a word processor CRT display device,
In a word processor having a column editing function, on the screen +2a of the CRT display device 12, vertical border lines 31a and 31b and horizontal border lines 32a and 3
Set 2b and display screen +2a in multiple columns 21, 22
．． The screen 12a is divided into 23, 24, and 25 columns, and text data can be input from the keyboard into each column on the screen 12a. By setting columns 21 to 25 on this screen 12a, the corresponding column 21 on the text memory of the word processor that stores text data
25 are set, and by inputting the text data described above, the text data is input and stored in the corresponding column of the text memory.

[Problems to be Solved by the Invention] However, in this conventional word processor, each column 21, 22, .
23, 24 and 25 are each independent, for example, the first position 21 of column 21 on screen 12a
When inputting character data from a, display device 1
After setting the cursor on the screen 12a of No. 2 to the first position 21a of the column 21, character data is input from the keyboard until it reaches the last position 21b of the column 21.
No more character data can be entered.

Therefore, when inputting character data consecutively from column 21 to column 22, screen 12a of display device 12
After specifying the first address of column 22 on the text memory by setting the upper cursor to the first position 22a of column 22, character data had to be entered using the keyboard.

Therefore, not only is the input operation complicated, but also text data that has been input into a word processor and stored in, for example, an external storage device cannot be input and stored in each column on the text memory.

[Object of the Invention] An object of the present invention is to solve the above-mentioned problems, and to provide a method that allows a plurality of columns set on the display device screen of a word processor and a text memory to be set in related columns on the text memory. An object of the present invention is to provide a column editing processing device for a word processor capable of continuously inputting and storing character data input using a keyboard over a plurality of related columns.

[Structure of the Invention] The present invention includes a character data output means for outputting character data, and a character data storage having at least two lines and at least two Kenbo addresses and storing the character data for each line from the storage start address of each line. means, column setting means for dividing the character data storage means into at least two columns and setting a column having addresses of a predetermined number of rows and a predetermined number of columns, and storing a storage start address of each row of the column. Column address storage means to output, and the at least two character data output means for each row from the storage start address to which the column address storage means outputs the output of the character data output means.
The present invention is characterized by comprising a control means for controlling the character data storage means to continuously store data in the character data storage means over the following columns.

[Embodiment] FIG. 2 is a perspective view showing the appearance of a word processor having a column editing processing function, which is an embodiment of the present invention. In FIG. 2, l is a word processor main body, and the word processor main body l is equipped with an external memory device 6, such as a floppy disk device, and is connected to a keyboard 2, a CRT display 12, and a printer 14.

The keyboard 2 is equipped with character keys 2a for inputting character data and function keys 2b for executing special functions, which will be described in detail later.

FIG. 3 is a front view showing the screen 12a of the CRT display 12 of the word processor shown in FIG. 2, showing the column editing function of the present invention. Vertical border lines 31a and 311: +, and horizontal border lines 32a and 32
b, and the screen 12a is divided into five columns 21 to 2.
It is set to be divided into 5. As shown in FIG. 3, by setting the vertical border line 31a or 31b in the vertical direction of the screen 12a, columns 21 and 22 and column 23 are placed on the left and right sides of the vertical border line 31a or 31b, respectively. Similarly, by setting the horizontal border line 32a or 32b in the horizontal direction of the screen 12a, columns can be set above and below the horizontal border line 32a or 32b as a boundary. Can be set. That is, columns 21 and 22 are set above the horizontal boundary line 32a and on the right and left sides of the vertical boundary line 31a, and columns 21 and 22 are set above the horizontal boundary line 32a and on the left side of the vertical boundary line 31a.
Columns 23 and 24 are set above b on the right and left sides of the vertical border line 31b, and furthermore, a column 25 is set below the horizontal border line 32b.

Column 21 corresponds to the text memory 9, which will be described in detail later, depending on the settings of columns 21 to 25 on this screen 12a.
25 are set, and when the operator inputs text data into columns 21 to 25 on the screen 12a using the keyboard 2, the text data is input into the corresponding columns 2] to 25 on the text memory 9. be remembered. At least one column among these columns 21 to 25 can be designated as an input-prohibited column, and when a certain column is designated as an input-prohibited column by a method described in detail later, the input on the screen 12a and text memory 9 No text data is entered in the prohibited column. For example column 2
2 between each column by setting 3 as a prohibited column.
Continuous input settings are made at 1 and 22.2T124, and 24 and 25.

In FIG. 3, the horizontal solid line indicates the character string display, and the dotted line indicates the continuous input setting. Therefore, when a large number of character strings are input continuously using the keyboard 2, the character input using the keyboard 2 next to the character displayed at the last position 21b of column 21 is displayed at the first position of column 22. 22a. Similarly, the character input next to the character displayed in the last position 22b of column 22 skips column 23, is displayed in the first position 24a of column 24, and is displayed in the last position 24b of column 24. The character input next to the displayed character is displayed in the first position 25a of column 25.

Note that each column 21, 22, 24. The character data displayed in and 25 are stored in corresponding columns 21 to 25 of text memory 9, which will be described in detail later.

FIG. 4 is a plan view showing a part of the function keys 2b of the keyboard 2 of the word processor shown in FIG. ing. Fourth
In the figure, K1 is a horizontal boundary key for setting a horizontal boundary line, K2 is a vertical boundary key for setting a vertical boundary line, and K2 is a vertical boundary key for setting a vertical boundary line.
3 is a call key for calling up text to be input on the screen 12a, K4 is an A4 key for setting the format of the document to be inputted to A4 size, and K5 is for setting the format of the document for inputting text to 85 size. K6 is the input prohibition column key for setting a column in which no text is to be input (hereinafter referred to as an input prohibition column).K7 to KIO are keys for moving the cursor on the screen 12a in the indicated direction. This is a cursor movement key to move to.

FIG. 5 is a block diagram of the word processor shown in FIG. 1, and in FIG. 5, the same parts as in FIGS. 2 to 4 are designated by the same reference numerals.

In FIG. 5, character keys 2a and function keys 2b of the keyboard 2 are each connected to a keyboard control circuit 3 in the word processor body l, and the keyboard 2
Characters input using or keys such as the special functions mentioned above.
The code is input to the keyboard control circuit 3.

The keyboard control circuit 3 converts the input key codes into corresponding character codes or control codes and outputs them to the main control device (hereinafter referred to as CPU) 4. CPU
4 includes a cursor control circuit 5, an external memory 6, and a buffer memory 7, which will be described in detail later, in order to input sentences into columns and control various editing processes of the word processor.
, column control circuit 8, text memory 9, address control circuit IO1, display control circuit 11, and print control circuit 13. The cursor control circuit 5 has a horizontal cursor counter and a vertical cursor counter connected to the CPU 4, each counter has a maximum value and a minimum value set in advance, and each counter is set to a value below the maximum value and above the minimum value. be done. By pressing 7 or KIO on the cursor movement key shown in FIG. The value is increased or decreased. Furthermore, when 4 is pressed on the A4 key of the function keys 2b, the control code is input from the keyboard control circuit 3 to the cursor control circuit S via the CPU 4, and the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to 40. At the same time, the maximum value of the vertical cursor counter is set to 34. Note that the minimum values of the horizontal cursor counter and vertical cursor counter of the cursor control circuit 5 are always set to 0 regardless of the paper size. The maximum value set in this horizontal cursor counter “
40" means that the number of characters in one line is 40 characters when text data is printed on A4 size paper, and similarly, the maximum value set in the vertical cursor counter "°34" means that text data is printed on A4 size paper. This means that the number of lines when data is printed is 34 lines.

- When 5 is pressed, the control code is input from the keyboard control circuit 3 to the cursor control circuit 5 via the CPU 4, and the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to "35" and the vertical The maximum value of the cursor counter is set to "28". The maximum value "3S" set in this horizontal cursor counter indicates that the number of characters in one line is 35 when text data is printed on BS size paper, and is also set in the vertical cursor counter. The maximum value "28" means that the number of lines when text data is printed on B5 size paper is 28 lines.

The external memory 6 is a storage device such as a floppy disk device, and is controlled by the CPU 4 and stores text data. This text data is input between the external memory 6 and the buffer memory 7. Buffer memory 7 is C
This memory is connected to the PU 4, the external memory 6, and the text memory 9, and temporarily stores text data input and output from these circuits. Text data input to the keyboard 2 is input to the buffer memory 7 via the keyboard control circuit 3 and the CPU 4, where it is temporarily stored, and output to the external memory 6 and the text memory 9.

Further, the text data stored in the external memory 6 is input to the buffer memory 7 and temporarily stored therein, and then output to the text memory 9. Further, the text data stored in the text memory 9 is temporarily stored in the buffer memory 7 and output to the external memory 6 for storage.

The column control circuit 8 is connected to the CPU 4, is controlled by the CPU 4, temporarily stores various control data for inputting text data into the column output from the CPU 4, and controls the address control circuit 10 using the control data. Control. The structure and operation of this column control circuit 8 will be described in detail later with reference to FIG.

The text memory 9 is controlled by the CPU 4 and the address control circuit IO, stores the text data input via the buffer memory 7 as described above, and transfers the text data to the CRT.
The signal is output to the display control circuit 11 for display on the display 12, and is also output to the print control circuit 13 for output to the link 14. The address control circuit 10 is a CPU
4 and a column control circuit 8, and specifies an address for storing text data in the text memory 9.

The display control circuit 11 is controlled by the CPU 4 and converts the text data outputted from the text memory 9 into a character pattern corresponding to the character code and displays it on the CRT display 1.
Output to 2. The CRT display 12 displays character patterns output from the display control circuit 11 on a screen 12a.
Display above.

The print control circuit 13 is controlled by the CPU 4 and converts the character code of text data output from the text memory 9 into a corresponding character pattern and outputs it to the printer 14. The printer 14 prints out the character pattern output from the print control circuit 13 onto printer paper set in the printer 14.

Figure 1 shows the column control circuit 8 of the word processor in Figure 5.
and a block diagram of a text memory 9, in which the same parts in FIG. 1 as in FIG. 5 are given the same reference numerals. In FIG. 1, for convenience of explanation, the text memory 9 is CR
1 in the horizontal direction corresponding to the screen 12a of the T-display 12.
It has 1321 character memories of 2 characters and 11 lines in the vertical direction, and the character code of one character is stored in the character memory of l@.

Assuming that the column addresses of the text memory 9 are A to 11 and the row addresses are 1 to 11, the row and column addresses of one character memory will be expressed in the order of row address and column address, for example, "3E". Now, in the text memory 9, as shown in FIG.
ID is set continuously, and the horizontal border line 32a is 5A.
It is assumed that the values are set continuously from to 5L. The vertical boundary line 31a and the horizontal boundary line 32a define the vertical boundary line 3.
Columns 21 and 22 are set on the left and right sides of 1a, respectively, and columns 23 and 2 are set on the left and right sides of the vertical border line 31b by the vertical border line 31b and the horizontal border line 32a, respectively.
4 is set. That is, column 21 is set in the area on text memory 9 surrounded by matrix addresses IA, IE, 4A, and 4E, and column 22 is set in the area surrounded by matrix addresses IG, IL.
, 4G, and 4 on the text memory 9.

Column 23 is column address 6A, 6C, l IA
and ttC, and columns 24 are column addresses 6E and 6L.

It is set in the area on the text memory 9 surrounded by 11E and lIL.

These vertical boundary lines 31a and 31b and horizontal boundary line 32
Each row and column address on the text memory 9 of a is
4 to the vertical boundary buffer 8a and horizontal boundary buffer 8b of the column control circuit 8 and are stored therein, and their matrix addresses are output to the column area calculation circuit 8C. In the example of FIG. 1, the vertical boundary buffer 8a includes I F
, 2 F, 3 F, 4 F.

6 D, 7 D, 8 D, 9 D, 10 D and llD
5A is stored in the horizontal boundary buffer 8.b.

5B, 5G, 5D, 5E, 5F, 5G, 5H, 51, 5
J.

5K and 5L row and column addresses are stored.

Format data indicating the area to be occupied on the text memory 9 is input from the CPU 4 to the column area calculation circuit 8C, and the column and column addresses of the vertical boundary line and horizontal boundary line are input from the vertical boundary buffer 8a and the horizontal boundary buffer 8b. Based on these input data, the column area calculation circuit 8c calculates the matrix address on the text memory 9 of the column surrounded by the vertical boundary line and the horizontal boundary line, and outputs it to the column buffer 8d. do. The column address of this column is the leftmost column address which is the first address of each row of the column (hereinafter referred to as column head address), and the rightmost column address which is the last address (hereinafter referred to as column row end address). ) is column buffer 8
It is output to d and stored in δ. In the example of FIG. 1, column buffers 8d include IA, 1E, 2A, 2E, 3A, 3E.
,4A,=IE.

IG, 1L, 2G, 2L, 3c;, 3L, 4G, 4L,
6A.

6C, 7A, 7C, 8A, 8C, 9A, 9C, I OA
, 10C, 11A, l I C, 6E, 6L, 7E, 7
L, 8E.

8L, 9E, 9L, 10E, l OL, 11E and 11
Column line start address and column line end address called L are temporarily stored.

The column start address and the column end address stored in the column buffer 8d are sequentially input to the input prohibited column arithmetic circuit 8e and the character number arithmetic circuit 8 for each pair of the start and end addresses of each row according to the control signal input from the character number counter 81.
The column head address is output to the comparator circuit 8h.

The input prohibited column arithmetic circuit 8e has a function in which the cursor moves to CRT display 1 when 6 is pressed on the input prohibited column key.
The matrix address on the text memory 9 specified on the screen 12a of 2 is input from the CPU 4, and the column line start address and column line end address are input from the column buffer 8d, and based on these input data, the input prohibited column calculation circuit 8e searches for which row of the column contains the cursor's matrix address, and inputs all the column start addresses of the searched column to the input-prohibited column buffer 8.
Output to g. The column searched by this input prohibited column arithmetic circuit 8e is a column in which the input of text data is prohibited (hereinafter referred to as an input prohibited column), and in the example of FIG. Assume that it is specified in the column.

The input prohibited column buffer 8g stores the column start address of each row of the input prohibited column inputted from the input prohibited column arithmetic circuit 8e, and outputs the column start address to the comparison circuit 8h.

The comparison circuit 8h compares whether or not the line start address input from the column buffer 8d is stored in the input-prohibited column buffer 8g for each control signal input from the character counter 81. If it is not stored in the input-inhibited column buffer 8g, the column head address input from the column buffer 8d is transferred to the address control circuit IO.

The character number calculation circuit 8f calculates the number of characters that can be input in a row from the column line start address and column line end address input from the column buffer 8d, and outputs the result to the character number counter 81. In the character number counter 81, the character number calculation circuit 8r
The number of characters that can be entered using the keyboard 2 is set, and each time the operator inputs one character, the CPU
Each time the character transfer signal outputted from 4 is input to the character number counter 81, the set value of the counter in which the number of inputtable characters in the column is set is counted down by one.

Note that when the set value of this character count counter 81 becomes "0", it is assumed that the input of text data to that line has been completed, and a control signal for calculating the number of inputtable characters for the next line is sent to the column buffer 8d and compared. Output to circuit 8h.

The address control circuit lO calculates an address by counting up the address by l in response to the character transfer signal inputted from the CPU 4 from the column sentence start address transferred from the comparison circuit 8h, and stores the address in the text memory 9. Output. The text memory 9 stores the character code output from the buffer memory 7 in the character memory at the address specified by the address control circuit IO, and then outputs the character code to the display control circuit 11 and the print control circuit 13. .

6(A) and 6(B) are flowcharts showing column editing processing of the word processor of FIG. 2. FIG.

This column editing process will be explained below with reference to the drawings.

When performing this column editing process, the operator must first set the format of the document, and when the operator presses 4 on the A4 key of the function keys 2b of the keyboard 2, the process flow proceeds to step 11 ( Sll) and proceeds to step 12 (S+2).

In step 12 (S12), the CPU 4 inputs a control code for A4 size formatting to the cursor control circuit 5, and the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to 40, and further in step 13 (S13) After the maximum value of the vertical cursor counter of the cursor control circuit 5 is set to 34, the process returns to step tt (sll).

In addition, if the operator presses the function key 2b on the keyboard 2,
When 5 is pressed on the B5 key, the processing flow advances from step 21 (S21) to step 22 (S22). In step 22 (S22), the CPU 4
The control code for size formatting is input to the cursor control circuit 5, the maximum value of the horizontal cursor counter of the cursor control circuit 5 is set to 35, and step 23 (S23)
After the maximum value of the vertical cursor counter of the cursor control circuit 5 is set to 28 in step 11 (Sll)
Return to

When the document size setting described above is completed, next, in order to set the column boundaries, use the cursor key 7 or KIO in FIG.
Move the cursor to the boundary point of that column. For example, if you want to move the cursor displayed on the screen 12a of the CRT display 12 to the right on the screen 12a, press the cursor key KIO. By pressing this cursor key KIO, the processing flow moves to step 3.
1 (S31) to step 32 (S32), it is determined whether the value of the horizontal cursor counter of the cursor control circuit 5 is "0", and if it is "0°", the cursor is at the left end of the format size. Since the cursor is at the boundary position, the cursor on the screen 12a is not moved and the process returns to step to (SIO).

- On the other hand, if the value of the horizontal cursor counter is not "0", proceed to step 32 (S32), subtract 1 from the value of the horizontal cursor counter and move the cursor on screen +2a to the right by one character. , return to step 10 (SIO).

Further, if the user wants to move the cursor on the screen 12a to the left on the screen 12a, press 9 on the cursor key.

By pressing 9 on this cursor key, the processing flow is as follows:
Proceeding from step 41 (S41) to step 42 (S42), it is determined whether the value of the horizontal cursor counter of the cursor control circuit 5 is the previously set maximum value, and if it is the maximum value, the cursor is moved to the format size. , the cursor on the screen 12a is not moved and the process returns to step to (SIO). - On the other hand, if the value of the horizontal cursor counter is not the maximum value, the process proceeds to step 43 (S43), the value of the horizontal cursor counter is added by 1, and the screen 1 is
After moving the cursor on 2a to the left by one character, the process returns to step 11 (Sit).

Furthermore, if the user wishes to move the cursor on the screen 12a downwards on the screen 12a, press 8 on the cursor key.

By pressing 8 on this cursor key, the processing flow is as follows:
Proceeding from step 51 (S51) to step 52 (S52), it is determined whether the value of the vertical cursor counter of the cursor control circuit 5 is "0", and if it is "0", the cursor is at the lower end of the format size. Assuming that the cursor is at the boundary position, the cursor on the screen 12a is not moved and step 10 (S
Return to IO). - On the other hand, the value of the vertical cursor counter is “0”
If not, the process proceeds to step 53 (S53), where the value of the vertical cursor counter is subtracted by 1 and the cursor on the screen 12a is moved down by one character, and then step 11 (S53) is performed.
Return to ll).

Furthermore, if the user wishes to move the cursor on the screen 12a upwards on the screen 12a, press 7 on the cursor key. By pressing 7 on this cursor key, the processing flow changes from step 61 (S61) to step 62 (S62).
), it is determined whether the value of the vertical cursor counter of the cursor control circuit 5 is the previously set maximum value,
If it is the maximum value, it is assumed that the cursor is at the upper boundary position of the format size, and the cursor on the screen 12a is not moved and the process returns to step 10 (SIO). - On the other hand, if the value of the vertical cursor counter is not the maximum value, step 63 (S63
), the value of the vertical cursor counter is incremented by l and the cursor on the screen 12a is moved down by one character, and then the process returns to step 11 (Sll).

To set up a column, you need to set a horizontal border line and a vertical border line. When setting the horizontal boundary line of a column, first move the cursor on the screen 12a to the position where the horizontal boundary line is to be set using the cursor keys 7 to KIO, and press 1 on the horizontal boundary key.The process flow goes to step 71. (S71)
The process then proceeds to step 72 (S72). Step 72 (S
In step 72), the CPU 4 searches the horizontal cursor counter value and the vertical cursor counter value of the cursor control circuit 5, and uses those values to determine the cursor screen 12a when the horizontal boundary key Kl is pressed in step 73 (S73). The upper address (hereinafter referred to as the cursor instruction address) is calculated. Next, in step 74 (S74), the address in the text memory 9 of the horizontal boundary specified from this cursor instruction address (hereinafter referred to as horizontal boundary address).
After calculating, in step 75 (S75), this horizontal boundary address is transferred from the CPU 4 to the horizontal boundary buffer 8b of the column control circuit 8. Furthermore, step 76 (S
76), it is determined whether or not this transferred horizontal boundary address is already stored in the horizontal boundary buffer 8b, and if the horizontal boundary address is already stored,
The processing flow proceeds to step 77 (S77), where the transferred horizontal boundary address is not stored in the horizontal boundary buffer 8b and the same horizontal boundary address already stored in the horizontal boundary buffer 8b is deleted, and then step 89 (S89) is performed. ). The process of step 77 (S77) is provided for the case where you want to erase the horizontal boundary address that has already been input and stored in the horizontal boundary buffer 8b. In other words, when you want to cancel the horizontal boundary line, What is necessary is to move the cursor on the screen 12a to the position of the horizontal boundary line that has already been input, and press the horizontal boundary key Kl.

On the other hand, if the horizontal boundary address transferred to the horizontal boundary buffer 8b in step 76 (S76) is not yet stored in the horizontal boundary buffer 8b, step 78 (S78)
After storing this transferred horizontal boundary address in the horizontal boundary buffer 8b, the process advances to step 89 (S89).

Next, when setting the vertical border of the column, first
When the cursor on a is moved to the position where a vertical boundary line is to be provided using the cursor keys 7 to KIO and the vertical boundary key Kl is pressed, the processing flow advances from step 81 (S8+) to step 82 (S82).

In step 82 (S82), the CPIJ 4 searches the values of the horizontal cursor counter and the vertical cursor counter of the cursor control circuit 5, and uses those values in step 83 (S82).
In S83), the cursor instruction address of the cursor when 2 is pressed on the vertical boundary key is calculated. Next, in step 84 (S84), the address in the text memory 9 of the specified vertical boundary (hereinafter referred to as vertical boundary address) is calculated from this cursor instruction address, and then in step 75 (S75), This vertical boundary address is
4 to the vertical boundary buffer 8a of the column control circuit 8. Furthermore, in step 86 (S8B), it is determined whether or not this transferred vertical boundary address is already stored in the vertical boundary buffer 8a, and if it is already stored, the processing flow goes to step 87 (S87). Step 89 (S8
Proceed to 9). The process of step 87 (S87) is a process provided for the same purpose as the process of step 77 (S77), that is, when you want to cancel the vertical border line, move the cursor on the screen 12a to the vertical border that has already been input. Just move it to the line position and press 2 on the vertical border key.

On the other hand, if the vertical boundary address transferred to the vertical boundary buffer 8a in step 86 (S86) is not yet stored in the vertical boundary buffer 8a, step 88 (S88)
After storing the transferred vertical boundary address in the vertical boundary buffer 8a, the process advances to step 89 (S89).

As described above, after the vertical boundary address and the horizontal boundary address are stored in the vertical boundary buffer 8a and the horizontal boundary buffer 8b, respectively, in step 89 (S89), the vertical boundary address and the horizontal boundary address are stored in the column area calculation circuit 8c. At the same time, format size data is input from the CPU 4 to the column area calculation circuit 8c, and the column area is calculated on a line-by-line basis, and as a result, the column line start address and column line end address are calculated. Next, in step 90 (S90), the calculated column line start address and column line end address are transferred from the column area calculation circuit 8C to the column buffer 8d and stored therein, and then in step 11 (S1
Return to l).

Furthermore, when the operator sets an entry-prohibited column, he or she first presses the cursor key K 7 ? Screen 12 using IshiKIO
After moving the cursor on a to the input prohibited column, press 6 on the input prohibited column key.

By pressing 6 on this input prohibition column key, the processing flow changes from step 91 (S91) to step 92 (S92).
). In step 92 (S92), CPtJ
4 searches the values of the horizontal cursor counter and the vertical cursor counter of the cursor control circuit 5, and calculates the cursor instruction address when 6 is pressed on the input inhibit column key in step 93 (S93) from these values.

Next, in step 94 (S94), the CPU 4 selects the address (hereinafter referred to as
This is called a prohibited column address. ), in step 95 (S95), the input prohibited column address is calculated by the input prohibited column calculation circuit 8 in the column control circuit 8.
Transfer to e. Further, in step 96 (S96), after all column start addresses in the input prohibited column are calculated from the input prohibited column address input from the CPU 4 and the column start address and column line end address input from the column buffer 8d. , step 97
In (S97), all the column line start addresses in the calculated input-prohibited columns are stored in the input-prohibited column buffer 8.
g and stored therein, and the processing flow goes to step 11 (
Return to Sll).

After setting the columns and setting the input-prohibited columns as described above, when inputting text data stored in the external memory 6 into the set column, the operator first presses the call key 3 on the keyboard 2, and then processes the data. The flow is step 1
Proceeding to step 102 (S102) from ot (SIOI), the CPU 4 sends a control signal to the display control circuit 11 to display "Input file name?" on a predetermined part on the screen 12a of the CRT display 12, and performs display control. circuit 1
1 displays “Input file name?” on the CRT display 12.
is displayed on the screen 12a. After this, the operator uses the keyboard 2 to input the file name on the external memory 6 of the text data that he wants to input into the set column, and the process flow is STEP! 03 (S103). Step +03 (
In step S103), the CPU 4 searches the file name list stored in the external memory 6 to see if the input file name has been input in the external memory 6, and if it is stored in the external memory 6, the CPU 4 searches the list of file names stored in the external memory 6, and if it is stored in the external memory 6, the CPU 4 searches the list of file names stored in the external memory 6 to see if the input file name has been input in the external memory 6. (
The process proceeds to step S104), and if the input file name is not stored in the external memory 6, the process returns to step 102 (SIO2) to instruct the operator to input it again.

In step 104 (S104), the text data of the input file name is read out from the external memory 6 and temporarily stored in the buffer memory 7, and then in step 10
5 (S105), the CPU 4 uses the column buffer 8d.
The comparator circuit 8h is instructed to output the column start address stored in the column buffer 8d to the comparator circuit 8h.

After this column head address is transferred from the column buffer 8d to the comparison circuit 8h, step 106 (S106)
The comparator circuit 8h determines whether the column start address transferred from the column buffer 8d is stored in the input-prohibited column buffer 8g, and if the column start address transferred from the column buffer 8d is input-prohibited. If it is stored in the column buffer 8g, the process advances to step 116 (Sl+6). - On the other hand, if the column head address transferred from the column buffer 8d is not stored in the input-prohibited column buffer 8g, the process proceeds to step 107 (S107), and the step 106 (
It is determined whether the address data comparison in step S106) has been completed for all the column head addresses stored in the input prohibited column buffer 8g, and when all the comparisons have been completed, the address data comparison in step S108 is completed.
), and if all comparisons have not been completed, the process returns to step 106 (SIO6).

In step 108 (S108), it is assumed that the column start address that is not stored in the input prohibited column buffer 8g is not the column start address of the input prohibited column, and the column start address is transferred from the comparator circuit 8h to the address control circuit 10. , text data is input into this column from the first address of this column in the following steps.

Next, in step 109 (S109), the CPU 4 instructs the column buffer 8d to transfer the column line start address and column line end address to the character count calculation circuit 8r, and the column line start address and column line end address are transferred to the character count calculation circuit 8f. Step 110 (SIIO
). In step 110 (S110), the character count calculation circuit 8f calculates the number of characters in the line from the input column line start address and column line end address, and then the number of characters calculated in step 111 (S111) is transferred to the character count counter 81, and in step 112 (S112).

In step 112 (S112), the CPU 4 outputs a character transfer signal to the address control circuit IO, and receives instructions from the address control circuit IO on the text memory 9 for one character out of the text data stored in the buffer memory 7. After transferring the character transfer signal to the address, in step 113 (Sl13), the CPU 4 also transfers the character transfer signal to the character number counter 8.
1, the value of the character number counter is decremented by 1, and the process proceeds to step 114 (S114). Step 114 (S
114), it is determined whether the value stored in the character number counter 81 has become zero by the subtraction in step 113 (S113), and if the value originally stored in the character number counter 81 is zero, step 116 ( S1
16), and if the value stored in the character number counter 81 is not zero, step 115 (S115)
Proceed to.

In step 115 (S115), the CPU 4 outputs a character transfer signal to the address control circuit 10, and in response, the address control circuit IO instructs the text memory 9 to the next address on the text memory 9, and then in step 112 ( S
112).

- On the other hand, in step 116 (Sl16), the CPU 4
After searching the column buffer 8d for the starting address of the next column, step! 17 (S117
), and if there is a next column start address, return to step 105 (S105) and repeat the above process, and if there is no next column start address in step 117 (S117), the set The input of text data into the column is completed, and this column editing process is completed. If in step 101 (SIOI),
If 3 is not pressed on the call key, step! 1
Return to (Sll).

In the flow of the column editing process shown in FIGS. 6(A) and 6(B), when the function key Kl or KIO of the keyboard 2 is not pressed, the process flow starts from step 11 (Sll) and then steps 21 ( S2
1), step 31 (S31), step 41 (S41
), step 51 (S51), step 61 (S61)
, step 71 (S71), step 81 (S81),
Step 91 (S91) and Step 101 (S10r
) and returning to step 11 (Sll) is always performed, and when any one of the function keys 1 to KIO on the keyboard 2 is pressed, the above-mentioned The processing flow is executed, and after each of these processes is completed, the process returns to the above-described loop process except when the call key is pressed with 3. Note that step 10
After the processing when the call key 3 is pressed from 1 (Slot) to step 117 (S117) is completed, the column editing processing ends without going to the loop processing as described above.

As explained above, in the process flow of FIGS. 6A and 6B, first, press the document format size setting key of 4 on the A4 key or 5 on the B5 key to set the format.
Use the cursor key 7 or KIO to move the cursor on the screen +2a and press the horizontal border key K [or the vertical border key 2]
Set the horizontal or vertical border by pressing . By using the above-described formatting and setting of the horizontal boundary line and vertical boundary line, columns can be set in the area on the screen 12a surrounded by the horizontal boundary line and the vertical boundary line. By setting the columns on this screen 12a, the corresponding columns on the text memory 9 are set. To set an input-prohibited column from which you do not want to input text data stored in the external memory 6 among these set columns, press the cursor key 7 or K in the input-prohibited column.
Move it using IO and press 6 on the input prohibited column key. After the above settings, by pressing 3 on the call key and inputting the file name of the text data stored in the external memory 6, the text data with that file name is transferred from the external memory 6 via the buffer memory 7. Sentence memory 9
It is possible to input text continuously in a predetermined consecutive column order in the columns set above except for the input-prohibited column above, and text data stored in the text memory 9 can be input via the display control circuit 11. It is possible to output text data to the CRT display 12 and display text data input in columns.

Further, if necessary, the text data stored in the text memory 9 is output to the printer 14 via the print control circuit 13, and the text data input in the column is printed on printer paper provided in the printer 14. Can be done. Also,
The text data stored in the text memory 9 can also be output to the external memory 6 via the buffer memory 7 and stored therein. As shown in FIG. 3, the text data is input into columns 21, 22, 24, and 25 in this order. That is, screen 1
Starting from the top left column on 2a, then to the column to the right of the top left column, and then to the right of the column to the right, and if there is no column to the right, then the top left column. The column order is set in the order of the leftmost column at the bottom of the column.

In the above embodiment, as shown in FIG.
b and the vertical boundaries 31a, 31b may be displayed with diagonal lines to distinguish them from the columns 21.22, 23.24 and 25 set for the operator. It may also be displayed as a symbol in which the inside of the square is filled in with the color used to display text. Similarly, on the screen 12a of the CRT display I2, input prohibited columns are set to columns 21 and 22゜2 in which Ike's text data is input to the operator.
4 and 25, input prohibited column 2.
3. The entire surface may be displayed with diagonal lines, for example, or filled with the color used to display characters.

In the above embodiment, the text data stored in the external memory 6 is input into columns on the text memory 9, but the text data input by the operator using the keyboard 2 is sequentially input to the CPU 4 and The data may be input into columns on the text memory 9 via the buffer memory 7.

[Effects of the Invention] As detailed above, according to the present invention, the character data outputted by the character data output means is continuously output from the storage start address outputted by the column address storage means over at least two columns for each row. Since the control means is provided to control the character data to be stored in the character data storage means in which columns are set, the character data outputted by the character data output means over a plurality of related columns can be continuously input to the character data storage means. It has the advantage that it can be memorized. Furthermore, the operability of the word processor can be improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a column control circuit and text memory of a word processor having a column editing processing function which is an embodiment of the present invention, Fig. 2 is a perspective view showing the external appearance of the word processor of Fig. 1, and Fig. 3 is Fig. 4 is a front view showing the CRT display screen of the word processor shown in Fig. 1; Fig. 4 is a front view showing the function keys of the keyboard of the word processor shown in Fig. 1; Fig. 5 shows the entire system of the word processor shown in Fig. 1. Block diagram; FIGS. 6(A) and 6(B) are flowcharts showing the column editing process of the word processor in FIG. 1; FIG. 7 is a CR showing the column editing process of the conventional word processor.
FIG. 3 is a front view of the screen of the T-display. ■... Word processor body, 2... Keyboard, 3... Keyboard control circuit, 4... Main control unit (CPU), 5... Cursor control circuit, 6... External memory, 7. ...Buffer memory,...Column control circuit, 8a...Vertical boundary buffer, 8b...Horizontal boundary buffer, 8c...Column area calculation circuit, 8d...Column buffer, 8e...Input prohibited Column calculation circuit, 8f...Character number calculation circuit, 8g...Input prohibited column buffer, 8h...Comparison circuit, 81...Character number counter, 9...Text memory, IO...Address control circuit, 11...Display control circuit, 12...CRT display, 12a...CRT display screen) 13...Print control circuit, 14...Printer, 21.22.23.24.25... Column, 31a,
3 lb-vertical boundary line, 32a, 32!0...horizontal boundary line.

Claims (2)

[Claims] (1) A character data output means for outputting character data; a character data storage means having addresses in at least two rows and at least two columns and storing the character data for each row from the storage start address of each row; Column setting means for dividing the data storage means into at least two columns and setting a column having addresses of a predetermined number of rows and a predetermined number of columns; and a column address for storing and outputting a storage start address of each row of the column. storage means, and control to cause the output of the character data output means to be stored in the character data storage means continuously over the at least two columns for each row from the storage start address output by the column address storage means. A column editing processing device for a word processor, characterized in that it is provided with a control means for controlling a word processor. (2) The column editing processing device for a word processor according to claim 1, wherein the character data output means is a keyboard control circuit that outputs character data of characters input from a keyboard.