JPS6333259U - - Google Patents
Info
- Publication number
- JPS6333259U JPS6333259U JP12634186U JP12634186U JPS6333259U JP S6333259 U JPS6333259 U JP S6333259U JP 12634186 U JP12634186 U JP 12634186U JP 12634186 U JP12634186 U JP 12634186U JP S6333259 U JPS6333259 U JP S6333259U
- Authority
- JP
- Japan
- Prior art keywords
- base
- transistor
- resistor
- pnp transistor
- connection point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 230000000295 complement effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Picture Signal Circuits (AREA)
Description
第１図は本考案の雑音除去回路の一実施例を示
す回路図、第２図はその動作を示す波形図、第３
図はその入出力特性図、第４図は従来の雑音除去
回路を示す回路図である。
Ｔｒ１……第１のＮＰＮ形トランジスタ、Ｔｒ
２……第１のＰＮＰ形トランジスタ、Ｅ……プツ
シユプル回路の出力点、Ｃ……コンデンサ、Ｔｒ
３……第２のＰＮＰ形トランジスタ、Ｔｒ４……
第２のＮＰＮ形トランジスタ、Ｒ１……第１の抵
抗、Ｒ２……第２の抵抗、Ｆ……第１の抵抗Ｒ１
と第２の抵抗Ｒ２との接続点、Ｉ１，Ｉ２，Ｉ３
，Ｉ４……定電流源。
Figure 1 is a circuit diagram showing one embodiment of the noise removal circuit of the present invention, Figure 2 is a waveform diagram showing its operation, and Figure 3 is a waveform diagram showing its operation.
The figure is an input/output characteristic diagram, and FIG. 4 is a circuit diagram showing a conventional noise removal circuit. Tr 1 ...First NPN transistor, Tr
2 ...First PNP transistor, E...Output point of push-pull circuit, C...Capacitor, Tr
3 ...Second PNP transistor, Tr 4 ...
Second NPN transistor, R 1 ... first resistor, R 2 ... second resistor, F ... first resistor R 1
and the connection point of the second resistor R 2 , I 1 , I 2 , I 3
, I 4 ... Constant current source.
Claims (1)
ＮＰ形トランジスタＴｒ２とで形成されたコンプ
リメンタリ・エミツタホロワ・プツシユプル回路
の出力点Ｅと接地点ＧＮＤとの間にコンデンサＣ
を接続し、さらに、前記第１のＮＰＮ形トランジ
スタＴｒ１のベースに第２のＰＮＰ形トランジス
タＴｒ３のエミツタを接続するとともに、前記第
１のＰＮＰトランジスタＴｒ２のベースに第２の
ＮＰＮ形トランジスタＴｒ４のエミツタを接続し
、さらに、前記第２のＰＮＰ形トランジスタＴｒ
３と第２のＮＰＮ形トランジスタＴｒ４の各ベー
ス間に第１及び第２の抵抗Ｒ１，Ｒ２を直列接続
し、また、前記第２のＮＰＮ形トランジスタＴｒ
４のベースと第１の抵抗Ｒ１との接続点を電源側
とするとともに、前記第２のＰＮＰ形トランジス
タＴｒ３のベースと第２の抵抗Ｒ２との接続点を
接地ＧＮＤ側に接続し、この第１の抵抗Ｒ１と第
２の抵抗Ｒ２との接続点Ｆに入力端を接続し、ま
た、前記各トランジスタＴｒ１，Ｔｒ２，Ｔｒ３
，Ｔｒ４のベースにバイアス用定電流源Ｉ１，Ｉ
２，Ｉ３，Ｉ４を接続したことを特徴とする雑音
除去回路。 First NPN transistor Tr 1 and first P
A capacitor C is connected between the output point E of the complementary emitter follower push-pull circuit formed by the NP-type transistor Tr2 and the ground point GND.
Further, the emitter of a second PNP transistor Tr 3 is connected to the base of the first NPN transistor Tr 1 , and a second NPN transistor is connected to the base of the first PNP transistor Tr 2 . The emitter of Tr 4 is connected, and the second PNP transistor Tr
First and second resistors R 1 and R 2 are connected in series between the bases of Tr 3 and the second NPN transistor Tr 4 ;
The connection point between the base of PNP transistor Tr 4 and the first resistor R 1 is connected to the power supply side, and the connection point between the base of the second PNP transistor Tr 3 and the second resistor R 2 is connected to the ground GND side. , an input end is connected to the connection point F between the first resistor R 1 and the second resistor R 2 , and each of the transistors Tr 1 , Tr 2 , Tr 3
, a constant current source for biasing I 1 , I at the base of Tr 4
1. A noise removal circuit characterized in that 2 , I3 , and I4 are connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12634186U JPS6333259U (en) | 1986-08-19 | 1986-08-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12634186U JPS6333259U (en) | 1986-08-19 | 1986-08-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6333259U true JPS6333259U (en) | 1988-03-03 |
Family
ID=31020056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12634186U Pending JPS6333259U (en) | 1986-08-19 | 1986-08-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6333259U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59193616A (en) * | 1983-04-18 | 1984-11-02 | Matsushita Electric Ind Co Ltd | Slice circuit |
-
1986
- 1986-08-19 JP JP12634186U patent/JPS6333259U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59193616A (en) * | 1983-04-18 | 1984-11-02 | Matsushita Electric Ind Co Ltd | Slice circuit |