JPS63317390A - Memory card - Google Patents
Memory cardInfo
- Publication number
- JPS63317390A JPS63317390A JP62152673A JP15267387A JPS63317390A JP S63317390 A JPS63317390 A JP S63317390A JP 62152673 A JP62152673 A JP 62152673A JP 15267387 A JP15267387 A JP 15267387A JP S63317390 A JPS63317390 A JP S63317390A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- supply terminal
- memory card
- rom
- peripheral circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 208000000044 Amnesia Diseases 0.000 description 1
- 102100039435 C-X-C motif chemokine 17 Human genes 0.000 description 1
- 101000889048 Homo sapiens C-X-C motif chemokine 17 Proteins 0.000 description 1
- 208000026139 Memory disease Diseases 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006984 memory degeneration Effects 0.000 description 1
- 208000023060 memory loss Diseases 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Semiconductor Memories (AREA)
- Credit Cards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は、プログラマブルROM (以下P−ROMと
称する)とその周辺回路とが同一のカード基体内に実装
されたメモリカードに関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a memory card in which a programmable ROM (hereinafter referred to as P-ROM) and its peripheral circuits are mounted in the same card base. Regarding.
(従来の技術)
近年、各種情報管理分野にメモリカードが普及している
。(Prior Art) In recent years, memory cards have become widespread in various information management fields.
メモリカードは、カード形状(長方形)の基体内に半導
体チップが実装された構成にされており、従来の磁気カ
ードと比較して格段に大きな記憶言損をもっている。Memory cards have a structure in which a semiconductor chip is mounted within a card-shaped (rectangular) base, and have a much larger memory loss than conventional magnetic cards.
メモリカードには、例えばP−ROMとその周辺回路と
が実装されているが、従来のメモリカードでは、P−R
OMの電源端子とその周辺回路の電源端子とがひとつに
まとめられて外部に導出されている。A memory card is equipped with, for example, a P-ROM and its peripheral circuits.
The power supply terminals of the OM and the power supply terminals of its peripheral circuits are combined into one and led out to the outside.
ところで一般のP−ROMでは、データの書込み時にデ
ータの読出し時よりも高い電圧を電@端子に印加する必
要があり、例えばデータの読出し時に5V±0.25V
、データの書込み時には6V+0.25Vを電源端子に
印加する必要がある。By the way, in general P-ROM, when writing data, it is necessary to apply a higher voltage to the electric @ terminal than when reading data. For example, when reading data, it is necessary to apply a voltage of 5V±0.25V
, it is necessary to apply 6V+0.25V to the power supply terminal when writing data.
(発明が解決しようとする問題点)
しかしながら周辺回路がTTL41!成である場合、周
辺回路の動作が保証される電源電圧は、5V+0.25
Vであるため、P−ROMへのデータの書込み時に6v
±0.25Vを印加すると、周辺回路の動作が保証され
なくなるという問題があった。(Problem to be solved by the invention) However, the peripheral circuit is TTL41! If the power supply voltage is 5V + 0.25, the operation of the peripheral circuits is guaranteed.
6V when writing data to P-ROM.
When ±0.25V is applied, there is a problem in that the operation of the peripheral circuits is no longer guaranteed.
本発明はこのような事情によりなされたもので、P−R
OMとTTL@成の周辺回路とを有するメモリカードに
おいて、P−ROMへのデータ書込み時にも周辺回路の
動作が保証されるようにすることを目的としている。The present invention was made under these circumstances, and P-R
The object of the present invention is to ensure the operation of the peripheral circuits even when data is written to the P-ROM in a memory card having an OM and a TTL@ configuration peripheral circuit.
[発明の構成]
(問題点を解決するための手段)
本発明のメモリカードはこの目的を達成するために、プ
ログラマブルROMとその周辺回路とを同一のカード基
体内に実装し、前記プログラマブルROMの電源端子と
前記周辺回路の電源端子とを個別に外部に導出させたも
のである。[Structure of the Invention] (Means for Solving the Problems) In order to achieve this object, the memory card of the present invention has a programmable ROM and its peripheral circuitry mounted in the same card base, and The power supply terminal and the power supply terminal of the peripheral circuit are led out separately.
(作 用)
本発明のメモリカードでは、P−ROMの電源端子とそ
の周辺回路の電源端子とを個別に外部に導出させたので
、P−ROMへのデータの書込み時にはP−ROM専用
の電源端子に高電位を印加し、周辺回路専用の電源端子
に通常電位を印加すれば、周辺回路の動作は保証される
。(Function) In the memory card of the present invention, the power supply terminals of the P-ROM and the power supply terminals of its peripheral circuits are led out separately, so when writing data to the P-ROM, the power supply dedicated to the P-ROM is By applying a high potential to the terminal and applying a normal potential to the power supply terminal dedicated to the peripheral circuit, the operation of the peripheral circuit is guaranteed.
(実施例)
以下、本発明の実施例の詳細を図面に基づいて説明する
。(Example) Hereinafter, details of an example of the present invention will be described based on the drawings.
図面は本発明の一実施例を示すブロック図である。The drawing is a block diagram showing one embodiment of the present invention.
この回路は、512にビットのP−ROMIおよび2と
、NOTゲート3a1NANDゲート3b、NANDゲ
ート3Cとからなる周辺回路3とを相互に接続して1M
ビットのメモリカードを構成した場合の例である。This circuit is constructed by interconnecting the bit P-ROMI and 2 at 512 and the peripheral circuit 3 consisting of a NOT gate 3a, a NAND gate 3b, and a NAND gate 3C.
This is an example of a case where a bit memory card is configured.
P−ROM’lおよび2は、例えばTMM 27512
(株式会社東芝製、商品名〉に相当するICである。P-ROM'l and 2 are, for example, TMM 27512
(Manufactured by Toshiba Corporation, product name).
そしTVCCl はP−ROM’lt;よびP−ROM
2の電源端子、ycc2は周辺回路3の電源端子、AO
〜A15はP−ROM1およびP−ROM2のアドレス
入力、Do−D7は同データ入出力である。and TVCCl is P-ROM'lt; and P-ROM
2 power supply terminal, ycc2 is the power supply terminal of peripheral circuit 3, AO
~A15 is the address input for P-ROM1 and P-ROM2, and Do-D7 is the same data input/output.
なお周辺回路3はTTL構成であり、アドレスデコーダ
の機能を有している。すなわち、このメモリカード全体
のチップセレクト入力になるGEがLOレベル、アドレ
スA16がHIレベルのときP−ROM1がアクセス可
能になり、GEがLOレベル、アドレスA16がLOレ
ベルのときP−ROM2がアクセス可能になる。Note that the peripheral circuit 3 has a TTL configuration and has the function of an address decoder. That is, when GE, which is the chip select input for the entire memory card, is at LO level and address A16 is at HI level, P-ROM1 can be accessed, and when GE is at LO level and address A16 is at LO level, P-ROM2 can be accessed. It becomes possible.
なおA16はアドレスの最上位桁にされている。Note that A16 is the most significant digit of the address.
そして、このメモリカードの読出し時にはVcclとV
CC2とに5■±0.25Vを印加する。When reading this memory card, Vccl and V
Apply 5±0.25V to CC2.
またσE/Vppは、データの書込み時にプログラム電
源端子として12.5Vが印加され、読出し時はアウト
プットイネーブル入力になる。Further, 12.5V is applied to σE/Vpp as a program power supply terminal when writing data, and it becomes an output enable input when reading data.
このように本実施例のメモリカードでは、電源端子Vc
c1とVcc2とを分離している。In this way, in the memory card of this embodiment, the power supply terminal Vc
c1 and Vcc2 are separated.
そしてデータの書込み時、電源端子VCC1に6V±0
.25Vを印加し、電源端子VCC2には5V±0.2
5Vを印加する。When writing data, the power supply terminal VCC1 is set to 6V±0.
.. Apply 25V, and 5V±0.2 to power supply terminal VCC2.
Apply 5V.
一方、このメモリカードの読出し時には、電源端子yc
c1と電源端子VCC2とに、共に5■±0゜25Vを
印加する。On the other hand, when reading from this memory card, the power supply terminal yc
A voltage of 5±0°25V is applied to both c1 and power supply terminal VCC2.
この結果、データの書込み時にも周辺回路3の動作が保
証される。As a result, the operation of the peripheral circuit 3 is guaranteed even during data writing.
なお本実施例のメモリカードは2つのP−ROMを備え
ているが、P−ROMの数はいくつであってもよい。Note that although the memory card of this embodiment includes two P-ROMs, the number of P-ROMs may be any number.
また周辺回路は2つのNANDゲートとNOTゲートと
から構成されているが、伯の構成であってもよい。Further, although the peripheral circuit is composed of two NAND gates and a NOT gate, it may have a similar configuration.
[発明の効果]
以上説明したように本発明のメモリカードは、P−RO
Mの電源端子と周辺回路の電源端子とを個別に外部に導
出させたので、P−ROMへのデータ書込み時にはP−
ROM専用の電源端子に高電位を印加し、周辺回路専用
の電源端子に通常電位を印加すれば、周辺回路の動作が
保証される。[Effects of the Invention] As explained above, the memory card of the present invention has P-RO
Since the power supply terminal of M and the power supply terminal of the peripheral circuit are led out separately, the power supply terminal of P-ROM is
By applying a high potential to the power supply terminal dedicated to the ROM and applying a normal potential to the power supply terminal dedicated to the peripheral circuit, the operation of the peripheral circuit is guaranteed.
図面は本発明の一実施例の構成を示すブロック図である
。The drawing is a block diagram showing the configuration of an embodiment of the present invention.
Claims (1)
カード基体内に実装され、前記プログラマブルROMの
電源端子と前記周辺回路の電源端子とが個別に外部に導
出されていることを特徴とするメモリカード。(1) A memory card characterized in that a programmable ROM and its peripheral circuits are mounted in the same card base, and a power supply terminal of the programmable ROM and a power supply terminal of the peripheral circuit are individually led out. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62152673A JPS63317390A (en) | 1987-06-19 | 1987-06-19 | Memory card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62152673A JPS63317390A (en) | 1987-06-19 | 1987-06-19 | Memory card |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63317390A true JPS63317390A (en) | 1988-12-26 |
Family
ID=15545604
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62152673A Pending JPS63317390A (en) | 1987-06-19 | 1987-06-19 | Memory card |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63317390A (en) |
-
1987
- 1987-06-19 JP JP62152673A patent/JPS63317390A/en active Pending
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