CN210295085U - PC hard disk interaction system based on OTG data line - Google Patents
PC hard disk interaction system based on OTG data line Download PDFInfo
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- CN210295085U CN210295085U CN201921400591.6U CN201921400591U CN210295085U CN 210295085 U CN210295085 U CN 210295085U CN 201921400591 U CN201921400591 U CN 201921400591U CN 210295085 U CN210295085 U CN 210295085U
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Abstract
The application provides a PC hard disk interaction system based on OTG data line, including first PC, second PC, first PC includes bridge U11, analog switch, change over switch CN41, solid state hard disk MSATA and interface chip CN40 at least, analog switch includes first analog switch U31, second analog switch U32, third analog switch U33, first PC with the second PC passes through interface chip CN40 and is connected with the OTG data line, change over switch CN41 respectively with first analog switch U31, second analog switch U32, third analog switch U33 electric connection, and when change over switch CN41 inserts the high-level, control solid state hard disk MSATA pass through interface chip CN40, the OTG data line establish with the data interaction channel between the hard disk of second PC. The data copying device does not need USB equipment, can meet the requirement of data copying between two PCs, and is simple in structure and convenient to use.
Description
Technical Field
The application relates to the technical field of data transmission circuits, in particular to a PC hard disk interaction system based on an OTG data line.
Background
With the development of technology, data transmission technologies applied to electronic devices are also increasingly updated. Since the birth of USB devices (e.g., USB disks), it has played an important role in the field of data transmission. In the process of data copying between two PCs, a user transmits data of a hard disk of one PC to a U disk, then the U disk is connected with a hard disk of the other PC, and then the data are copied to the hard disk of the PC, so that the data copying between the two PCs is realized. However, when the USB device is used to transmit data between two PCs, the network transmission speed and the performance of the USB disk greatly affect the data transmission speed, which often results in a long time required to copy data between the two PCs. Therefore, a new transmission method is needed to replace the technology of copying data between two PCs by USB devices, so as to increase the data transmission speed.
SUMMERY OF THE UTILITY MODEL
The purpose of this application is to solve above-mentioned problem, provides a PC hard disk interactive system based on OTG data line, through the switching of change over switch CN41 to the system input level, adopts OTG data line to make analog switch the hard disk data of UNICOM USB equipment or another PC, has realized realizing data transmission, simple structure, convenient to use under the prerequisite that does not need USB equipment between two PCs.
In order to achieve the above object, the utility model provides a PC hard disk interaction system based on OTG data line, including first PC, second PC, first PC includes bridge U11, analog switch, change over switch CN41, solid state hard disk MSATA and interface chip CN40 at least, analog switch includes first analog switch U31, second analog switch U32, third analog switch U33; the first analog switch U31 is electrically connected with the bridge U11 and the solid state disk MSATA respectively; the second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN40, respectively; the third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN40, respectively; the first PC and the second PC are connected with an OTG data line through an interface chip CN40, the change-over switch CN41 is electrically connected with the first analog switch U31, the second analog switch U32 and the third analog switch U33 respectively, and when the change-over switch CN41 is connected with a high level, the solid state disk MSATA is controlled to establish a data interaction channel with a hard disk of the second PC through the interface chip CN40 and the OTG data line.
Based on the structure, the first analog switch U31, the second analog switch U32 and the third analog switch U33 are controlled through the change-over switch CN41, the first PC and the second PC are connected through the OTG data line, when the change-over switch CN41 is connected with a high level, a data interaction channel is established with the hard disk data of the second PC, the second PC can copy the hard disk data of the first PC without USB equipment, data transmission between the two PCs is more convenient, and the equipment structure is simple.
Preferably, when the switch CN41 is switched to a low level, the switch CN41 controls the first analog switch U31 to communicate with the solid state disk MSATA, and controls the second analog switch U32 to identify the USB device through the interface chip CN 40.
In the technical scheme, when the switch CN41 is switched in the low level, the PC can normally identify the USB device, so that the PC hard disk interactive system of the OTG data line in the embodiment of the present application can be compatible with two functions of data transmission between the PC and USB device transmission, thereby improving the device compatibility and facilitating the use of the user.
Preferably, the interface chip CN40 is a USB3.0 interface chip.
In the technical scheme, the interface chip CN40 is adopted as a USB3.0 interface chip, so that the data transmission speed between two PCs can be increased, and the user experience is improved.
Preferably, the second PC at least includes the bridge U11, the first analog switch U31, the second analog switch U32, the third analog switch U33, the switch CN41, the solid state disk MSATA, and an interface chip CN42, the first analog switch U31 is electrically connected to the bridge U11 and the solid state disk MSATA, the second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN42, the third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN42, the interface chip CN42 is connected to the interface chip CN40 through the OTG data line, and the switch CN41 is electrically connected to the first analog switch U31, the second analog switch U32, and the third analog switch U33; when the change-over switch CN41 is switched into a high level, controlling the second PC to read data of the solid state disk MSATA in the first PC; when the switch CN41 is switched to low level, the second PC is controlled to recognize USB devices.
Based on the structure of the second PC, the structure of the second PC is consistent with that of the first PC, when the change-over switch CN41 of the first PC and the second PC is simultaneously connected to a high level, the hard disk data of the other side can be read between the two PCs, the requirement that a user can transmit data to the two PCs in the using process is met, and the user experience is improved.
Preferably, the interface chip CN42 is a USB3.0 interface chip.
Preferably, the SPI _ SCLK, SPI _ DATA _ OUT, SPI _ DATA _ IN pins of the bridge U11 are electrically connected to a memory circuit U10.
Based on the setting of the storage circuit U10, the PC hard disk interactive system based on the OTG data line of the present application can store the information of data transmission when executing the data interaction task of two PCs, thereby improving the security of data transmission.
Preferably, the first analog switch U31 is CBTL02042ABQ, the second analog switch U32 is PI3USB10, and the third analog switch U33 is CBTL02042 ABQ.
In summary, according to the PC hard disk interactive system based on the OTG data line of the present application, the analog switch is switched to communicate with the USB device or the hard disk data of another PC by switching the input level of the switch CN41 through the OTG data line, so that the data transmission between the two PCs is realized, and the structure is simple and the use is convenient.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a system block diagram of a PC hard disk interactive system based on an OTG data line in an embodiment of the present application;
FIG. 2 is a schematic structural diagram of the bridge U11 of FIG. 1 according to the present application;
FIG. 3 is a schematic structural diagram of a switch CN41 of FIG. 1 according to the present application;
FIG. 4 is a schematic structural diagram of the solid state drive MSATA shown in FIG. 1 according to the present application;
FIG. 5 is a schematic structural diagram of the interface chip CN40 in FIG. 1 according to the present application;
fig. 6 is a schematic structural diagram of a crystal oscillator circuit U12 according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a first analog switch U31 shown in FIG. 1 according to the present application;
FIG. 8 is a schematic structural diagram of a second analog switch U32 shown in FIG. 1 according to the present application;
FIG. 9 is a schematic structural diagram of a third analog switch U33 shown in FIG. 1 according to the present application;
FIG. 10 is a schematic diagram illustrating a connection relationship between an interface chip CN40 and an interface chip CN42 according to an embodiment of the present application;
fig. 11 is a schematic structural diagram of a memory circuit U10 in the embodiment of the present application.
Detailed Description
In the following description, numerous implementation details are set forth in order to provide a thorough understanding of the present invention. It should be understood, however, that these implementation details should not be used to limit the application. In addition, some conventional structures and components are shown in simplified schematic form in the drawings.
The terms "first," "second," "third," and the like as used herein do not denote any order or importance, nor are they used to limit the present application, but rather are used to distinguish one element from another element or operation described in the same technical language.
Example (b): referring to fig. 1, the PC hard disk interactive system based on the OTG data line includes a first PC and a second PC, where the first PC includes a bridge U11, an analog switch, a switch CN41, a solid state disk MSATA, and an interface chip CN 40. The bridge U11, the switch CN41, the solid state disk MSATA, and the interface chip CN40 are all based on the prior art, for example: the bridge U11 shown in fig. 2 is selected as TUSB9261, the switch CN41 shown in fig. 3 is selected as PH _3 × 1V _2.00mm, the solid state disk MSATA shown in fig. 4 is selected as mini pcie _6.8mm, the interface chip CN40 shown in fig. 5 is selected as USB3.0_9H, and the crystal oscillator circuit U12 shown in fig. 6 is electrically connected between the XI pin and the XO pin of the bridge U11. Pin 1 of the SWITCH CN41 is connected to the voltage of + V3.3S, pin 2 is a SWITCH _ SEL pin, and pin 3 of the SWITCH CN41 is grounded.
In the present embodiment, the analog switches include a first analog switch U31, a second analog switch U32, and a third analog switch U33. The first PC and the second PC are connected with an OTG data line through an interface chip CN40, the change-over switch CN41 is electrically connected with the first analog switch U31, the second analog switch U32 and the third analog switch U33 respectively, and the OTG data line is based on the prior art.
The first analog switch U31 is electrically connected to the bridge U11 and the solid state drive MSATA, respectively. Referring to fig. 7, the first analog switch U31 is CBTL02042ABQ, the pin AO _ P, the pin a0_ N, the pin a1_ P, and the pin a1_ N of the first analog switch U31 are respectively connected to the pin 33, the pin 31, the pin 25, and the pin 23 of the solid state disk MSATA, the pin SEL of the first analog switch U31 is connected to the pin 2 of the switch CN41, the pin VDD _1, the pin VDD _2, and the pin VDD _3B of the first analog switch U31 are connected in parallel to the pin 1 of the switch CN41, and the pin C0_ P, the pin C0_ N, the pin C1_ P, and the pin C1_ N of the first analog switch U31 are respectively connected to the pin 57, the pin 56, the pin 60, and the pin 59 of the bridge U11.
The second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN40, respectively. Referring to fig. 8, the second analog switch U31 is selected as PI3USB10, the pin VDD1 and the pin SEL of the second analog switch U32 are respectively connected to the pin 1 and the pin 2 of the switch CN41, the pin a0 and the pin a1 of the second analog switch U32 are respectively connected to the pin 3 and the pin 4 of the interface chip 40, the pin B0 and the pin B1 of the analog switch U32 are respectively connected to a USB device (USB 2.0 device in the prior art), and the pin C0 and the pin C1 of the analog switch U32 are respectively connected to the pin 35 and the pin 36 of the bridge U11.
The third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN40, respectively. Referring to fig. 9, the third analog switch U31 is CBTL02042ABQ, and the pin a0_ P, the pin a0_ N, the pin a1_ P, and the pin a1_ N of the third analog switch U31 are electrically connected to the pin 9, the pin 8, the pin 6, and the pin 5 of the interface chip CN40, respectively. The pin C0_ P, the pin C0_ N, the pin C1_ P, and the pin C1_ N of the third analog switch U31 are electrically connected to the pin 43, the pin 42, the pin 46, and the pin 45 of the bridge U11, respectively.
When 1PIN and 2PIN of the switch CN41 are communicated, the switch CN41 is connected with a high level, the first analog switch U31, the second analog switch U32 and the third analog switch U33 are connected with the high level, at the moment, a PIN A0 and a PIN C0 of the first analog switch U31, the second analog switch U32 and the third analog switch U33 are communicated with a PIN A1 and a PIN C1, so that signals of a solid state disk MSATA and a USB3.0 of a first PC can be opened outwards through the first analog switch U31, the second analog switch U32 and the third analog switch U33, at the moment, a data interaction channel between the solid state disk MSATA and a hard disk of a second PC is established through an interface chip CN40 and an OTG data line, so that the second PC has functions of identifying and reading the data of the solid state disk MSATA of the first PC, and file transmission is realized.
Based on the structure, the first analog switch U31, the second analog switch U32 and the third analog switch U33 are controlled through the change-over switch CN41, the first PC and the second PC are connected through the OTG data line, when the change-over switch CN41 is connected with a high level, a data interaction channel is established with the hard disk data of the second PC, the second PC can copy the hard disk data of the first PC without USB equipment, data transmission between the two PCs is more convenient, and the equipment structure is simple.
When the 2PIN and the 3PIN of the switch CN41 are communicated, the switch CN41 is connected with a low level, the first analog switch U31, the second analog switch U32 and the third analog switch U33 are connected with the low level, at the moment, the PIN A0 and the PIN B0 of the first analog switch U31, the second analog switch U32 and the third analog switch U33 are communicated with the PIN A1 and the PIN B1, so that the interface chip of the first PC can normally identify the USB device of the USB 3.0. The advantage of setting up like this is, when switching on the low level through change over switch CN41, makes the PC can normally discern USB equipment, has realized that the PC hard disk interactive system in the OTG data line in this application embodiment can be compatible with carry out data transmission and adopt two kinds of functions of USB equipment transmission between the PC, improves equipment compatibility, has made things convenient for the user to use.
As a preferred implementation manner of this embodiment, the second PC includes a bridge U11, a first analog switch U31, a second analog switch U32, a third analog switch U33, a switch CN41, a solid state disk MSATA, and an interface chip CN42, the first analog switch U31 is electrically connected to the bridge U11 and the solid state disk MSATA, the second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN42, the third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN42, the interface chip CN42 is connected to the interface chip CN40 through an OTG data line, and the switch CN41 is electrically connected to the first analog switch U31, the second analog switch U32, and the third analog switch U39 33; when the change-over switch CN41 is connected to a high level, controlling the second PC to read the data of the solid state disk MSATA in the first PC; when the changeover switch CN41 is switched to the low level, the second PC is controlled to recognize the USB device. The second PC and the first PC have the same chip structure, and the interface chip CN42 and the interface chip CN40 are the same chip. Specifically, the pin connection relationship between the first analog switch U31 of the second PC and the bridge U11 and the solid state disk MSATA is consistent with the pin connection relationship between the first analog switch U31 of the first PC and the bridge U11 and the solid state disk MSATA, the pin connection relationship between the second analog switch U32 of the second PC and the bridge U11 and the pin connection relationship between the second analog switch U32 of the second PC and the bridge U11 and the pin connection relationship between the second analog switch U32 of the second PC and the interface chip CN42 are consistent with the pin connection relationship between the second analog switch U32 of the first PC and the bridge U11 and the interface chip CN40, and the pin connection relationship between the third analog switch U33 of the second PC and the bridge U11 and the interface chip CN40 are consistent with the pin connection relationship between the third analog switch U33 of the first PC and the bridge U11 and the interface chip CN 40.
Referring to fig. 10, the interface chip CN42 is connected to the second analog switch U32 and the third analog switch U33 of the second PC according to the connection manner of the interface chip CN40 and the second analog switch U32 and the third analog switch U33 of the first PC, and the pins StdA _ SSRX-, StdA _ SSRX + of the interface chip CN40 are connected to the pins StdA _ SSTX-, StdA _ sstda _ SSTX + of the interface chip CN42 through OTG data lines, respectively, the pins StdA _ SSTX-, StdA _ SSRX + of the interface chip CN40 are connected to the StdA _ SSRX-, StdA _ SSRX + of the interface chip CN42 through OTG data lines, the pins D-, D + of the interface chip CN40 are connected to the pins D-, D + of the interface chip CN42 through OTG data lines, and the interface chips CN40, CN42, PTH _1, PTH _1, PTH _3, PTH _4 _ PTH _ StdA _ ssta + of the interface chip CN 3625, PTH _ sst, The pins GND are grounded respectively, and the pins VBUS of the interface chip CN40 and the interface chip CN42 are connected to a +5V power supply respectively. The advantage of setting up like this is through the structure unanimous with the second PC setting, when the change over switch CN41 of first PC, second PC inserts the high level simultaneously, can make between two PCs read the hard disk data of other side each other, satisfies the user and can carry out the mutual transmission demand of data to two PCs in the use, improves user experience.
IN the present embodiment, the SPI _ SCLK, SPI _ DATA _ OUT, and SPI _ DATA _ IN pins of the bridge U11 are electrically connected to the memory circuit U10 shown IN fig. 11, the memory circuit U10 is based on the prior art, the model of the memory circuit U10 is Pm25LV512, and the S (-) and Q pins of the memory circuit U10 are electrically connected to the pin 21 and the pin 20 of the bridge U11, respectively. The advantage of setting up like this is, make the PC hard disk interaction system based on OTG data line of this application when carrying out the data interaction task of two PCs, can save data transmission's information, and then improve data transmission's security.
The working principle is as follows: after the first PC and the second PC are connected by an OTG data line, the level accessed by the first analog switch U31, the second analog switch U32, and the third analog switch U33 is controlled by the switch CN 41. When the change-over switch CN41 of one of the PCs is turned on with 1PIN and 2PIN, the first analog switch U31, the second analog switch U32 and the third analog switch U33 are connected to a high level, and the solid state disk MSATA and the USB3.0 interface of the PC can be switched to another PC through the first analog switch U31, the second analog switch U32 and the third analog switch U33, so that the solid state disk MSATA of the PC can be identified and then realize file transmission through the OTG data line, the interface chip CN40 and the interface chip CN 42. When the change-over switch CN41 of the two PCs is turned on with 1PIN and 2PIN, the solid state disk MSATA and the USB3.0 interfaces of the first PC and the second PC establish a mutual data interaction channel, so as to realize mutual file transmission between the two PCs. When the switches CN41 of the two PCs are both turned on 2PIN and 3PIN, the first analog switch U31, the second analog switch U32, and the third analog switch U33 are switched to low level, and the interface chips CUN40 and CN42 of the first PC and the second PC normally read the USB device.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (7)
1. A PC hard disk interaction system based on an OTG data line comprises a first PC and a second PC, wherein the first PC at least comprises a bridge U11, an analog switch, a change-over switch CN41, a solid state disk MSATA and an interface chip CN40, and is characterized in that the analog switch comprises a first analog switch U31, a second analog switch U32 and a third analog switch U33;
the first analog switch U31 is electrically connected with the bridge U11 and the solid state disk MSATA respectively;
the second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN40, respectively;
the third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN40, respectively;
the first PC and the second PC are connected with an OTG data line through an interface chip CN40, the change-over switch CN41 is electrically connected with the first analog switch U31, the second analog switch U32 and the third analog switch U33 respectively, and when the change-over switch CN41 is connected with a high level, the solid state disk MSATA is controlled to establish a data interaction channel with a hard disk of the second PC through the interface chip CN40 and the OTG data line.
2. The PC hard disk interaction system based on the OTG data line as claimed in claim 1, wherein when the switch CN41 is switched to a low level, the switch CN41 controls the first analog switch U31 to communicate with the solid state disk MSATA, and controls the second analog switch U32 to identify the USB device through the interface chip CN 40.
3. The OTG data line based PC hard disk interactive system according to claim 2, wherein the interface chip CN40 is a USB3.0 interface chip.
4. The OTG data line-based PC hard disk interaction system of claim 1 or 3, wherein the second PC comprises at least the bridge U11, the first analog switch U31, the second analog switch U32, the third analog switch U33, the switch CN41, the solid state disk MSATA, and an interface chip CN42, the first analog switch U31 is electrically connected to the bridge U11 and the solid state disk MSATA, the second analog switch U32 is electrically connected to the bridge U11 and the interface chip CN42, the third analog switch U33 is electrically connected to the bridge U11 and the interface chip CN42, the interface chip CN42 is connected to the interface chip CN40 via the OTG data line, and the switch CN41 is electrically connected to the first analog switch U31, the second analog switch U32, and the interface chip CN 3683 are connected to the OTG data line, respectively, The third analog switch U33 is electrically connected; when the change-over switch CN41 is switched into a high level, controlling the second PC to read data of the solid state disk MSATA in the first PC; when the switch CN41 is switched to low level, the second PC is controlled to recognize USB devices.
5. The PC hard disk interactive system based on OTG data line according to claim 4, characterized in that, the interface chip CN42 is USB3.0 interface chip.
6. The OTG DATA line-based PC hard disk interaction system according to claim 4, wherein the SPI _ SCLK, SPI _ DATA _ OUT and SPI _ DATA _ IN pins of the bridge U11 are electrically connected with a memory circuit U10.
7. The OTG data line-based PC hard disk interaction system according to claim 4, wherein the first analog switch U31 is CBTL02042ABQ, the second analog switch U32 is PI3USB10, and the third analog switch U33 is CBTL02042 ABQ.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921400591.6U CN210295085U (en) | 2019-08-27 | 2019-08-27 | PC hard disk interaction system based on OTG data line |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921400591.6U CN210295085U (en) | 2019-08-27 | 2019-08-27 | PC hard disk interaction system based on OTG data line |
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| CN210295085U true CN210295085U (en) | 2020-04-10 |
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| CN201921400591.6U Active CN210295085U (en) | 2019-08-27 | 2019-08-27 | PC hard disk interaction system based on OTG data line |
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