JPS63316400A - Read-only memory having copy inhibiting function - Google Patents

Abstract

PURPOSE:To protect a maker-side program by comparing read data and write data previously stored in a read-only memory (ROM) by an arithmetic control at the time of writing write data in a static ROM area, and when both the data coincide with each other, enabling all areas to be read out. CONSTITUTION:When a data writing means 2 writes write data in a static reading/writing memory area 33, a data readable mean 32 enables a partial area of the ROM 31 to be read out. The arithmetic control circuit 32 compares read data and write data previously stored in the ROM 31, and when both the data coincide with each other, the readable means 32 enables all the areas of the ROM to be read out. Consequently, a copy inhibiting function for inhibiting that a user can easily read out and copy the stored contents can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a read-only memory having a copy prohibition function, and particularly to an erasable program having a copy prohibition function.
sable Read Only Memory (read-only memory whose memory contents can be erased by irradiation with ultraviolet rays, hereinafter referred to as EFROM) and Electr
lcal IyErasable Read 0nly
Memory' (read-only memory whose stored contents can be electrically erased; hereinafter referred to as EEPROM).

[Prior art] Figure 5 shows a conventional EPRON (M5L2 manufactured by Mitsubishi Electric).
7512K) is shown. In Figure 5, (
1) is the vpp pin that switches the voltage Vpp to 5V when reading and 12.5V when writing program or data, that is, when programming; (2), (3), (4)
, (5), (6), (7), (8), (9), (lo)
, (21), (23), (24), (25), (2B)
and (27) are address signals AO, At.

A2, A3, A4, A5, A6, A7, A8, A9, A
le S All.

Address input pins that input A12, A13 and A14, (11), (12), (13), (15), (16
), (17), (18) and (19) are data signals DO
1 is an input/output pin that inputs and outputs D1, D2, DB, D4, DB, DB, and D7; 2o is a chip enable input pin that inputs a chip enable signal CE indicating that a chip is selected; (22) is a data output signal Output enable input pins (14) and (28), which input an output enable signal OE for controlling the state of the output signal, each have a GND 5VCC bit/te.

Note that the chip enable signal CE and the output enable signal OE are negative logic.

Next, data read and write operations in the conventional EFROM will be explained. The chip enable signal CE is set to low level rL, the output enable signal OE is set to low level rLJl:, and the address signal (A
0 to A14), the data data signal (Do
~D7) is output. Also, when CE or OE is set to high level rHJ, the data input/output terminal becomes a floating state, and the chip enable signal CE is set to high level rHJ.
When set to HJ, it goes into standby mode (power down mode).

Also, the output enable signal OE is set to high level rH.
J, applying voltage vpp to pin (1) enters program mode. Specify the address with the address signal (AO to A14) and write the 8-bit data signal (D
O~D7) are added in parallel to pins (11)~(19) and the chip enable signal CE is set to low level rLJ.
Data signals (DO to D7) are written.

[Problems to be Solved by the Invention] By the way, when a conventional EFROM is mounted on a printed circuit board using a socket, there is a problem in that the stored contents can be easily copied and important programs cannot be protected.

The present invention has been made to solve the above problems,
To provide a read-only memory having a copy prohibition function that prevents a user from easily reading and copying stored contents.

[Means for solving the problem] Therefore, the present invention provides a read-only memory having a read-only memory area and a static read/write memory area, and a static read/write memory area in which predetermined write data is stored. A data writing means for writing, a data readable means for making a part of the area of the read-only memory readable when write data is written, and a read-out means provided in the read-only memory and pre-stored in the read-only memory. It has a copy prohibition function from an arithmetic control circuit that compares data and write data, and readable means that makes the entire area of the read-only memory area readable when the read data and write data match. Configure read-only memory.

[Operation] The read-only memory with the copy prohibition function configured as above is
When the data writing means writes write data to the static read/write memory area, the data readable means makes part of the area of the read-only memory readable, and the arithmetic control circuit is stored in the read-only memory in advance. The read data and the write data are compared, and when the read data match, the read enable means makes the entire area of the read-only memory area readable.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a system including a read-only memory with a copy inhibit function according to the present invention. In Figure 1, (1) is the central processing unit (hereinafter referred to as CPU)
, (2) is a data input/output unit, and (3) is a memory equipped with a copy prohibition function according to the present invention. Memory (3) is E
It is a PROM, and its pin connection diagram is shown in FIG. In FIG. 2, parts that perform the same functions as those in FIG. 5 are denoted by the same reference numerals, and their explanations will be omitted. In FIG. 2, (1) is the vpp pin and WE pin that switch the voltage during reading and programming, and when writing to the read-only memory area (hereinafter referred to as EPROM area) of the memory (described later) and static reading. Write memory area (Static Random Access M
memory AreaS (hereinafter referred to as SRAM area)
Switch depending on when writing to or reading data.

As shown in FIG. 3, the inside of this EFROM (3) consists of an EPROM area (31), an arithmetic control circuit (32) for inhibiting reading of the EPROM area, and an SRAM area (33).

Next, the operation of the read-only memory having a copy prohibition function according to the present invention will be explained with reference to the flowchart of FIG.

(1) Step Sl The manufacturer writes encrypted data in the EPROM area (31) in advance. At this time, pin (1) is set to vpp.

This encrypted data is retained even if the 5V power applied to pin (28) goes down. The CPU (1) applies a low-level rLJ WE pulse to the pin (1) and stores the SRAM area (3
3) Write the verification data. .

(2) Steps 82 to S4 By writing the collation data into the SRAM area (33), part of the data in the EPROM area (31), that is, the encrypted data, becomes readable (step S2).

CPU (1) is EP)? When the encrypted data is read from the OM area (31) (step S3), the arithmetic control circuit (32) compares the read encrypted data with the written verification data (step S4).

(3) Steps 85 to S6 When the collation data and the encrypted data match, the arithmetic control circuit (32) makes it possible to read all areas of the memory and returns to normal operation (Step S5). Further, when the data and the encrypted data do not match, the entire area is made unreadable and copy prohibited (step 8B).

The verification data will be erased when the 5V system power goes down.As mentioned above, unless the user knows the encrypted data and verification data, it is impossible to copy the memory, and the manufacturer's program will be protected.

Next, 6th F1! J is a diagram showing another embodiment of a read-only memory having a copy prohibition function according to the present invention. In the above embodiment, an EPROM with a copy prohibition function was explained, but in this embodiment, an EE with a copy prohibition function is explained.
Indicates FROM. In FIG. 6, a pin connection diagram is shown.

In FIG. 6, (1) is SEL which inputs the selection signal SEL for selecting the EEPROMEPROM area.
Pin, (2), (3), <4), (5), (6)
, (7) , (8) , (SJ) , (10), (2
1), (23), (24) and (25) are address signals AO1At, ^2, A3, A4, A5, ASSA7, A
8. Address manual pins to input A9, AIO, All and A12, (11), (12), (I3), (I5)
, (18), (17), (18) and (19) are data signals I10, Ilo, Ilo 5I10
, Ilo 4, Ol 2 3 Ilo, Ilo and 1107 are input/output data output pins, (20) is a chip enable input pin that inputs a chip enable signal CP indicating that a chip is selected, (22) is a data input pin. Output enable input pin that inputs the output enable signal OE that controls the state of the output signal, (14) is the ground pin GN
D, (28) is a Vcc bin, and (26) is an empty pin. Note that the chip enable signal CB and the output enable signal OE are of negative logic.

Like the above-mentioned EFROM, this EEPROM also includes an EEFROM section and an arithmetic control circuit for inhibiting EEFROM reading, and its operation is the same as that of EPRO II, so a description thereof will be omitted.

[Effects of the Invention] As explained above, according to the present invention, when write data is written to the static read/write memory area by the data write means, the data readable means writes a portion of the read-only memory. The area is made readable, the arithmetic control circuit compares the read data and the write data stored in the read-only memory in advance, and when the two data match, the read-enable means reads out the entire area of the read-only memory area. Since the read-only memory is made readable, the read-only memory cannot be easily copied, and a read-only memory having a copy prohibition function that allows program protection on the manufacturer's side is obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a system equipped with a read-only memory having a copy prohibition function according to the present invention, FIG. 2 is a pin connection diagram of a memory equipped with a copy prohibition function according to the present invention, and FIG. 3 is a copy prohibition diagram. FIG. 4 is a flowchart showing the operation of the read-only memory with the copy prohibition function shown in FIG.
The pin connection diagram of FROM, FIG.
It is a pin connection diagram of PROM. In each figure, 1 is a CPU (central processing unit), 2 is a data input/output unit, 3 is an EPROM, 31 is an EPROM unit, 32
33 is an arithmetic control circuit and an SRAM area. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (3)

[Claims] (1) a read-only memory having a read-only memory area and a static read-write memory area; a data write means for writing predetermined write data into the static read-write memory area; a data readable means for making a part of the area of the read-only memory readable when written; and a data readable means provided in the read-only memory that allows the read data and the write data to be stored in advance in the read-only memory. and a readable means that makes all areas of the read-only memory area readable when the read data and the write data match. Read-only memory with (2) The read-only memory having a copy prohibition function according to claim 1, wherein the read-only memory is a read-only memory whose stored contents can be erased by irradiating it with ultraviolet rays. (3) The read-only memory having a copy prohibition function according to claim 1, wherein the read-only memory is a read-only memory whose stored contents can be electrically erased.