JPH05134928A - Memory device - Google Patents

Abstract

PURPOSE:To provide a memory device which can reduce its installing space and also can perform the programming with high flexibility. CONSTITUTION:A memory cell array 2 is provided with a data storing area and a memory transistor serving as an access control area 10 equivalent to at least one bit and corresponding to the data storing area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, an electrically rewritable nonvolatile memory device.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional example as a method of protecting a memory from erroneous rewriting in an electrically rewritable nonvolatile memory device. In FIG. 2, reference numeral 1 is a non-volatile memory device, 2 is a memory cell array composed of words, which is an area for storing data of a predetermined unit, and 2a and 2b are memory cell array 2 for protecting each from erroneous rewriting. A memory area for storing a start address indicating the beginning of the protected memory area and a memory area for storing an end address indicating the end of the protected memory area. Next, 3 is an address input terminal, 4 is an address register for holding the address input from the address input terminal 3, and 5 is an address decoder for decoding the address held in the address register 4. Further, 6 is a comparison circuit for comparing the size of the address held in the address register 4 with the start and end addresses stored in advance in the memory areas 2a and 2b, and 7 is the comparison circuit 6
The control circuit 8 judges the control signal from the control circuit and controls the address of the rewriting / reading position.

Next, the operation will be described. The address accessed for rewriting is input from the address input terminal 3 and held in the address register 4. Therefore,
The comparison circuit 6 compares the start and end addresses of the areas to be protected stored in the memory areas 2a and 2b in advance with the addresses held in the address register 4 to determine whether the areas are rewritable areas. The control signal is sent to the control circuit 7. If the accessed address is within the rewritable area, rewriting is performed as usual, and if it is within the unrewritable area, rewriting is not performed. Note that the start address and end address of this protected area can be rewritten only when a high voltage is applied to a certain terminal that is not used in normal processing. There is.

[0004]

Since the conventional non-volatile memory device is configured as described above and protects in units of memory areas, the start address of the area to be protected in the memory device, It was necessary to provide a memory area for storing the end address and a comparison circuit for comparing the size of these addresses with the addresses accessed for rewriting. Therefore, there are problems that the comparison circuit must be taken into consideration when programming software, and that a space for providing the comparison circuit is required.

The present invention has been made in order to solve the above problems, and an object thereof is to obtain a highly flexible programmable memory device which is not affected by the structure of the memory device.

[0006]

A memory device according to the present invention is, for example, as a control area for storing data access control information corresponding to each word which is an area for storing one data in a memory area. The memory transistor is provided for at least one bit.

[0007]

According to the present invention, when there is a write access to the memory area, each word is provided with a memory transistor for at least one bit as a control area. It is possible to control whether or not writing to the corresponding word is possible.

[0008]

【Example】

Example 1. Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a block diagram of a nonvolatile memory device according to the present invention, in which 1 denotes an electrically rewritable nonvolatile memory device. 2 is a memory array composed of words for storing data, 3 is an address input terminal, 4 is an address register, 5 is an address decoder, 7 is a control circuit, 8 is a data input / output unit,
Reference numeral 9 indicates a data input / output terminal, and 10 indicates an access control area for storing data access control information.

A series of addresses are assigned to each word in the memory cell array 2, and a word corresponding to a predetermined address can be accessed by inputting the address from the address input terminal 3 to the address register 4. It is supposed to be done. The address input from the address input terminal 3 to the address register 4 is held here, and after being decoded by the address decoder 5, the corresponding address in the memory cell array 2 is designated. The control circuit 7 determines whether it is an access for writing data or an access for reading data. When writing, the data input from the data input / output terminal 9 is passed through the data input / output unit 8. When the data is stored in the word and read out, the data stored in the word is output from the data input / output terminal 9 to the outside through the data input / output unit 8.

In the present invention, the memory cell array 2 is provided with an access control area 10 of at least 1 bit which is a memory transistor in each word, in addition to the word for storing data. Depending on whether the access control area 10 is in the written state or the erased state, it is possible to determine whether or not a predetermined word can be rewritten, and the resulting control signal is output to the control circuit 7.

A case where the access control area 10 is in the erased state will be described. When the access control area 10 is in the erased state, the accessed address points to a word in which specific data that does not require rewriting is stored. Then, the erased state of the access control area 10 becomes a control signal indicating to the control circuit 7 that it is a non-rewritable word, whereby the control circuit 7 writes data to the data input / output unit 8. Control not to.

The case where the access control area 10 is in the write state will be described. When the access control area 10 is in the write state, the accessed address points to a word in which specific data that does not require rewriting is stored. Then, the write state of the access control area 10 becomes a control signal indicating to the control circuit 7 that the word is a rewritable word, whereby the control circuit 7 controls the data input / output unit 8 to write data. To do.

Embodiment 2. In the first embodiment, the case in which the access control area is in the erased state is described as a non-rewritable word, and the case in which the access control area is in the written state is described as a rewritable word. It may be rewritable and may not be rewritable in the written state.

Example 3. In the first embodiment, the erasing / writing state of the access control area is used as the control signal to the control circuit, and the writing is actually controlled by the control signal. However, the present invention is not limited to this. The information in the control area may be directly used as a control signal for writing.

Example 4. In the first embodiment, the state of the access control information is the control signal for writing, but the access control information uses some character such as 1 in the writing state and 0 in the erasing state. May be. Alternatively, a flag may be used.

Embodiment 5. In the first embodiment, the access control area is provided in the word of the memory cell array, but the access control area need not be provided in close contact with the word as long as it corresponds to a predetermined word.

Embodiment 6. In the first embodiment, each word is provided with a 1-bit memory transistor as an access control area. However, the access control area need not be 1 bit, and may not be a memory transistor.

Example 7. In the first embodiment, the predetermined area for storing the data is a word, but it may be a byte, nibble, or any other area.

[0019]

As described above, according to the memory device of the present invention, in the memory area constituted by the predetermined area for storing the data, the access control information of the data is associated with the predetermined area. By providing the control area for storing the data, the area in which the specific data is stored is protected, so that inconvenience such as data destruction due to erroneous rewriting can be surely prevented. Further, since the comparison circuit is not required, the device becomes a space-saving device and highly flexible programming is possible.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a nonvolatile memory device according to an exemplary embodiment of the present invention.

FIG. 2 is a block diagram illustrating a conventional nonvolatile memory device.

[Explanation of symbols]

 1 non-volatile memory device 2 memory cell array 3 address input terminal 4 address register 5 address decoder 6 comparison circuit 7 control circuit 8 data input / output section 9 data input / output terminal 10 access control area

Claims (1)

[Claims] 1. A memory device comprising the following elements: (a) a memory area constituted by a predetermined area for storing data; (b) an access to data provided corresponding to the predetermined area. A control area that stores control information.