JPH11259357A - Semiconductor integrated device and nonvolatile memory writing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remarkably extend the life of a nonvolatile memory by writing back only changed data through the use of information of a storing means for control in the write in the nonvolatile memory. SOLUTION: An address register to control on which address area of a nonvolatile memory (flash memory) 10 a RAM is overlapped is provided and a selection signal of the RAM is controlled. The RAM is divided into a normal RAM area 12 and an emulation RAM 13 where the memory 10 and address areas are overlapped. An emulation area register 14 controls on which address area of the memory 10 the RAM 13 is overlapped. It is possible to overlap a specific area of the memory 10 on the RAM by using an address set to the register 14 and decoding a selection signal of the RAM 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor integrated device having a built-in nonvolatile memory formed on a semiconductor substrate and a writing method for the nonvolatile memory.

[0002]

2. Description of the Related Art Conventionally, in a semiconductor integrated device having a built-in flash memory block and a nonvolatile memory writing method, when reading / writing at high speed, writing is slow in a flash memory.
No. 186, Japanese Unexamined Patent Publication No. 8-129509, a high-speed SRAM is arranged to overlap an arbitrary address area of a flash memory, and
Above, data processing was performed and data processing was performed.

[0003]

Conventionally, the above configuration has been adopted, so that even if there is no change in the data stored in the SRAM, all data is written back to the flash memory, which is a major drawback in that the processing time increases. Had. or,
Flash memory has the disadvantage that its characteristics gradually deteriorate when repeated erasure and writing are repeated, but it also has the major disadvantage that it accelerates the deterioration of characteristics because erasing and writing are performed in areas where writing is unnecessary. Was.

[0004]

In order to achieve the above object,
In the semiconductor integrated device according to the first aspect, in a semiconductor integrated device having a built-in electrically erasable and erasable nonvolatile memory, an address can be arranged so as to overlap a partial area of the nonvolatile memory. A writable / readable memory having a means for arbitrarily setting the overlapping position, and a storage means for determining that writing has been performed on the writable / readable memory. Wherein the information in the storage means is used for control when writing to the nonvolatile memory.

According to a second aspect of the present invention, in a semiconductor integrated device having a nonvolatile memory which can be electrically written and erased, the semiconductor integrated device can be arranged so as to overlap an arbitrary address of the nonvolatile memory. A writable / readable memory for transferring data of the non-volatile memory in advance, and storage means for determining that writing has been performed on the writable / readable memory. When writing to the non-volatile memory, information in the storage means is used for control.

According to a third aspect of the present invention, in a semiconductor integrated device having a nonvolatile memory which can be electrically written and erased, the semiconductor integrated device can be arranged so as to overlap an arbitrary address of the nonvolatile memory. A writable / readable memory for transferring data of the nonvolatile memory in advance, and a storage area for determining that writing has been performed on the writable / readable memory; When writing data back to nonvolatile memory,
It is characterized in that only necessary data is written back based on the information in the storage area.

According to a fourth aspect of the present invention, there is provided a non-volatile memory writing system for writing data into a non-volatile memory which can be electrically written and erased. Using a writable / readable memory having means for arbitrarily setting a position to be superimposed, and writing to the writable / readable memory. Storage means for discriminating the non-volatile memory is provided, and when writing to the nonvolatile memory, information in the storage means is used for control.

According to a fifth aspect of the present invention, there is provided a nonvolatile memory writing system for writing data in a nonvolatile memory which is electrically writable and erasable. In order to determine that data has been written to the writable / readable memory, a writable / readable memory for transferring data of the non-volatile memory in advance can be used. Storage means of
When writing to the non-volatile memory, information in the storage means is used for control.

According to a sixth aspect of the present invention, there is provided a nonvolatile memory writing system for writing data in a nonvolatile memory which can be electrically written and erased. Using a writable and readable memory that can be arranged, providing a storage area for determining that writing has been performed on the writable and readable memory, and writing data back to the non-volatile memory In this case, only necessary data is written back based on the information in the storage area.

[0010]

In the semiconductor integrated device according to the first aspect, data that needs to be written can be identified and written to the nonvolatile memory.

In the semiconductor integrated device according to the second and third aspects, it is possible to identify whether the data transferred to the writable / readable memory in advance has been rewritten or not, and write it back to the nonvolatile memory.

In the nonvolatile memory writing method according to the fourth aspect, data that needs to be written can be identified and written to the nonvolatile memory.

In the nonvolatile memory writing method according to the fifth and sixth aspects, it is possible to identify whether data transferred to a writable / readable memory in advance has been rewritten, and write it back to the nonvolatile memory.

[0014]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a part of the configuration of an embodiment of a semiconductor integrated device and a nonvolatile memory writing system according to the present invention. An address register for controlling which address area of the nonvolatile memory (hereinafter referred to as a flash memory) 10 is overlapped with the RAM;
Control the selection signal. The RAM is divided into a normal RAM area 12 and an emulation RAM 13 in which the flash memory 10 and an address area are overlapped. In the present embodiment, the RAM is divided into two, but depending on the configuration, the RAM may be divided into two or more. The emulation area register 14 controls which address area of the flash memory overlaps the emulation RAM. The emulation RAM 1 uses the address set in the emulation area register.
By decoding the selection signal of No. 3, it is possible to overlap a specific area of the nonvolatile memory with the RAM.
An address for accessing the emulation RAM 13 is generated by the emulation area register 14. When the address is set in the emulation area register 14 by the user program, the CPU 11 sends the flash memory 10 along with the subroutine program.
Is transferred to the emulation RAM. The address of the data to be transferred on the flash memory 10 is determined by the address set in the emulation area register. When the CPU 11 uses the emulation RAM 13 after data transfer, access to the flash memory 10 is prohibited by the flash memory control circuit. When the CPU 11 changes the data in the emulation RAM 13 according to the user program, the address area of the emulation RAM 13 that has accessed the access page determination register 17 is written. When the user program needs data in another address area of the flash memory 10, a new address is written to the emulation area register 14 so that the data written in the emulation RAM 13 is rewritten to the flash memory 10 and a new data is written. Is transferred to the emulation RAM.

FIG. 2 is an image diagram of an address map in a state where the address areas of the flash memory 10 and the emulation RAM 13 overlap. In the present embodiment, 64 bytes of the address are treated as one page, which is the minimum block unit of erasure at the time of rewriting to the flash memory 10. In the flash memory, it is necessary to rewrite data included in the minimum block of erasure due to its configuration. In the present embodiment, the emulation RAM 13 stores the 64 By
It has eight pages in te units, and has an 8-bit access page determination register for determining whether or not the data of each page has been changed. In this embodiment, 64
Byte is treated as one page, emulation RA
Although 8 pages = 512 bytes are used for M, the size of the page and the capacity of the emulation RAM may be larger or smaller depending on the system configuration.

FIG. 3 shows the access page discriminating register 1.
FIG. 7 is a block diagram of FIG. It comprises an address comparator 20 and an 8-bit register 21 for storing the comparison result. The address area of the emulation RAM 13 set in the emulation area register 14 is also input to the address comparator 20 to detect which page of the emulation area corresponds to the address accessed by the CPU. If writing to the corresponding page is detected, the corresponding bit
Is set. The register has been initialized by a reset signal.

With the above configuration, it is possible to detect which page data of the emulation RAM 13 has been changed, and write only the changed page to the flash memory 10 again.

FIG. 4 is a block diagram showing a part of the configuration of another embodiment of a semiconductor integrated device and a nonvolatile memory writing system according to the present invention. An address register for controlling which area of the EEPROM 110 the RAM is overlaid is provided, and a RAM selection signal is controlled. The RAM is divided into a normal RAM area 12, an EEPROM 110, and an emulation RAM 113 in which a dress area is overlapped. In the present embodiment, the RAM is divided into two, but depending on the configuration, the RAM may be divided into two or more. The emulation RAM is replaced with the EEPROM.
The emulation area control register 114 controls which address area is overlapped. By decoding the selection signal of the emulation RAM 113 using the address set in the emulation area register, it is possible to overlap the RAM with a specific area of the nonvolatile memory. An address for accessing the emulation RAM 113 is generated by the emulation area control register 114. When an address is set in the emulation area control register 114 by the user program, the data of the corresponding address is first stored in E.
The reading process is performed from the EPROM. The processed data is written to the emulation RAM 113 and the access page determination bit is set. Thereafter, the address in which the access page determination bit is set is set to the emulation area control register and EEPRO so that the data read from the emulation RAM 113 is used.
It is controlled by the M control circuit 116. When data in another area of the EEPROM becomes necessary, a new address is written in the emulation area control register 114, so that the CPU 11 writes back only the data in which the access page discrimination bit is set to the EEPROM along with the subroutine program. When the writing to the EEPROM is completed, the access page determination bits are all cleared, and the corresponding address of the EEPROM can be read.

FIG. 5 is an image diagram of an address map in a state where the address areas of the EEPROM 110 and the emulation RAM 113 are overlapped. In this embodiment, one byte of data for one address is treated as one page, and EE is used.
This is the minimum erase block unit when rewriting the PROM 110. In this embodiment, the emulation RAM is used.
Reference numeral 113 denotes 256 pages of the page of 1 Byte unit, and an access page determination bit for determining whether data of each page is valid or invalid is stored in each page address by 1 bi.
t at a time. In this embodiment, one byte is treated as one page, and 256 pages = 256 bytes are used for the emulation RAM. However, the size of the page and the capacity of the emulation RAM may be larger or smaller depending on the system configuration. . For example, in a 4-bit microcomputer that handles data of 4 bits as a unit, 4 bits become a unit of one page, and 16 bits
In a 16-bit microcomputer that handles it as a unit, 16 bits are a unit of one page.

[0021]

As described above, according to the semiconductor integrated device of the first aspect, it is possible to determine whether or not a change has been made after using the data in the nonvolatile memory. It is possible to greatly extend the life of the non-volatile memory.

According to the semiconductor integrated device of the second and third aspects, the non-volatile memory whose writing speed is 10 to 30 times slower than the reading speed is used without significantly impairing the processing speed of the entire system. Things become possible.

According to the nonvolatile memory writing method of the present invention, it is possible to determine whether or not a change has been made after using the data in the nonvolatile memory. Can be greatly extended.

According to the non-volatile memory writing method according to the fifth and sixth aspects, the non-volatile memory whose writing speed is 10 to 30 times slower than the reading speed can be used without significantly impairing the processing speed of the entire system. It can be used.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a part of a configuration of a semiconductor integrated device and a nonvolatile memory writing system according to the present invention.

FIG. 2 is an address map of a flash memory and an emulation RAM according to the present invention.

FIG. 3 is a block diagram illustrating a configuration of an access page determination register according to the present invention.

FIG. 4 is a block diagram illustrating a part of another configuration of a semiconductor integrated device and a nonvolatile memory writing method according to the present invention.

FIG. 5 is an address map of an EEPROM and an emulation RAM according to the present invention.

[Explanation of symbols]

 1a Address bus 1b Address bus 1c Address bus 1d Address bus 1e Address bus 1f Address bus 1g Address bus 2a Data bus 2b Data bus 2c Data bus 2d Data bus 2e Data bus 2f Data bus 2g Data bus 2h Data bus 3 Flash memory control bus 4 Emulation RAM address / control bus 5 Emulation area address signal 10 Flash memory 11 CPU 12 RAM 13 Emulation RAM 14 Emulation area register 15 Flash memory control register 16 Flash memory control circuit 17 Access page discrimination register 20 Address comparator 21 Register 103 EEPROM control bus 104 Emulation RAM address / control bus 11 EEPROM 113 Emulation RAM 114 Emulation area control register 115 EEPROM control register 116 EEPROM control circuit 120 emulation RAM area 121 access page determination bit

Claims (6)

[Claims] In a semiconductor integrated device having an electrically writable and erasable nonvolatile memory, an address can be arranged so as to overlap a partial area of the nonvolatile memory. A memory for writing / reading having means for arbitrarily setting; and a storage means for determining whether writing has been performed on the memory for writing / reading, A semiconductor integrated device, wherein information in the storage means is used for control when writing to a memory. 2. A semiconductor integrated device having an electrically writable and erasable nonvolatile memory built therein, wherein the semiconductor integrated device can be arranged so as to overlap an arbitrary address of the nonvolatile memory.
A writable and readable memory for transferring data of the nonvolatile memory in advance;
A semiconductor device, comprising: storage means for judging that data has been written to a readable memory, and using information of the storage means for control when writing to the nonvolatile memory. Integrated device. 3. In a semiconductor integrated device having a nonvolatile memory which can be electrically written and erased, the nonvolatile memory can be arranged so as to overlap any address of the nonvolatile memory.
A writable / readable memory for transferring data of the nonvolatile memory in advance, and a storage area for determining that writing has been performed on the writable / readable memory; A semiconductor integrated device for writing back only necessary data based on the information in the storage area when writing data back to the volatile memory. 4. A non-volatile memory writing method for writing data in an electrically writable and erasable non-volatile memory, wherein an address can be arranged so as to overlap a partial area of the non-volatile memory. Using a writable / readable memory having a means for arbitrarily setting a position to be aligned, a storage means for determining that writing has been performed on the writable / readable memory is provided, A nonvolatile memory writing method, wherein information in the storage means is used for control when writing to the nonvolatile memory. 5. A nonvolatile memory writing method for writing data in an electrically writable and erasable nonvolatile memory, wherein the nonvolatile memory can be arranged so as to overlap an arbitrary address of the nonvolatile memory. Using a writable / readable memory for transferring data in advance, and providing storage means for determining that writing has been performed on the writable / readable memory; A non-volatile memory writing method, wherein information in the storage means is used for control when writing data to a memory. 6. A non-volatile memory writing method for writing data into an electrically writable and erasable non-volatile memory, wherein writing and reading can be performed so as to be arranged at an arbitrary address of the non-volatile memory. A storage area for determining that writing has been performed on the writable / readable memory using a simple memory, and based on the information in the storage area when writing data back to the nonvolatile memory. A non-volatile memory writing method characterized by writing back only the data necessary for the operation.