JPS63314011A - Limiter circuit - Google Patents

Abstract

PURPOSE:To easily set an upper and a lower clipping level, by controlling the base potential of an NPN transistor and a PNP transistor by one control signal. CONSTITUTION:The NPN transistor is used as a control transistor 50, and a control voltage generation part 70 is constituted of a variable resistor. By adjusting the volume of the variable resistor of the control voltage generation part 70 and setting the base potential of the control transistor 50 at VS, the potential lower by the potential between the base and the emitter of the NPN transistor 10 becomes the clipping level of L level. Also, the potential higher by the potential between the base and the emitter of the PNP transistor 11 becomes the clipping level of H level. In such a way, since the upper and the lower clipping levels can be decided only by the potential VS, it is possible to set the upper and the lower clipping levels simultaneously, which facilitates the setting of the clipping level.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a limiter circuit that clips an input signal waveform at fixed levels above and below.

A conventional limiter circuit is a waveform shaping circuit that clips an input signal waveform at fixed upper and lower levels and extracts an output signal with a fixed width.

A conventional limiter circuit is shown in FIG. As shown in FIG.
type transistor 11 and clip level setting section 20.2
Consists of 1. At this time, from the potential V a, the transistor 1
A potential that is lower by the base-emitter forward potential of the transistor 11 and a potential that is higher than the potential vb by the base-emitter forward potential of the transistor 11 serve as clip levels that clip the input signal waveform.

Below, the details of the operation of the circuit will be described using FIG. 4 showing the operation waveforms of each part. Further, to simplify the explanation, the base-emitter forward potential of the transistor 10.11 is assumed to be 0.7V.

First, when the amplitude level of the input signal P shown in FIG. 4D becomes high and exceeds the clip level cH shown in FIG.

The clip level CH is set by the clip level setting section 21'1.
7) 'EQVb Kj , determined by CH= V b
+0.7 (V).

Conversely, the amplitude level of the input signal P becomes lower, as shown in FIG.
When the voltage falls below the clip level CL shown in FIG. 1, the transistor 1o becomes conductive, so that current flows from the transistor 1o to the input side. The clip level CL is determined by the potential 8 of the clip level setting section 2o, and is
a-〇, 7 (V).

Therefore, input signals with a level higher than the clip level CH or lower than the clip level CL shown in the figure are clipped, and only signals with a level between CH and CL pass through the limiter circuit. As a result, the output signal becomes a signal with a constant amplitude like the signal Q shown in FIG.

Problems to be Solved by the Invention In such conventional circuits, the upper and lower clip levels are
Adjustment was difficult because the settings were made using two clip level setting sections that operated independently of each other, and as a result, variations in characteristics occurred.

This has become a major problem, especially when mass-producing devices that employ limiter circuits.

The present invention has been made in view of the above, and an object of the present invention is to provide a limiter circuit that simultaneously controls upper and lower clip levels using a single control signal.

Means for Solving the Problems In order to solve the above problems, the present invention makes the emitter of the first NPN transistor and the emitter of the second PNP transistor common, and the base of the first transistor is connected to the third transistor. The base of the second transistor is connected to the collector (or emitter) of the third transistor.
The third transistor is connected to the emitter (or collector) of the first transistor, the third transistor has a load on the collector and the emitter, controls the base potential of the third transistor, and is connected to the emitter (or collector) of the first transistor. A limiter circuit is constructed by taking out the output from the emitter of the second transistor.

Operation The present invention has the above-mentioned configuration, and can control NP with one control signal.
By simultaneously controlling the base potentials of the N-type transistor and the PNP-type transistor, it is possible to easily set the clip level above and below.

Embodiment An embodiment of the present invention is shown in FIG. In Figure 1, 5
0 is a control transistor, 61 and 62 are load resistors, and 70 is a control voltage generator. Further, the same components as in FIG. 3 are given the same numbers, and the details of their operations are omitted.

Hereinafter, using an example in which an NPN type transistor is used as the control transistor 60, the collector and emitter loads are the same, and the control voltage generating section 7o is configured with a variable resistor, FIG. 2 showing the operating waveforms of each section will be described. The operation of the circuit will be explained using

First, by adjusting the volume of the variable resistor of the control voltage generating section 7o and setting the base potential of the control transistor 6o to 8, the emitter potential becomes a constant potential 2. =V, -0.7
become. At this time, the potential (Vo-0,7)V, which is lower by the potential between the base and emitter of the transistor 10, becomes the L level clip level Cn.

On the other hand, if the emitter resistance of the control transistor 6o is R, a current of r=Vo/R flows through the collector and emitter of the control transistor 5o, so the collector potential is (V, -1xR=VC, -Vo) becomes. Therefore, the potential (V - V +0.7) CCO V, which is higher by the potential between the base and emitter of the transistor 11, becomes a clip level C crystal of H level.

As described above, the upper and lower clip levels are determined only by the control voltage v0, that is, the potential ■8.

At this time, the input signal P' is at the clip level C crystal.

It is clipped by CL and becomes an output signal Q'.

For example, if VCc=sV, V0=2V and -j, then
Since the clip level of the L level is 1.3 V and the clip level of the H level is 5-2+0.7==3.7 V, a signal of 2.4 V can be extracted.

-p Effects of the Invention As explained above, according to the present invention, upper and lower clip levels can be set at the same time with one control signal, so setting is easy, and as a result, when limiter circuits are manufactured in large quantities, This has a great practical effect because it can also reduce the variation in characteristics.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a limiter circuit according to an embodiment of the present invention, Fig. 2 is a waveform diagram of the main parts of the same circuit, Fig. 3 is a block diagram of a conventional limiter circuit, and Fig. 4 is a waveform diagram of the main parts thereof. It is. 10...NPN type transistor, 11...
...PNP type transistor, 60...Control transistor, 60.61...Load resistance. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
figure

Claims (1)

[Claims] The emitter of a first NPN type (or PNP type) transistor and the emitter of a second PNP type (or NPN type) transistor are commonly connected, and the base of the first transistor is connected to the emitter (or collector) of a third transistor. and the base of the second transistor is connected to the collector (or emitter) of a third transistor, the third transistor has a load on its collector and emitter, and the base potential of the third transistor is connected to A limiter circuit, wherein an output is taken out from a common connection point of the first and second transistors by controlling.