JPS63313014A - Reoutput pulse generating device - Google Patents

Abstract

PURPOSE:To reduce the delay of an output pulse to an input pulse by providing a pulse interruption control means which interrupts a microprocessor at the timing of the input pulse arriving right after a period clock. CONSTITUTION:A pulse output circuit 3 inputs an arithmetic result obtained by the microprocessor (muP) 2 and outputs pulses whose number corresponds to the result. A pulse interruption control means 4 inputs a synchronizing clock CLK and the input pulse Pi and interrupts the muP 2 at the timing of the input pulse arriving right after the period clock. Then the muP 2 receives the interruption pulse from the means 4 to read in the counted value of an input counter 1, perform specific arithmetic operation, and outputs the result to the circuit 3. Consequently, the circuit 3 outputs pulses P0 whose number is based upon the arithmetic result with slight delay from right after the CLK to the application of the input pulse Pi. Thus, a pulse generating device is obtained which outputs the pulses with little delay.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention provides a re-transmission pulse that counts input pulses, reads this counted value every measurement period, multiplies it by a rescale constant, and transmits the pulse again. This relates to a generator.

Generally, in pulse-generating flowmeters such as turbine flowmeters,
The number of pulses per unit volume of the passing fluid is not a well-defined value, such as 12.42 pulses per gram. Therefore, if you try to calculate the ta calculation flow rate by counting the number of pulses, you need to scale the input pulses from the pulse emitting type flowmeter and convert them into unit pulses, such as 10 pulses per IQ. A generator is required.

(Prior Art) FIG. 5 is a block diagram showing an example of a conventional retransmission pulse generator of this type. This device includes an input counter 1 that counts input pulses Pi, and a periodic clock CLK.
A microprocessor 2 receives the interrupt and reads the count /IN of the human counter 1 and performs scaling (coefficient k) calculations, and a pulse output circuit outputs a number of pulses according to the calculation results in the microprocessor 2. 3
It is made up of.

FIG. 6 is a time chart showing the operation of the device shown in FIG. (a) shows the periodic clock CLK that interrupts the microprocessor 2, and (b) shows the input pulses Pi counted by the input counter l. The microprocessor 2 reads the count @N of the input counter l at the interrupt timing of the periodic clock CLK shown in (a), performs calculation, and sends the calculation result to the pulse output circuit 3.
The pulse output circuit 3 outputs (
As shown in c), the pulses input in the previous cycle are output.

(Problem to be Solved by the Invention) In such conventional devices, pulses are output during the current cycle based on the calculation results for the previous cycle, and the output pulse is an average of the input pulse. This results in a delay corresponding to the processing cycle.

For this reason, when patch control is performed by receiving retransmission output pulses from this device, there is a problem that the accuracy of batch control deteriorates by the amount of delay.

The present invention was made in view of these problems, and
The purpose is to realize a retransmission pulse generator that can reduce the delay of output pulses with respect to input pulses.

(Means for solving the problem) FIG. 1 is a basic configuration block diagram of the present invention. In FIG. 1, 1 is an input counter that counts input pulses Pi;
2 is a microprocessor that calculates the number of retransmission pulses by calculating a coefficient on the number of received pulses counted by the input counter l; 3 is a retransmission pulse output circuit that outputs a number of pulses according to the calculation result of the microprocessor 2; , 4 is a pulse interrupt control means which inputs a periodic clock CLK and an input pulse Pi and interrupts the microprocessor 2 at the timing of the input pulse Pi which comes immediately after the periodic clock CLK.

(Function) The microprocessor 2 reads the count value from the input counter l at the interrupt timing from the pulse interrupt control means 4, calculates a retransmission pulse, and outputs the calculation result to the retransmission pulse output circuit. .

(Embodiment) FIG. 2 is a configuration block diagram of an embodiment of the apparatus of the present invention. In the figure, the same parts as those in FIG. 2 are designated by the same reference numerals.

The pulse interrupt control means 4 includes a first flip-flop F1 to which +5V is applied to the Dt4 terminal, a periodic clock CLK is applied to the CKi terminal, and outputs a pulse interrupt status PST that rises in synchronization with CL; Pulse interrupt status PST is applied to the D terminal, and input pulse Pi is applied to the CKi pin.
is applied, and the input pulse Pi entering immediately after the periodic clock
and a second flip-flop F2 that outputs an interrupt pulse WP to the microprocessor 2. In addition, 1. Each second flip-flop F1. F2 CL
An interrupt clear (fi number) output from the microprocessor 2 is applied to the @ child.

The operation of the device configured in this way will be described next.

FIG. 3 is a time chart showing an example of the operation, and FIG. 4 is a flowchart of interrupt processing executed by the microprocessor 2 in response to an interrupt pulse.

FIG. 3(a) shows a periodic clock CLK, and the first flip-flop F1 outputs an enabled pulse interrupt status signal PST in synchronization with this periodic clock CLK as shown in FIG. 3(b). This signal is applied to the D terminal of the second flip-flop F2, and the second flip-flop F2 operates at a timing when an input pulse Pi (this is shown in (C)) immediately after the periodic clock CLK is applied. Then, an interrupt pulse WP as shown in (d) is output.

When the microprocessor 2 receives this interrupt pulse WP, it executes the interrupt processing as shown in the flowchart of FIG. 4 at the timing shown in (e). That is, it first outputs an interrupt clear signal and 1
．． Each second flip-flop F1. Clear F2 (step l). Next, read the count value N of input counter 1 and calculate the retransmission pulse number No. For example, multiply the input pulse number by the scaling coefficient k (in this example, = 1/3) (No = k - N). (Steps 2 and 3)
). Next, the calculation result (No) is output to the pulse output circuit 3 and the process ends (step 4).

At the same time as the pulse output circuit 3 receives this calculation result,
As shown in (f), the number of retransmission pulses Po corresponding to the calculation result is output.

With the above-described operation, the re-transmission pulse output circuit 3 outputs the signal from the periodic clock CLK with only a slight delay (the time during which the interrupt status is enabled) until the input pulse Pi is applied. It is possible to output a number of retransmission pulses Po based on the calculation result.

In the above description, the calculation in the microprocessor 2 is simply a calculation of multiplying by a scaling coefficient k, but other calculations such as a temperature correction calculation may also be performed.

(Effects of the Invention) As described in detail above, according to the present invention, the number of retransmission pulses calculated based on the number of input pulses read from the manual counter can be outputted without delay. A re-transmission pulse generator is available.

Generally, in a batch sequence that controls the flow rate, the flow rate in the lower limit region is 100% higher than the flow rate in the upper limit region.
It decreases by about 0. Therefore, the output pulse from the pulse flowmeter is, for example, 1 kllz in the upper limit region, but decreases to about 10011z (10 ms) in the lower limit region. For example, if the periodic clock CLK is selected to be 5 ms, a plurality of pulses will be input in the upper limit region, but in the lower limit region, either one pulse will come in one cycle or not.

According to the device of the present invention, a plurality of pulses are input in one cycle in the upper limit region, and the output of the retransmission pulse is delayed somewhat, but the delay in the output of the retransmission pulse in the lower limit region is almost eliminated.

In batch sequences, delays in the upper limit range are not so much of a problem, but patching accuracy in the lower limit range is important, and the device of the present invention has a particularly practical effect when applied to batch sequences. .

[Brief explanation of the drawing]

FIG. 1 is a basic configuration block diagram of the present invention, FIG. 2 is a configuration block diagram of an embodiment of the device of the present invention, FIG. 3 is a time chart showing an example of the operation, and FIG. 4 is a diagram showing the operation performed by the microprocessor. Flowchart showing operation of interrupt processing, fifth
The figure is a block diagram showing an example of a conventional device, and FIG. 6 is a time chart showing the operation of the device shown in FIG. 1... Input counter, 2... Microprocessor,
3... Re-transmission pulse output circuit, 4... Pulse interrupt control means. ) I V Human power pulse Re-transmission pulse output Pin l'fiJtrL 2 Figure

Claims (1)

[Claims] An input counter that counts the number of input pulses, a microprocessor that performs a predetermined calculation on the number of received pulses counted by this input counter to determine the number of retransmission pulses, and a microprocessor that calculates the number of retransmission pulses, and a retransmission pulse output circuit that inputs and outputs a number of retransmission pulses according to the calculation result; a retransmission pulse output circuit that inputs a periodic clock and the input pulse; and interrupts the microprocessor at the timing of the input pulse that comes immediately after the periodic clock; pulse interrupt control means, the microprocessor receives an interrupt pulse from the pulse interrupt control means, reads the counted value of the input counter, performs a predetermined calculation, and outputs the calculation result to a re-transmission pulse output circuit. 1. A retransmission pulse generator characterized in that the retransmission pulse generator performs the following operations.