JPS63311436A - Program patch system - Google Patents

Program patch system

Info

Publication number
JPS63311436A
JPS63311436A JP62147672A JP14767287A JPS63311436A JP S63311436 A JPS63311436 A JP S63311436A JP 62147672 A JP62147672 A JP 62147672A JP 14767287 A JP14767287 A JP 14767287A JP S63311436 A JPS63311436 A JP S63311436A
Authority
JP
Japan
Prior art keywords
program
module
rom
nonvolatile memory
patch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62147672A
Other languages
Japanese (ja)
Inventor
Toshiyuki Okui
奥井　利幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62147672A priority Critical patent/JPS63311436A/en
Publication of JPS63311436A publication Critical patent/JPS63311436A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a patch enable program by combining a ROM with a nonvolatile memory. CONSTITUTION:A program main body is written into a ROM 1 and the head address of each module is written into a nonvolatile memory 2. When a program is branched into a module 1a, the program jumps to a head address A of the module 1a by an instruction JMP-X and by reference to the memory 2. So is with a module 1b. When a patch program 2a is incorporated instead of the module 1a, a jump address referred to by the instruction JMP-X designates a head address Y of the program 2a written into the memory 2. Then the program jumps to a head address B of the module 1b set on the ROM 1 by an instruction JMP-B, for example, after execution of the program 2a. In other words, the program 2a is carried out in place of the module 1a and then the module 1b can be carried out. Thus it is possible to change a program with no replacement of the ROM 1.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子計算機のプログラムパッチ方式に関し、特
にＲＯＭに書き込まれたプログラムのパッチに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program patching method for an electronic computer, and particularly to patching a program written in a ROM.

〔従来の技術〕[Conventional technology]

従来、ＲＯＭに書き込まれたプログラムは書き換えるこ
とができないので、そのプログラムを修正するには書き
込まれたメモリを交換する必要があった。そしてどうし
ても交換したくない場合には不揮発メモリに書き込む必
要があった。Conventionally, a program written in a ROM cannot be rewritten, so in order to modify the program, it was necessary to replace the memory in which it was written. And if you really don't want to replace it, you need to write it into nonvolatile memory.

ところでＲＯＭを交換する場合には交換用ＲＯＭを用意
する必要があり、さらにＲＯＭを交換できるように装置
本体を作る必要がある。また、不揮発メモリは高価であ
るという欠点がある。。By the way, when replacing the ROM, it is necessary to prepare a replacement ROM, and furthermore, it is necessary to make the main body of the device so that the ROM can be replaced. Another drawback of nonvolatile memory is that it is expensive. .

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明が解決しよようとする問題点、換言すれば本発明
の目的はＲＯＭと不揮発メモリとを組合せて使用するよ
うにして上記の欠点を改善したプログラムパッチ方式を
提供することにある。The problem to be solved by the present invention, in other words, the purpose of the present invention is to provide a program patching method that uses a combination of ROM and nonvolatile memory to improve the above-mentioned drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のプログラムパ・ソチ方式は、プログラム本体を
格納したＲＯＭと、前記プログラム本体を細分化した各
モジュールの先頭番地を格納した第−の不揮発メモリと
、パッチプログラムを格納した第二の不揮発メモリとを
有し、前記第一の不揮発メモリに格納したバッチを行な
うモジュールの先頭番地の飛び先番地を前記第二の不揮
発メモリに格納した前記パッチプログラムの先頭番地と
するようにして実現される。The program path system of the present invention includes a ROM that stores a program main body, a second nonvolatile memory that stores the starting address of each module obtained by subdividing the program main body, and a second nonvolatile memory that stores a patch program. and the jump address of the starting address of the module that executes the batch stored in the first non-volatile memory is set as the starting address of the patch program stored in the second non-volatile memory.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例を示すプログラム説明図であ
る。同図（ａ）においてプログラム本体はＲＯＭ１に書
き込まれ、各モジュールの先頭番地が不揮発メモリ２に
書き込まれている。モジュール１ａに分枝するときプロ
グラムは命令ＪＭＰ−Ｘによって不揮発メモリ２を参照
してモジュール１ａの先頭番地Ａにジャンプする。モジ
ュール１ｂについても同様である。FIG. 1 is a program explanatory diagram showing an embodiment of the present invention. In FIG. 2A, the main body of the program is written in the ROM 1, and the starting address of each module is written in the nonvolatile memory 2. When branching to module 1a, the program refers to non-volatile memory 2 and jumps to the start address A of module 1a by command JMP-X. The same applies to module 1b.

第１図（ｂ）は上記のモジュール１ａのかわりにパッチ
プログラム２ａを組込む方法を示している。このとき命
令ＪＭＰ−Ｘが参照する飛び先番地は不揮発メモリ２上
に書き込んだパッチプログラム２ａの先頭番地Ｙを指定
する。そしてパッチプログラム２ａを実行後、たとえば
命令Ｊ　Ｍ　Ｐ　−ＢによってＲＯＭ１上のモジュール
１ｂの先頭番地Ｂにジャンプする。すなわちモジュール
１ａのかわりにパッチプログラム２ａを実行し、続いて
モジュール１ｂを実行することができる。FIG. 1(b) shows a method of incorporating a patch program 2a in place of the above module 1a. At this time, the jump address referred to by the instruction JMP-X specifies the starting address Y of the patch program 2a written on the nonvolatile memory 2. After executing the patch program 2a, the program jumps to the start address B of the module 1b on the ROM 1 by, for example, an instruction JMP-B. That is, the patch program 2a can be executed instead of the module 1a, and then the module 1b can be executed.

このようにしてＲＯＭＩを入れ換えることなくプログラ
ムを変更することができる。In this way, the program can be changed without replacing the ROMI.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明はＲＯＭと不揮発メモリを組
み合わせることにより、パッチ可能なプログラムを組む
ことができる。As explained above, the present invention allows patchable programs to be created by combining ROM and nonvolatile memory.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を示すプログラム説明図であ
り、同図（ａ）はバッチ前の状態、同図（ｂ）はパッチ
後の状態をそれぞれ示す。 １・・・ＲＯＭ、１ａ・１ｂ・・・プログラム説明図−
＄　ｌ　薗に） ’ｔ’ｂ）’−ジュール ギ　１　菌Ｃｂ） ｚｔＬ：ノマッチブロヅヲムFIG. 1 is a program explanatory diagram showing an embodiment of the present invention, in which (a) shows the state before batching, and (b) shows the state after patching. 1...ROM, 1a/1b...Program explanatory diagram-
$l Sononi) 't'b)'-Jurgi 1 Bacteria Cb) ztL: No Match Brozuwom

Claims (1)

【特許請求の範囲】[Claims] プログラム本体を格納したＲＯＭと、前記プログラム本
体を細分化した各モジュールの先頭番地を格納した第一
の不揮発メモリと、パッチプログラムを格納した第二の
不揮発メモリとを有し、前記第一の不揮発メモリに格納
したパッチを行なうモジュールの先頭番地の飛び先番地
を前記第二の不揮発メモリに格納した前記パッチプログ
ラムの先頭番地とすることを特徴とするプロブラムパッ
チ方式。It has a ROM that stores a program main body, a first nonvolatile memory that stores the starting address of each module obtained by subdividing the program main body, and a second nonvolatile memory that stores a patch program, and the first nonvolatile memory stores a patch program. A program patch method characterized in that a jump address of a starting address of a module that performs patching stored in a memory is set as a starting address of the patch program stored in the second nonvolatile memory.
JP62147672A 1987-06-12 1987-06-12 Program patch system Pending JPS63311436A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62147672A JPS63311436A (en) 1987-06-12 1987-06-12 Program patch system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62147672A JPS63311436A (en) 1987-06-12 1987-06-12 Program patch system

Publications (1)

Publication Number Publication Date
JPS63311436A true JPS63311436A (en) 1988-12-20

Family

ID=15435666

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62147672A Pending JPS63311436A (en) 1987-06-12 1987-06-12 Program patch system

Country Status (1)

Country Link
JP (1) JPS63311436A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859855B1 (en) 1999-08-19 2005-02-22 Murata Manufacturing Co., Ltd. Data processing device
US7002853B2 (en) 1999-02-26 2006-02-21 Renesas Technology Corp. Memory card having a buffer memory for storing testing instruction
JP2008102761A (en) * 2006-10-19 2008-05-01 Mitsubishi Electric Corp Method for updating embedded firmware

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7002853B2 (en) 1999-02-26 2006-02-21 Renesas Technology Corp. Memory card having a buffer memory for storing testing instruction
US7292480B2 (en) 1999-02-26 2007-11-06 Renesas Technology Corp. Memory card having buffer memory for storing testing instruction
US7440337B2 (en) 1999-02-26 2008-10-21 Renesas Technology Corp. Nonvolatile semiconductor memory apparatus having buffer memory for storing a program and buffering work data
US6859855B1 (en) 1999-08-19 2005-02-22 Murata Manufacturing Co., Ltd. Data processing device
JP2008102761A (en) * 2006-10-19 2008-05-01 Mitsubishi Electric Corp Method for updating embedded firmware

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