JPS6331112B2 - - Google Patents
Info
- Publication number
- JPS6331112B2 JPS6331112B2 JP55180941A JP18094180A JPS6331112B2 JP S6331112 B2 JPS6331112 B2 JP S6331112B2 JP 55180941 A JP55180941 A JP 55180941A JP 18094180 A JP18094180 A JP 18094180A JP S6331112 B2 JPS6331112 B2 JP S6331112B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- gate
- layer
- conductive layer
- conductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
- H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
- H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
Landscapes
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55180941A JPS57104262A (en) | 1980-12-20 | 1980-12-20 | Manufacture of semiconductor memory storage |
| US06/320,936 US4531203A (en) | 1980-12-20 | 1981-11-13 | Semiconductor memory device and method for manufacturing the same |
| US06/721,431 US4612212A (en) | 1980-12-20 | 1985-04-09 | Method for manufacturing E2 PROM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55180941A JPS57104262A (en) | 1980-12-20 | 1980-12-20 | Manufacture of semiconductor memory storage |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57104262A JPS57104262A (en) | 1982-06-29 |
| JPS6331112B2 true JPS6331112B2 (enExample) | 1988-06-22 |
Family
ID=16091948
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55180941A Granted JPS57104262A (en) | 1980-12-20 | 1980-12-20 | Manufacture of semiconductor memory storage |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57104262A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0644628B2 (ja) * | 1986-06-30 | 1994-06-08 | 株式会社東芝 | 不揮発性半導体記憶装置の製造方法 |
-
1980
- 1980-12-20 JP JP55180941A patent/JPS57104262A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57104262A (en) | 1982-06-29 |
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