JPS63308933A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the resistance to soft-error caused by alpha-ray, by forming a trench reaching an amorphous layer, on the peripheral part of an element forming region, after an anti-oxidizing mask material is formed on the substrate main surface having an amorphous layer in a specified depth, and oxidizing the substrate surface facing the amorphous layer and the trench. CONSTITUTION:By implanting high energy boron ion 5 into a silicon substrate 1, an amorphous layer 4 having high impurity concentration is formed in the silicon substrate 1. A silicon oxide film 10 and a silicon nitride film 7 are formed on the silicon substrate 1 surface, and a trench 6 reaching the amorphous layer 4 is formed. Thereafter, when thermal oxidation is performed, the amorphous layer 4 is preferentially oxidized, and then the surface region of the substrate 1 facing the trench 6 is oxidized. When the silicon nitride film 7 and the silicon oxide film 10 are eliminated, a silicon oxide film 2 is formed, in which the parts between the silicon substrate 1 and the element regions 3 and the parts between neighboring element regions 3 are completely isolated insulatively. Thereby, the possibility in the occurrence of soft-error caused by alpha-ray can be decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to insulation isolation between elements in a semiconductor device.

[Prior Art] FIGS. 2(a), 2(b), and 2(c) are cross-sectional views showing a process of insulating and separating each element of a conventional semiconductor device.
In the figure, 1 is a silicon substrate, 7 is a silicon nitride film, and 8 is a silicon substrate.
is LOG OS (Local Oxldation
of' 5ilicon), 9 is an ion implantation layer, 1
1 is an ion beam.

Next, the operation will be explained. As shown in FIG. 2(a), a silicon nitride film 7 is formed on the surface of a silicon substrate 1, and after patterning and etching are performed on the regions to be insulated, a boron ion beam 11 is applied to prevent reversal. inject. FIG. 2(b) shows that an ion-implanted layer 9 is formed by the ion beam 11, and then thermal oxidation is performed using the silicon nitride film 7 as a mask to form an oxide film LOGO 8.
8 is formed. After this, silicon nitride film 7
By removing , the element region 3 is formed insulated and isolated by the LOCO 38 as shown in FIG. 2(c).

[Problems to be solved by the invention] The insulation isolation method between each element in a conventional semiconductor device is as follows:
As described above, each element to be formed and the substrate 1 are not completely insulated and separated, and are connected to adjacent elements via the substrate 1. For this reason, elements may capture electrons or holes generated in the substrate 1 by alpha rays inside and outside the substrate 1, causing soft errors, and parasitic thyristors are formed between adjacent elements of the CMOS structure, resulting in surge voltage. Condition in which the latch cannot be latched (
There were problems such as latch-up.

This invention was made to solve the above-mentioned problems. It electrically isolates the element region and the substrate and between each element region, has high resistance to soft errors caused by alpha rays, and An object of the present invention is to obtain a method for manufacturing a semiconductor device that does not cause latch-up (latch-up-free).

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention includes forming an amorphous layer inside a substrate at a predetermined depth from the main surface and preventing oxidation of the main surface of the substrate. After forming a mask material on the main surface of the substrate and forming a trench reaching the amorphous layer around the element region of the substrate, the surface of the substrate facing the amorphous layer and the formed trench is oxidized to form a mask material between the substrate and the element region and An insulating film is formed to electrically isolate each element region.

[Function] The method for manufacturing a semiconductor device according to the present invention includes forming an amorphous layer inside the substrate at a predetermined depth from the main surface;
After forming a mask material on the main surface of the substrate to prevent oxidation of the main surface of the substrate, a trench reaching the amorphous layer is formed around the element formation region, and the surface of the substrate facing the amorphous layer and the trench is oxidized. Since the amorphous layer is preferentially oxidized and the substrate surface facing the trench is oxidized at the same time, an insulating film can be formed that electrically isolates the substrate and the element region and between each element region.
Electrons or holes generated in the substrate by α rays are prevented from being collected in the element region, and parasitic thyristors are not formed, making it possible to manufacture latch-up-free semiconductor devices with a reduced probability of soft errors. .

[Embodiments of the invention] Embodiments of the present invention will be described below with reference to the drawings.

1(a), (b) and (c) are cross-sectional views of steps showing an embodiment of the present invention, in which 1 is a silicon substrate, 2 is a silicon oxide film, 3 is an element region, 4 is an amorphous layer, 5
1 is a high-energy ion beam, 6 is a trench, 7 is a silicon nitride film, and 10 is a silicon oxide film.

Next, the operation will be explained. FIG. 1(a) shows that by implanting high-energy boron ions 5 into a silicon substrate 1, an amorphous material with a high impurity concentration is formed inside the silicon substrate 1 with a distribution as shown in the left diagram of FIG. 1(a). Indicates that a layer is formed. In addition to boron, the types of ions include arsenic,
The amorphous layer 4 may be made of either phosphorus or antimony, and the depth from the surface of the silicon substrate 1 to be formed is determined by the type of ions to be implanted and the implantation energy, and is generally from submicron to several microns. Also, the implantation energy is generally 0. 5 MeV to several MeV
It is. Next, as shown in FIG. 1(b), a silicon oxide film 10 and a silicon nitride film 7 are formed on the surface of the silicon substrate 1, and furthermore, an L-wrench 6 reaching the amorphous layer 4 is formed. This trench 6 is formed so as to surround the element region 3 when viewed from above the silicon substrate 1. After that, when thermal oxidation is performed, the amorphous layer 4 has a high concentration of implanted impurities and is made amorphous.
The oxidation rate is about one order of magnitude higher than that of the surface area of the silicon substrate 1 facing the trench 6, and the amorphous layer 4 is oxidized preferentially, followed by the surface area of the silicon substrate 1 facing the trench 6. is oxidized. After that, when the silicon nitride film 7 and the silicon oxide film 10 are removed, the first
As shown in Figure (C), a silicon oxide film 2 is formed in which the silicon substrate 1, the element region 3, and the adjacent element regions 3 are completely insulated and isolated. This prevents electrons or holes generated in the silicon substrate 1 by α rays inside and outside the silicon substrate 1 from being collected in the element region 3, and therefore, it is possible to reduce the probability of soft errors occurring. Since parasitic silicon risks, which are formed by conventional methods, are not formed, it is possible to manufacture latch-up-free semiconductor devices.

[Effects of the Invention] As described above, according to the present invention, an amorphous layer is formed inside the substrate at a predetermined depth from the main surface, and a mask + 4 materials for preventing oxidation of the main surface of the substrate is formed on the main surface of the substrate. After forming a trench, a trench reaching the amorphous layer is formed around the element formation region, and the substrate surface facing the amorphous layer and trench is oxidized to create electrical insulation between the substrate and the element region and between each element region. It is possible to manufacture a semiconductor device that can be separated, has high resistance to soft errors caused by alpha rays, is free from latch-up, and therefore has high operational reliability.

[Brief explanation of the drawing]

FIGS. 1(a), (b), and (c) are cross-sectional views of steps showing an embodiment of the present invention, and FIGS. It is a sectional view of the process shown. In the figure, 1 is a silicon substrate, 2 is a silicon oxide film,
3 is an element region, 4 is an amorphous layer, 5 is a high-energy ion beam, 6 is a trench, 7 is a silicon nitride film, 8 is a LOCO 8, 9 is an ion implantation layer, 10 is a silicon oxide film, and 11 is an ion beam. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (6)

[Claims] (1) preparing a substrate on which an amorphous layer is formed at a predetermined depth from the main surface; and forming a mask material on the main surface of the substrate to prevent oxidation of the main surface of the substrate. , forming a trench around the element region of the substrate that reaches the amorphous layer; and oxidizing the surface of the substrate facing the amorphous layer and the trench to form an insulating film, and forming an insulating film between the substrate and the element. A method for manufacturing a semiconductor device, including the step of electrically insulating and isolating between regions and between each of the element regions using the insulating film. (2) The step of preparing the substrate includes the step of forming an amorphous layer at a predetermined depth from the main surface by implanting high-energy ions. A method for manufacturing a semiconductor device. (3) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the substrate is silicon. (4) The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the mask material is a silicon nitride film or a silicon nitride film and a silicon oxide. (5) The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein the surface of the substrate facing the amorphous layer and the trench is thermally oxidized. (6) The method for manufacturing a semiconductor device according to claim 2, wherein the ions are boron, arsenic, phosphorus, or antimony ions.