JPS63305589A - Forming method for printed wiring part - Google Patents

Forming method for printed wiring part

Info

Publication number
JPS63305589A
JPS63305589A JP14125687A JP14125687A JPS63305589A JP S63305589 A JPS63305589 A JP S63305589A JP 14125687 A JP14125687 A JP 14125687A JP 14125687 A JP14125687 A JP 14125687A JP S63305589 A JPS63305589 A JP S63305589A
Authority
JP
Japan
Prior art keywords
photoresist layer
etching
layer
conductive foil
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14125687A
Other languages
Japanese (ja)
Inventor
Kunihiko Tokura
邦彦 戸倉
Kenji Osawa
健治 大沢
Yoshio Watanabe
渡辺 喜夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP14125687A priority Critical patent/JPS63305589A/en
Publication of JPS63305589A publication Critical patent/JPS63305589A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process

Abstract

PURPOSE:To make a wiring part of a desired pattern formable uniformly and in high density, by forming a specific photoresist layer as well as a photoresist layer formed in a desired wiring pattern and next performing an etching process when a conductive foil is etched in a wiring pattern shape. CONSTITUTION:A first photoresist layer 3 with a desired wiring pattern is formed on a conductive foil 2 stuck on an insulation layer 1, and a second photoresist layer 4 is formed in the vicinity of the layer 3 part which corresponds to the conductive film 2 and is subject to operation of large side etching. A nearly patterned conductive foil 5 corresponding to the layer 3, and a conductive foil 6 corresponding to the layer 4, are formed during formation of this etching pattern, and the conductive foil 6 is provided with the operation of large side etching so as to become thinner. As the etching process proceeds more, the foil 6 disappears, and a wiring part 7 with a desired wiring pattern can be obtained almost at the same time. Hence etching operation of an unavailingly large side can be avoided to uniformly form a high density printed wiring part 7.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は印刷配線部の形成方法に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a method of forming a printed wiring section.

〔発明の概要〕[Summary of the invention]

本発明は印刷配線部の形成方法において、導体箔を配線
パターン状にエツチングする際に、所望の配線パターン
状に形成されたフォトレジスト層以外に特定のフォトレ
ジスト層を形成した後にエツチングを行うことにより、 所望のパターン状の配線部を高密度にかつ均一に形成す
ることができるようにしたものである。
The present invention provides a method for forming a printed wiring section in which, when etching a conductive foil into a wiring pattern, etching is performed after forming a specific photoresist layer in addition to the photoresist layer formed in the desired wiring pattern. This makes it possible to form wiring portions in a desired pattern with high density and uniformity.

〔従来の技術〕[Conventional technology]

種々の印刷配線部を有する電子機器の小型・軽量化に伴
い、印刷配線部の高密度化に対する要求が一層高まって
いる。この印刷配線部は例えばシートコイルの配線部、
IC部品の外部への引出し電極配線部、その他の印刷配
線板の配線部などとして形成される。印刷配線部は一般
に導体箔を所望の高密度パターンにエツチング処理して
形成される。導体箔を高密度パターンにエツチングする
場合、通常、サイドエツチングを抑え、厚み方向ヘのエ
ツチングスピードを上げるために、例えば、エツチング
液のスプレー圧力を上げて打力を強める、エツチング液
を対象物に長時間当てる、新鮮なエツチング液を絶えず
与える、などの方法が行われている。
2. Description of the Related Art As electronic devices having various printed wiring sections become smaller and lighter, there is an increasing demand for higher density printed wiring sections. This printed wiring part is, for example, the wiring part of a sheet coil,
It is formed as an external lead electrode wiring part of an IC component, a wiring part of other printed wiring boards, etc. Printed wiring is generally formed by etching a conductive foil into a desired high-density pattern. When etching conductive foil into a high-density pattern, in order to suppress side etching and increase the etching speed in the thickness direction, for example, the spray pressure of the etching solution is increased to increase the impact force, or the etching solution is applied to the target object. Methods such as applying it for a long time and constantly applying fresh etching solution are used.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前記従来の方法のいずれによっても均一な高密度印刷配
線部を形成することは極めて困難である。
It is extremely difficult to form uniform high-density printed wiring by any of the conventional methods.

例えば、第4図へに示す通り、絶縁層1に接着された銅
箔2にシートコイル用の高密度配線パターンを有するフ
ォトレジスト層8を形成すると、最外側(図面で右端)
にあるフォトレジスト層8の外側には、各フォトレジス
ト層8間の空間に比べて大きな空間が存在する。銅箔2
をエツチング処理すると、右端のフォトレジスト層8以
外のフォトレジスト層8に対応する銅箔部分は均一な配
線部7に形成されるが、右端のフォトレジスト層8に対
応する銅箔部分は著しいサイドエツチング作用を右側か
ら受けるため、前記配線部5に比べて細まった、異常サ
イドエツチング部10を有する配線部9に形成される。
For example, as shown in FIG. 4, when a photoresist layer 8 having a high-density wiring pattern for a sheet coil is formed on a copper foil 2 bonded to an insulating layer 1, the outermost (right end in the drawing)
There is a large space outside the photoresist layer 8 located at the photoresist layer 8 compared to the space between each photoresist layer 8 . copper foil 2
When etching is performed, the copper foil portions corresponding to the photoresist layers 8 other than the rightmost photoresist layer 8 are formed into uniform wiring portions 7, but the copper foil portions corresponding to the rightmost photoresist layer 8 have significant side edges. Since the etching action is applied from the right side, the wiring part 9 is formed to have an abnormal side etching part 10 which is narrower than the wiring part 5.

したがって、こうして得られた印刷配線部は同じパター
ンルールによるひき回しかむずかしくなるという問題を
生じる。
Therefore, a problem arises in that it is difficult to route the printed wiring section obtained in this way according to the same pattern rule.

本発明の目的は均一な印刷配線部、特に、高密度印刷配
線部の形成方法を提供することである。
It is an object of the present invention to provide a method for forming uniform printed wiring, particularly high density printed wiring.

〔問題点を解決するための手段〕[Means for solving problems]

前記目的は、本発明により、絶縁層に接着された導体箔
上にフォトレジスト層を形成し、導体箔をエツチングし
、フォトレジスト層を除去することから成る印刷配線部
の形成方法において、前記フォトレジスト層が、所望の
配線パターン状に形成された第1フォトレジスト層と、
大きなサイドエツチング作用を受け易い導体箔部分に対
応する第1フォトレジスト層部分の近傍に形成された第
2フォトレジスト層とから成ることを特徴とする印刷配
線部の形成方法によって達成される。
The object of the present invention is to provide a method for forming a printed wiring part comprising forming a photoresist layer on a conductive foil adhered to an insulating layer, etching the conductive foil, and removing the photoresist layer. a first photoresist layer in which the resist layer is formed in a desired wiring pattern;
This is achieved by a method of forming a printed wiring section characterized in that the second photoresist layer is formed in the vicinity of a first photoresist layer section corresponding to a conductor foil section that is susceptible to a large side etching effect.

大きなサイドエツチング作用を受け易い導体箔部分とは
、例えば、シートコイルの高密度配線パターンにおける
最外側の配線部及びrc部品の外部への引出し高密度電
極配線部の最外側配線部分のように、各配線部間の空間
より大きい空間に隣接した導体箔部分をいう。
The conductor foil portions that are susceptible to large side etching effects include, for example, the outermost wiring portion in the high-density wiring pattern of a sheet coil and the outermost wiring portion of the high-density electrode wiring portion drawn to the outside of an RC component. Refers to the part of the conductor foil adjacent to the space larger than the space between each wiring part.

第2フォトレジスト層は、第1フォトレジスト層に対応
する所望配線パターンの導体箔部分がエツチング処理に
よって形成された時点で、第2フオトレジストaに対応
する導体箔部分がエツチング処理によって消滅するよう
に形成するのが好ましい。即ち、第2フォトレジスト層
に対応する導体箔部分はエツチング処理の間、ダミーパ
ターンとして存在し、不都合に大きなサイドエツチング
作用を受け易い導体箔部分を保護する役割を果たす。
The second photoresist layer is formed such that the conductor foil portion corresponding to the second photoresist a disappears by the etching process when the conductor foil portion of the desired wiring pattern corresponding to the first photoresist layer is formed by the etching process. It is preferable to form the That is, the conductor foil portion corresponding to the second photoresist layer exists as a dummy pattern during the etching process, serving to protect the conductor foil portion that is disadvantageously susceptible to large side etching effects.

第2フォトレジスト層は第1フォトレジスト層の近傍に
、好ましくは各第1フォトレジスト層間の距離に等しい
距離を置いて形成される。
A second photoresist layer is formed adjacent to the first photoresist layer, preferably at a distance equal to the distance between each first photoresist layer.

〔実施例〕〔Example〕

以下に本発明の実施例を示す。 Examples of the present invention are shown below.

第1図へにおいて、厚さ約0.5鶴のガラス−エポキシ
樹脂製絶縁N1に接着された厚さ約35μ請の銅N2上
に、所望の配線パターンを有する第1フォトレジスト層
3及び右端の第1フォトレジスト層3から各レジスト層
3間の距離だけ離れた第2フォトレジスト層4を形成し
た。各第1フォトレジスト層3は幅が約100μmであ
り、約20μmの間隔で形成され、第2フォトレジスト
層4は幅が約80μmである。
1, a first photoresist layer 3 having a desired wiring pattern and a first photoresist layer 3 having a desired wiring pattern are deposited on a copper N2 having a thickness of about 35 μm bonded to a glass-epoxy resin insulation N1 having a thickness of about 0.5 μm. A second photoresist layer 4 was formed separated from the first photoresist layer 3 by the distance between each resist layer 3. Each first photoresist layer 3 has a width of about 100 μm and is formed at intervals of about 20 μm, and each second photoresist layer 4 has a width of about 80 μm.

次いで、銅箔2部分を45℃のエツチング液により、ス
プレー圧力4kg/Cm″で30秒間エツチングした。
Next, the two portions of the copper foil were etched with an etching solution at 45°C for 30 seconds at a spray pressure of 4 kg/cm''.

エツチング液は、FeCIz 濃度28〜40%、II
cI tH度5%及び少量の界面活性剤を含む水溶液を
用いた。このエツチング処理の間に、まず第1図Bに示
す通り、第1フォトレジスト層3に対応する、パターン
状に近い銅箔N5と、第2フォトレジスト層4に対応す
るw4箔層6とが形成された。銅箔層6は他の銅箔層5
部分に比べて大きいサイドエツチング作用を受けて細ま
っている。
The etching solution was FeCIz concentration 28-40%, II
An aqueous solution containing 5% cI tH and a small amount of surfactant was used. During this etching process, first, as shown in FIG. Been formed. Copper foil layer 6 is another copper foil layer 5
It is narrowed due to the side etching effect which is larger than the main part.

さらにエツチング処理が進んで、銅箔層6が消滅すると
ほぼ同時に、所望の配線パターンを有する配線部7が得
られた。この配線部7の太さは30〜35メ!mであっ
た(第1図C)。最後に、残留第1フォトレジスト層3
を除去した(第1図D)。
As the etching process further progressed, the wiring section 7 having the desired wiring pattern was obtained almost at the same time as the copper foil layer 6 disappeared. The thickness of this wiring part 7 is 30 to 35 meters! m (Figure 1C). Finally, the remaining first photoresist layer 3
was removed (Fig. 1D).

こうして得られた配線部7は通常、電気めっきが施され
る。
The wiring portion 7 thus obtained is usually subjected to electroplating.

本実施例における第1フォトレジスト層3と第2フォト
レジスト層4の配置状況をわかり易くするため、第2図
及び第3図にそれぞれシートコイル及びIC部品の引出
し電極配線部を形成する場合の例について、各フォトレ
ジスト層3.4を示した。
In order to make it easier to understand the arrangement of the first photoresist layer 3 and the second photoresist layer 4 in this example, FIGS. 2 and 3 show examples of forming the lead electrode wiring portions of sheet coils and IC components, respectively. For each photoresist layer 3.4 is shown.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明によれば、従来問題となって
いた、不都合に大きいサイドエツチング作用が回避され
、高密度印刷配線部が均一に形成される。
As described above, according to the present invention, the undesirably large side etching effect, which has been a problem in the prior art, can be avoided, and a high-density printed wiring portion can be uniformly formed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A−Dは本発明の実施例の工程を示す断面図、第
2図と第3図はいずれも実施例の第1及び第2フォトレ
ジスト層を示すための平面図、第4図は従来の方法によ
る工程を示す断面図である。 なお図面に用いた符号において、 1・−・・・・−−−−−m−・・−絶縁層2−・−・
・・−・−・・・銅箔 3−・・・・・・・−・・・・−第1フォトレジスト層
4・・−・−−−−−一・・−−−−−−・第2フオト
レジスト層7−・・・−・・・−・−配線部 である。
1A to 1D are cross-sectional views showing the steps of an embodiment of the present invention, FIGS. 2 and 3 are plan views showing the first and second photoresist layers of the embodiment, and FIG. FIG. 2 is a cross-sectional view showing a process according to a conventional method. In addition, in the symbols used in the drawings, 1.--..--m-.--insulating layer 2-.-.
····························Copper foil 3····················· 1st photoresist layer 4····················································································································. Second photoresist layer 7 --- wiring section.

Claims (1)

【特許請求の範囲】[Claims] 絶縁層に接着された導体箔上にフォトレジスト層を形成
し、導体箔をエッチングし、フォトレジスト層を除去す
ることから成る印刷配線部の形成方法において、前記フ
ォトレジスト層が、所望の配線パターン状に形成された
第1フォトレジスト層と、大きなサイドエッチング作用
を受け易い導体箔部分に対応する第1フォトレジスト層
部分の近傍に形成された第2フォトレジスト層とから成
ることを特徴とする印刷配線部の形成方法。
A method for forming a printed wiring section comprising forming a photoresist layer on a conductive foil adhered to an insulating layer, etching the conductive foil, and removing the photoresist layer, wherein the photoresist layer is formed into a desired wiring pattern. A first photoresist layer formed in a shape, and a second photoresist layer formed in the vicinity of a portion of the first photoresist layer corresponding to a portion of the conductor foil that is susceptible to large side etching effects. A method of forming a printed wiring section.
JP14125687A 1987-06-05 1987-06-05 Forming method for printed wiring part Pending JPS63305589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14125687A JPS63305589A (en) 1987-06-05 1987-06-05 Forming method for printed wiring part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14125687A JPS63305589A (en) 1987-06-05 1987-06-05 Forming method for printed wiring part

Publications (1)

Publication Number Publication Date
JPS63305589A true JPS63305589A (en) 1988-12-13

Family

ID=15287683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14125687A Pending JPS63305589A (en) 1987-06-05 1987-06-05 Forming method for printed wiring part

Country Status (1)

Country Link
JP (1) JPS63305589A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5629304A (en) * 1979-08-20 1981-03-24 Taiyo Yuden Kk Method of manufacturing electric part like thin film resistor or like
JPS5994894A (en) * 1982-11-22 1984-05-31 日本電気株式会社 Method of forming thin film pattern

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5629304A (en) * 1979-08-20 1981-03-24 Taiyo Yuden Kk Method of manufacturing electric part like thin film resistor or like
JPS5994894A (en) * 1982-11-22 1984-05-31 日本電気株式会社 Method of forming thin film pattern

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