JPS63301677A - Change point detecting circuit - Google Patents

Abstract

PURPOSE:To detect the change point of one line at high speed by storing successive white information to a block unit at the time of writing picture data to a line memory. CONSTITUTION:The titled circuit is provided with a line memory 1 for storing the picture data by one line, a decision circuit 2 for deciding whether the picture data is all white or not for n-bit unit at the time of writing to the memory 1 and outputting the one line as flag information for respective (n) bits and a m-bit register 3 for sequentially storing and outputting output information from the decision circuit 2. Further, the circuit is provided with an encoder circuit 4 for coding an m-bit output under priority and outputting a signal indicating a successive white bit length and a change point detecting means 5 for detecting the change point of the picture data of the one line by defining the successive white bit length designated by the output of the encoder circuit to be an initial value. Thereby, when a white is continued from the leading part of the one line, the change point can be detected on the way of the line to attain the high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a facsimile machine, and more particularly to a circuit for detecting a change point of image data in a 7-axis machine.

2. Description of the Related Art Conventionally, facsimile image data change point detection circuits have been proposed that sequentially detect change points in bit serial or byte parallel starting from the first pixel of one line.

Problems to be Solved by the Invention However, according to the prior art, changing points are sequentially detected from the beginning of one line even if most of the line is occupied by white, so the efficiency of changing point detection is low. It had the disadvantage of being bad.

The present invention has been made in order to eliminate the above-mentioned drawbacks inherent in the conventional technology, and therefore, an object of the present invention is to provide a novel change point detection method that makes it possible to speed up the process of detecting change points of the l line. The purpose is to provide circuits.

Means for Solving the Problems In order to achieve the above object, the change point detection circuit according to the present invention includes a line memory that stores image data for one line;
A determination circuit that determines whether or not the image data in the line memory is completely white in units of n bits when writing to the line memory, and outputs one line as flag information for every n bits, and output information from the determination circuit. an m-bit register that sequentially stores and outputs the m-bit register, an encoder circuit that priority-encodes the m-bit output of the m-bit register and outputs a signal indicating the continuous white bit length, and an encoder circuit that outputs a signal indicating the continuous white bit length specified by the encoder circuit output. A changing point detecting means for detecting a changing point of image data for one line as an initial value.

Practical Example Next, a preferred practical example of the present invention will be explained in detail with reference to the drawings.

Fig. 1 to Fig. 5 show an example of winding the present invention. FIG. 1 is a block diagram showing an example of a changing point detection circuit according to the present invention.

Referring to FIG. 1, in this embodiment, in order to simplify the explanation, one line is assumed to be 1024 bits, and the number of bits for one judgment is n.
is 256 bits, and the number of register pits for storing flags is m.
is 4 bits. First, reference number 1 is an 8-bit parallel input/output capable line memory, which has a structure that allows sequential writing in byte units when inputting one image data, and allows random reading by address when outputting image data.
2 is a determination circuit that determines whether or not each of the 256 pits of image data input to the line memory 1 is completely white, and outputs the result;
3 is a 4-bit shift register capable of serial-in-parallel output that stores the data output from the judgment circuit 2; 4 is an encoder that encodes the output of the shift register 3; and 5 detects a change point using the output from the encoder 4. The change point detectors that can arbitrarily set the top address to the line memory for the initial value are shown. 1
11', t byte parallel input image signal, 12 Fi transfer lock, 13 byte parallel output image signal, 21 judgment result output No. 1, 22 shift clock, 31 4-bit flag output, 41 3-bit encode/output , 51
52 indicates an address signal to the line memory 1, and 52 indicates a change point detection result output signal.

Next, the operation of the two embodiments will be explained using FIGS. 2 to 5.

FIG. 2 shows the stroke code for one line stored in the line memory, where one line has 1024 bits and the number of bits for one determination is 256 bits.

It can be divided into four blocks 81 to B4 of 256 bits. Here, Bl indicates the first block. Also, the distribution of white/black runs in one line starts from the beginning with white 5
Assume that the number of pixels is 20 bits, black is 256 bits, and white is 248 bits.

In FIG. 3, the 1 determination circuit 2 inputs image data in byte parallel according to the transfer lock 12 for the 256 bits of block B1, and searches for 32 bytes (256 bits) to see if they are all white. For block B1, 32 bytes are all white.

As the judgment result 21, the rLOJ level is outputted, and one pulse is output as the shift clock 22, and then 1 judgment result 2 is output.
1 to the initial state level rLOJ. Similar operations are subsequently performed for the 32 bytes of block B2.

Next, when block B3 is entered, since block B3 includes black pixels, the 1 judgment circuit 2 immediately outputs a judgment result 21 if there is even 1 bit of a black pixel in 1 byte of the transfer image signal during image signal transfer. When the transfer of 64 bytes is completed, one pulse of the shift clock is output, and then the determination result 21 is returned to l'-LOJ. A similar operation occurs for the 32 bytes of block B4.

FIG. 4 shows a state in which the judgment result 21 is taken into the shift register 3 by the shift clock 22, and BF
l is block B1, BF2 is block B2, B
F3 corresponds to a register that stores flag information indicating whether hBF4 of block B3 and block B4 are all white or not. In addition, register 3 has a 4-bit shift register structure that allows serial input/parallel write-out, and the judgment result 21 is taken in from the BF4 side and shifted sequentially for each shift clock input, completing the judgment of one line. At that point, the flag information is sent to the 4-bit flag output 3.
It is output to the encoder 4 as 1. Encoder 4 is.

The 4-bit flag output 31 is encoded as shown in FIG. 5, and a 3-bit encoded output 41 is output.

The encoded output 41 indicates the number of consecutive all-white blocks, and its value changes between 0 and 4, with "000-" being 0.
"0OIJ is 1."010J is 2."011"
3. "100" represents 4. In the case of this example, the encoded output 41 is l'-010J.

This indicates that the number of consecutive all-white blocks is 2.

The change point detector 5 outputs an encoded output 41 when detecting a change point in one line of image data in the line memory 1.
is confirmed, and since the number of consecutive all-white blocks is 2, the address signal 51 is outputted to start the change point detection from the first byte of block B3, and 512 pits are set as the initial value.

The changing point detector 5 further recognizes 8 white bits before detecting the first black pixel, adds this to 512 bits, and outputs No. 1 52 indicating 520 white bits as the changing point detection result. The following changes are detected sequentially.

By the end of one line, 256 black bits and 248 white pits are output by 52 each. As stated above, 1
If white is continuous from the beginning of the line, change point detection can be performed from the middle of the line.

It is possible to increase the speed.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, continuous white information is stored in block units when image data is written to the line memory, and the image data in the line memory is later read out to identify changing points. There is no need to perform change point detection for blocks in which consecutive milling points are shown when detecting the change point, and the effect of speeding up the change point detection process for one line can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block RI Fy showing one embodiment of the present invention. Figures 2 to 5 are explanatory diagrams of the operation of a single column according to the present invention. 1... Line measurement, 2... Judgment circuit, 3... 4
Bit shift register, 4...Encoder, 5...
Changing Point Detector Patent Applicant NEC Corporation Representative Patent Attorney Yutabe Kumagai 1N 1 Raishi/+Silage: White 520H, To, @,
256 windows, 1 white 248 pieces Fig. 2 1 Sidata II B+
82 83
B4 Figure 3

Claims (1)

[Claims] A line memory that stores image data for one line, and determines whether or not the image data in the line memory is completely white in units of n bits when writing to the line memory, and stores one line as flag information for each n bit. an m-bit register that sequentially stores and outputs the output information from the determination circuit; and an encoder circuit that priority-encodes the m-bit output of the m-bit register and outputs a signal indicating the continuous white bit length. , and a change point detector for detecting a change point in one line of image data using a continuous white bit length specified by the output of the encoder circuit as an initial value.