JPS6329472B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image data reduction method, and particularly to an image data reduction method that performs reduction conversion without restoring a compressed image.

When transmitting and storing pattern information such as images,
Due to transmission speed, storage capacity, information processing speed, etc., original pattern information is compressed, transmitted, and stored.

When reducing information, the compressed information is restored and then desired reduction processing is performed.

However, once the compressed information is restored in this way,
When the reduction process is performed, the information processing speed decreases due to the restoration operation, and the information processing apparatus becomes large-scale.

The present invention has been made in view of this point, and provides a novel image data reduction method in which reduction conversion is performed based on compressed information without going through the process of restoring the compressed information, and information processing is performed. The purpose is to

In order to achieve this object, the image data reduction method of the present invention uses a set of vertical a-bit pixels, a mode code indicating the state of the set, a transition code indicating the transition between the sets, and a run code indicating the length of the set. An image data reduction method that reduces an area of a vertical bits and horizontal b bits to an area of g vertical bits and h horizontal bits from image information compressed and encoded by a length code, the length of the set being l.
is divided by r=b/h, and for an integer value c of l/r, an image signal corresponding to the set of g bits determined corresponding to the set of a bits is output for the integer value c;
For the remainder value d of l/r, the next located set (r
-d) It is characterized by combining the bits and outputting at least an image signal corresponding to the set of g bits determined corresponding to the set of a bits and the set located next.

Preferred embodiments of the present invention will be described in detail below with reference to the drawings.

Before explaining the embodiments, the basic idea of the present invention will be explained. FIG. 1a is pattern information,
For convenience of explanation, 4 pixels (2 bits vertically and 2 bits horizontally) are 1.
unit, and address (i, j) for each unit.
Add (i=1 to 7, j=1 to 4). In the figure, the shaded area indicates that the pixel is in a black state,
No mark indicates that the pixel is in a white state.

This pattern information is compressed as follows. For example, 4 pixels (2 bits vertically and 2 bits horizontally) are divided into 1 vertically
When reducing to one pixel of one bit horizontally, a conversion logic as shown in FIG. 2 is used, for example.

Therefore, the information pattern shown in Figure 1a is as shown in Figure 1b.
It is reduced and converted into an information pattern as shown in .

The four pixels at address (5, 1) in FIG. 1a are converted into one pixel having the black level shown at address (5, 1) in FIG. ) are converted into one pixel having the white level shown at address (7, 1) in FIG. 1b.

The compressed pattern information before reduction conversion is encoded every two rows (corresponding to 2 vertical bits) of the pixel matrix of FIG. 3a, as shown in FIG. 3b. In FIG. 3b, the alpha alphabet is a mode code indicating whether each set of vertical 2-bit pixels is a black level or a white level, and the number is the length of the same pattern in this mode ( run-length code).

For example, the mode code B/W at the beginning of FIG. 3b indicates the mode of the first and second pair of pixels in the pixel matrix of FIG. 3a, and the run length code "2" indicates the mode B/W. The pattern array is 2
The next mode code B/B and run length code 4 indicate that four consecutive mode pattern sequences B/B occur. The same applies below.

When reducing the compression code mentioned above, for example, by applying the reduction conversion shown in FIG. 4, the compression code shown in FIG. 3b becomes as shown in FIG. 3c.

When the mode code B/W and run length code "2" in FIG. 3b are reduced, the mode code becomes "B" and the run length becomes "1".

If the run length value is an odd number, for example, the pixel pattern represented by the fifth mode code B/W and run length "1" is integrated with the pixel pattern B/B shown in the adjacent area. As is clear from FIG. 4, the mode code B is reduced.
It is converted into a pixel pattern with a run length of 1.
Therefore, a pattern with run length "2" remains in the last mode code B/B, and this pattern is converted to mode code B according to Table 2.

Through such conversion, the pattern shown in FIG. 1a is reduced to the pattern shown in FIG. 1b while remaining as a compressed code.

Similarly, B may be set to the state "1", W may be set to the state "0", and the output may be made without using the mode code.

FIG. 5 is a circuit configuration diagram of one embodiment of the present invention, in which 1 is a data file in which compressed image patterns are stored, 2 is a buffer memory;
3 is a code discrimination circuit which discriminates a mode code representing pixel information and a run length.

4a is a mode register, 4b is a run length register, 5a is a mode register, 5b is a run length register, 6 is a control unit, and ROM
(Read-Only-Memory) 6a, and an arithmetic control unit 6b that receives mode data from mode registers 4a and 5a and run-length codes from run-length registers 4b and 5b.

7 is a buffer memory, and 8 is a data file.

Next, the operation of this device will be explained.

The data file 1 stores the pattern information shown in FIG. 3a in the form of a compressed binary code as shown in FIG. 3b, and this pattern information is controlled by a control section (not shown). The data for each area is sequentially input to the buffer memory 2 and then input to the code discrimination circuit 3. A mode code indicating the contents of this pattern is stored in the mode register 4a, and a run length code is stored in the run length register 4b.

Subsequently, pattern information for the next mode area is input from data file 1 to buffer memory 2,
The mode code of this pattern is the mode register 5a.
The run length code is stored in register 5b.
will be stored in.

The arithmetic control unit 6b first reads the run length length l stored in the run length register 4b, divides it by the reduction ratio r to be converted, and calculates l=c·r+
It is expressed in the form of d (c, r, d, l are each integers).
In the embodiment of FIG. 3, r=2, and d is 0 or 1.
It is. At this time, if c is 1 or more, the mode code of the mode register 4a is read out, and the ROM 6a is accessed using the mode code and this value c.

The ROM 6a stores image patterns corresponding to the reduced mode corresponding to the accessed mode code, and thus c corresponding image patterns are output.

For example, in FIG. 3, when the accessed mode code is B/B and l=4, two B, ie, black patterns are output.

Then, check whether d is significant (i.e., 1 in the case of Figure 3) or insignificant (0 in the case of Figure 3), and if it is insignificant, then
The process moves on to determining the next mode (that is, determining the mode of the register 5a), and if it is significant, the following calculation is performed. That is, read the mode code of register 5a,
With the mode code of register 4a and register 5a
Access ROM6a. Similarly, the ROM 6a outputs one image pattern corresponding to both mode codes. Then, the run length of register 5b
(r-d) is subtracted from l' and the process proceeds to the mode determination image pattern output of the register 5a.

These outputs are stored in a data file 8 via a buffer memory 7.

In this way, a reduced image is output,
It may be considered that the ROM 6a stores image patterns after conversion according to the mode codes of the image patterns before conversion shown in FIG.

Similarly, this mode code may be stored instead of the converted image pattern.

Even when the reduction ratio r is 3 or more, the conversion principle shown in FIG. 2 is determined in the same way as when r=2.

For example, assume that the reduction ratio r in the horizontal direction is 3 and the reduction ratio r in the vertical direction is also 3. If 5 or more pixels out of 9 pixels (3 pixels vertically, 3 pixels horizontally) are black, it is converted to black, and if 4 pixels or less are black, it is converted to white. By creating a corresponding conversion table similar to that shown in FIG. 4 and performing conversion, image data with a desired reduction ratio can be obtained.

As is clear from the above description, the image information reduction method according to the present invention reduces the pattern information without restoring the pattern information, so a restoring machine is not required, the device configuration becomes simple, and the pixel information Since information is encoded all at once and data processing is performed, there is an advantage that the memory capacity such as a buffer memory is small and the device configuration is simple.

[Brief explanation of the drawing]

Figure 1a shows an example of the pattern, Figure 1b
2 is an explanatory diagram of the conversion table used in the present invention, FIG. 3 a is a diagram showing a part of the pattern, and FIGS. 3 b and c are diagrams explaining the present invention. FIG. 4 is a diagram illustrating the conversion of the present invention, and FIG. 5 is a diagram showing the configuration of an embodiment of the present invention. 1: Data file, 2: Buffer register,
3: Mode determination circuit, 4a: Mode register, 4
b: run length register, 5a: mode register, 5b: run length register, 6a:
ROM, 6b: Output control section, 6c: Selector,
7: Buffer memory, 8: Data file.

Claims (1)

[Scope of Claims] 1 A set of vertical a-bit pixels of a pixel group arranged in a matrix is compressed using a mode code indicating the state of the set and a run length code indicating the length l of the set. An image information reduction method for obtaining image information with a reduction ratio r from encoded image information, wherein the mode code of the set of a bits is converted by reduction conversion logic, and the length of the set is Obtain reduced image information having the value [l/r] ([l/r] is an integer value of the ratio l/r), and calculate the set of a bits for the remainder value d of the ratio l/r. A method for reducing image information, characterized in that the mode code and the length of the set are obtained by the reduction conversion logic by combining (rd) bits of the set located next to the set.