JPS6329824B2 - - Google Patents

Info

Publication number
JPS6329824B2
JPS6329824B2 JP8401481A JP8401481A JPS6329824B2 JP S6329824 B2 JPS6329824 B2 JP S6329824B2 JP 8401481 A JP8401481 A JP 8401481A JP 8401481 A JP8401481 A JP 8401481A JP S6329824 B2 JPS6329824 B2 JP S6329824B2
Authority
JP
Japan
Prior art keywords
recombination
heat treatment
treatment process
center
gettering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8401481A
Other languages
Japanese (ja)
Other versions
JPS57198640A (en
Inventor
Akira Oosawa
Koichiro Pponda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8401481A priority Critical patent/JPS57198640A/en
Publication of JPS57198640A publication Critical patent/JPS57198640A/en
Publication of JPS6329824B2 publication Critical patent/JPS6329824B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 本発明は半導体製造工程、特に限定すれば、チ
ヨクラルスキーシリコン単結晶を用いて半導体装
置を製造する工程のうちのイントリンシツクゲツ
タリング(intrinsic gettering)用熱処理工程の
検査方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor manufacturing process, and more specifically, to a heat treatment process for intrinsic gettering in the process of manufacturing a semiconductor device using a Czyochralski silicon single crystal. Regarding inspection methods.

集積回路の高密度化・大規模集積化に伴ない、
シリコン基板中に発生する結晶欠陥が素子の特
性、歩留りに及ぼす影響は増々大きくなつてきて
いる。この結晶欠陥を誘起する不純物として、酸
素・炭素・重金属などが挙げられており、特に酸
素の影響が大きいと言われている。現在シリコン
デバイス製造に用いられているチヨクラルスキー
シリコン結晶には1.0×1018cm-3程度の酸素が含ま
れている。デバイス製造プロセスでこの過飽和に
存在する酸素がSiOx(x=2)の酸化物となり析
出する。こうして発生した析出物は格子の歪を引
きおこし、転位・積層欠陥などを発生させる。そ
してこれ等の結晶欠陥、酸素析出物・転位・積層
欠陥は素子の特性を著しく劣化させる原因とな
る。
With the increasing density and large-scale integration of integrated circuits,
The influence of crystal defects generated in silicon substrates on the characteristics and yield of devices is increasing. Impurities that induce crystal defects include oxygen, carbon, heavy metals, etc., and oxygen is said to have a particularly large influence. Czyochralski silicon crystals currently used in silicon device manufacturing contain approximately 1.0×10 18 cm -3 of oxygen. During the device manufacturing process, this supersaturated oxygen becomes an oxide of SiOx (x=2) and precipitates. The precipitates thus generated cause lattice distortion and generate dislocations, stacking faults, etc. These crystal defects, oxygen precipitates, dislocations, and stacking faults cause significant deterioration of device characteristics.

この結晶欠陥を除去し、さらにゲツタリングを
行う技術としてイントリンシツクゲツタリングが
行われている。例えば、0.5%Hcl雰囲気中で1250
℃4時間の熱酸化を行うと、ウエハー表面から深
さ方向に結晶欠陥が見出せない領域いわゆるデヌ
ーデツドゾーンDZ(Denuded zone)が形成され
る。しかもウエハーの内部に限定されて多数の結
晶欠陥が発生する。また同様のDZはN2雰囲気中
での1050℃の熱処理でも発生する。これ等のDZ
の幅は熱処理条件によつても異なるが10〜100μm
の程度形成される。このDZを形成させた後にデ
バイスを製造すると、結晶欠陥が表面に存在しな
いこと、および内部に発生する結晶欠陥が重金属
のゲツタリングシンクとして働くの両方の理由
で、素子の特性と製造歩留りが著しく向上する。
そのためイントリンシツクゲツタリング技術はデ
バイス製造の重要な工程になりつつある。
Intrinsic gettering is a technique for removing these crystal defects and further gettering. For example, 1250 in a 0.5% Hcl atmosphere
When thermal oxidation is carried out for 4 hours at °C, a so-called denuded zone (DZ) is formed in the depth direction from the wafer surface in which no crystal defects are found. Moreover, many crystal defects occur only within the wafer. A similar DZ also occurs during heat treatment at 1050°C in a N2 atmosphere. These DZ
The width varies depending on the heat treatment conditions, but is 10 to 100 μm.
Formed to a degree. If a device is manufactured after forming this DZ, the characteristics and manufacturing yield of the device will be significantly affected, both because there are no crystal defects on the surface and because the crystal defects generated inside act as gettering sinks for heavy metals. improves.
Therefore, intrinsic gettering technology is becoming an important process in device manufacturing.

一方イントリンシツクゲツタリング用の熱処理
工程でDZを形成させるときの問題点は、ロツト
の異なる多くのシリコンウエハーについて再現性
よくDZを形成できないことである。インゴツト
の酸素濃度などによりDZの形成の有無が左右さ
れる。そこで熱処理工程後にDZの形成の有無を
評価して適切なウエハーを判別する必要がある。
DZの形成の有無は、通常、ウエハーをへき開し
てエツチング法で断面のピツト分布を観察して評
価する。この方法は破壊法であり半導体製造工程
の検査には使えない。
On the other hand, a problem when forming a DZ in a heat treatment process for intrinsic gettering is that it is not possible to form a DZ with good reproducibility on many silicon wafers from different lots. The presence or absence of DZ formation depends on factors such as the oxygen concentration in the ingot. Therefore, it is necessary to determine the appropriate wafer by evaluating the presence or absence of DZ formation after the heat treatment process.
The presence or absence of DZ formation is usually evaluated by cleaving the wafer and observing the pit distribution in the cross section using an etching method. This method is a destructive method and cannot be used for inspection of semiconductor manufacturing processes.

本発明は上記従来の欠点を除去し、イントリン
シツクゲツタリング用熱処理工程後のシリコン単
結晶を破壊することなく該工程の正常性を評価し
うる検査方法を提供することを目的としている。
そしてこの目的は本発明によれば、シリコン単結
晶の内部に結晶欠陥を発生させ且つその表層部の
領域には無欠陥層を作り、内部の欠陥をゲツタリ
ング中心に利用するイントリンシツクゲツタリン
グ用の熱処理工程を検査する方法において、該イ
ントリンシツクゲツタリング用の熱処理工程の終
了後にシリコン単結晶の少数キヤリアの再結合特
性を光減衰法で測定し、測定された再結合中心
に、 再結合が早く起こる特性を有する第1の再結合
中心と、 結晶欠陥により、前記第1の再結合中心より深
い準位に形成されて、再結合が前記第1の再結合
中心より遅く起こる特性を有する第2の再結合中
心とによる2種類以上の減衰特性が現れるか否か
により前記熱処理工程の正常性を検査することを
特徴とする半導体製造工程の検査方法を提供する
ことによつて達成される。
An object of the present invention is to eliminate the above-mentioned conventional drawbacks and to provide an inspection method capable of evaluating the normality of a heat treatment process for intrinsic gettering without destroying the silicon single crystal after the process.
According to the present invention, this purpose is to generate crystal defects inside a silicon single crystal, create a defect-free layer in the surface region, and use the internal defects as a gettering center for intrinsic gettering. In a method for inspecting a heat treatment process for intrinsic gettering, the recombination characteristics of minority carriers in a silicon single crystal are measured by an optical attenuation method after the heat treatment process for intrinsic gettering is completed, and recombination occurs at the measured recombination center. a first recombination center that has a characteristic that recombination occurs earlier; and a first recombination center that is formed at a deeper level than the first recombination center due to crystal defects and has a characteristic that recombination occurs later than the first recombination center. This is achieved by providing an inspection method for a semiconductor manufacturing process, characterized in that the normality of the heat treatment process is inspected based on whether or not two or more types of attenuation characteristics due to the second recombination center appear. .

以下図面に従つて本発明の原理並びに一実施例
を詳細に説明する。第1図、第2図は本発明の原
理を説明するための図であり、光減衰型のマイク
ロ波法で測定された、イントリンシツクゲツタリ
ング用熱処理工程前後におけるシリコン単結晶の
少数キヤリアの再結合(ライフタイム)特性を示
す。
The principle and one embodiment of the present invention will be explained in detail below with reference to the drawings. Figures 1 and 2 are diagrams for explaining the principle of the present invention, and show the minority carriers of a silicon single crystal before and after the heat treatment process for intrinsic gettering, as measured by an optically attenuated microwave method. Demonstrates recombination (lifetime) properties.

すなわち、第1図はイントリンシツクゲツタリ
ング用熱処理工程を行う前のシリコン単結晶受け
入れ時の少数キヤリアのライフタイムの測定結果
であり、時間0μsの時点で10μs幅の光パルスを照
射したときの、マイクロ波の検波出力の時間変化
をオシログラフ(CRT)で観察した結果である。
第1図に示されるように結晶欠陥が発生していな
い結晶では減衰曲線はe-t/〓の形で与えられ、ライ
フタイムτが決まる。この例ではτ100μsが求
まる。第2図は、同一のシリコン単結晶に対して
イントリンシツクゲツタリング用の熱処理工程を
行なつた後に第1図の場合と同じ測定を行つた結
果を示す。尚、熱処理工程は、700℃、12時間、
N2雰囲気と1200℃、3時間、N2雰囲気の2回の
熱処理を連続して行なつた。第2図の減衰曲線の
特徴は、(i)少数キヤリアのライフタイムの減少に
対応して初期に早い減衰が走る(t=0〜10μs)
(ii)その後の減衰はゆるやかで長い時定数に対応す
る(20μs〜80μs以上)。この現象は、通常のシリ
コン単結晶が有する第1の再結合中心(i)(早い再
結合過程を有する)に加えて、結晶欠陥により、
深い準位に形成された第2の再結合中心(ii)(遅い
再結合過程を有する)が存在することによる。こ
の減衰曲線は単一のexponential decay l-t/〓では
現せない形に変化する。従つて、この減衰特性の
変化、すなわち少数キヤリアーの寿命の変化を用
いてイントリンシツクゲツタリング用熱処理工程
によるDZの形成と内部欠陥の発生を非破壊で検
査することができる。
In other words, Figure 1 shows the measurement results of the lifetime of minority carriers when a silicon single crystal is received before the heat treatment process for intrinsic gettering. This is the result of observing the time change of the microwave detection output using an oscilloscope (CRT).
As shown in Figure 1, in a crystal without crystal defects, the decay curve is given in the form e -t/ 〓, and the lifetime τ is determined. In this example, τ100μs is found. FIG. 2 shows the results of the same measurements as in FIG. 1 after the same silicon single crystal was subjected to a heat treatment process for intrinsic gettering. The heat treatment process was conducted at 700℃ for 12 hours.
Heat treatment was carried out twice in a N 2 atmosphere and at 1200° C. for 3 hours in an N 2 atmosphere. The characteristics of the decay curve in Figure 2 are: (i) a rapid decay occurs at the beginning, corresponding to a decrease in the lifetime of minority carriers (t = 0 to 10 μs);
(ii) The subsequent decay is gradual and corresponds to a long time constant (20 μs to 80 μs or more). This phenomenon is caused by crystal defects, in addition to the first recombination center (i) (which has a fast recombination process) that ordinary silicon single crystals have.
This is due to the presence of a second recombination center (ii) (having a slow recombination process) formed at a deep level. This decay curve changes in a way that cannot be expressed by a single exponential decay l -t/ 〓. Therefore, the formation of DZ and the occurrence of internal defects due to the heat treatment process for intrinsic gettering can be nondestructively inspected using changes in the attenuation characteristics, that is, changes in the lifetime of minority carriers.

本発明は上述の原理に従い、イントリンシツク
ゲツタリング用の熱処理工程の終了後にシリコン
単結晶の少数キヤリアの再結合特性を光減衰法で
測定し、その測定結果により熱処理工程が正常か
否か即ち無欠陥層DZが形成され且つ内部欠陥の
発生されたか否かを検査するものである。第3図
は光減衰法による少数キヤリアのライフタイムの
測定を行う一実施例構成図であり、本例はマイク
ロ波の反射現象を使用してなす光減衰法の例であ
る。第3図において、被験体は開口導波管を介し
てマイクロ波を照射されており、励起光源からの
光を照射されたときのみ強くマイクロ波を反射す
る。そして励起光源の照射が停止されると、反射
マイクロ波は指数函数的に減衰する。そこで、こ
の反射波をガリユウム砒素(GaAs)又はシリコ
ン(Si)等よりなる結晶検波器を介してブラウン
管(CRT)に導けば、反射波の減衰特性を観測
することができ、この反射波の減衰特性は少数キ
ヤリアの寿命に依存するから、この少数キヤリア
の寿命を測定することができる。なお、チユーナ
ーは励起光が照射されないとき、反射光を零にす
る機能を有する。その他の構成については公知で
あるから説明を要しないであろう。
In accordance with the above-mentioned principle, the present invention measures the recombination characteristics of minority carriers in a silicon single crystal using an optical attenuation method after the heat treatment process for intrinsic gettering is completed, and uses the measurement results to determine whether the heat treatment process is normal or not. This is to inspect whether a defect-free layer DZ has been formed and whether or not internal defects have occurred. FIG. 3 is a block diagram of an embodiment for measuring the lifetime of minority carriers by the optical attenuation method, and this example is an example of the optical attenuation method using the microwave reflection phenomenon. In FIG. 3, the subject is irradiated with microwaves through an aperture waveguide, and only strongly reflects the microwaves when irradiated with light from an excitation light source. When the irradiation of the excitation light source is stopped, the reflected microwaves decay exponentially. Therefore, by guiding this reflected wave to a cathode ray tube (CRT) through a crystal detector made of gallium arsenide (GaAs) or silicon (Si), it is possible to observe the attenuation characteristics of the reflected wave. Since the characteristics depend on the lifetime of the minority carrier, the lifetime of this minority carrier can be measured. Note that the tuner has a function of reducing reflected light to zero when no excitation light is irradiated. The other configurations are well known and therefore need not be explained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は本発明の原理を説明するため
の図、第3図は光減衰法による測定のための実施
例構成図を示す。
1 and 2 are diagrams for explaining the principle of the present invention, and FIG. 3 is a diagram showing the configuration of an embodiment for measurement using the optical attenuation method.

Claims (1)

【特許請求の範囲】 1 シリコン単結晶の内部に結晶欠陥を発生させ
且つその表層部の領域には無欠陥層を作り、内部
の欠陥をゲツタリング中心に利用するイントリン
シツクゲツタリング用の熱処理工程を検査する方
法において、該イントリンシツクゲツタリング用
の熱処理工程の終了後にシリコン単結晶の少数キ
ヤリアの再結合特性を光減衰法で測定し、測定さ
れた再結合特性に、 再結合が早く起こる特性を有する第1の再結合
中心と、 結晶欠陥により、前記第1の再結合中心より深
い準位に形成されて、再結合が前記第1の再結合
中心より遅く起こる特性を有する第2の再結合中
心とによる2種類以上の減衰特性が現れるか否か
により前記熱処理工程の正常性を検査することを
特徴とする半導体製造工程の検査方法。
[Claims] 1. A heat treatment process for intrinsic gettering in which crystal defects are generated inside a silicon single crystal, a defect-free layer is created in the surface region, and the internal defects are used as a gettering center. In this method, the recombination characteristics of minority carriers in a silicon single crystal are measured by an optical attenuation method after the heat treatment process for intrinsic gettering is completed, and the measured recombination characteristics indicate that recombination occurs quickly. a first recombination center having a characteristic, and a second recombination center having a characteristic that the recombination center is formed at a deeper level than the first recombination center due to crystal defects and recombination occurs later than the first recombination center. A method for inspecting a semiconductor manufacturing process, characterized in that the normality of the heat treatment process is inspected based on whether or not two or more types of attenuation characteristics due to recombination centers appear.
JP8401481A 1981-06-01 1981-06-01 Inspecton of semiconductor manufacturing process Granted JPS57198640A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8401481A JPS57198640A (en) 1981-06-01 1981-06-01 Inspecton of semiconductor manufacturing process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8401481A JPS57198640A (en) 1981-06-01 1981-06-01 Inspecton of semiconductor manufacturing process

Publications (2)

Publication Number Publication Date
JPS57198640A JPS57198640A (en) 1982-12-06
JPS6329824B2 true JPS6329824B2 (en) 1988-06-15

Family

ID=13818716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8401481A Granted JPS57198640A (en) 1981-06-01 1981-06-01 Inspecton of semiconductor manufacturing process

Country Status (1)

Country Link
JP (1) JPS57198640A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4963500A (en) * 1988-02-02 1990-10-16 Sera Solar Corporation Method of monitoring semiconductor manufacturing processes and test sample therefor
JP5815330B2 (en) * 2010-09-10 2015-11-17 株式会社半導体エネルギー研究所 Semiconductor substrate analysis method
JP2013093434A (en) * 2011-10-26 2013-05-16 Semiconductor Energy Lab Co Ltd Method for analyzing semiconductor substrate

Also Published As

Publication number Publication date
JPS57198640A (en) 1982-12-06

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