JPS63296260A - Printed substrate of hybrid integrated circuit - Google Patents

Printed substrate of hybrid integrated circuit

Info

Publication number
JPS63296260A
JPS63296260A JP62132141A JP13214187A JPS63296260A JP S63296260 A JPS63296260 A JP S63296260A JP 62132141 A JP62132141 A JP 62132141A JP 13214187 A JP13214187 A JP 13214187A JP S63296260 A JPS63296260 A JP S63296260A
Authority
JP
Japan
Prior art keywords
trimming
printed
integrated circuit
hybrid integrated
printed substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62132141A
Other languages
Japanese (ja)
Inventor
Yasuo Kawaguchi
川口 泰男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62132141A priority Critical patent/JPS63296260A/en
Publication of JPS63296260A publication Critical patent/JPS63296260A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To enable the highly accurate trimming of electric components on a printed substrate, by using probing pads with two layers piled in print. CONSTITUTION:Resistors 13 connected between two electrodes 12 on a printed substrate 1, probing pads 11 used on the electrodes 12 upon the trimming of the resistor 13, are printed on the substrate 1. Each pad 11 is composed of an upper conductor 11a and a lower conductor 11b piled in print on the electrode 12. When a hard needle 21 of the probe 2 is pressed in contact with the upper conductor 11a and the lower conductor 11b during a trimming process, a contact area is formed largely astride of both layers and so contact resistance can be made small, so that the trimming can be performed with high accuracy.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路の印刷基板に関し、特に印刷基板
上の電気部品体のトリミング用プロービングパッドが印
刷されている混成集積回路の印刷基板に関する。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a printed circuit board for a hybrid integrated circuit, and more particularly to a printed circuit board for a hybrid integrated circuit on which probing pads for trimming electrical component bodies on the printed circuit board are printed. .

〔従来の技術〕[Conventional technology]

従来、この種の混成集積回路の印刷基板では、印刷基板
上の電気部品体をレーザートリミングする場合に電気部
品体の特性値、例えば抵抗体の場合では抵抗値、の測定
に使用するプロービングパッドは、プローブで接触する
導体が1層のみで印刷されている。
Conventionally, in printed circuit boards of this type of hybrid integrated circuit, when laser trimming electrical components on the printed circuit board, probing pads are used to measure the characteristic values of the electrical components, such as the resistance value in the case of resistors. , the conductor contacted by the probe is printed in only one layer.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の混成集積回路の印刷基板は、プロービン
グパッドの導体が1層で印刷されているので、特性値測
定用のプローブの針とプロービングパッド間の接触抵抗
が大きく、高精度のトリミングを行うことが大変困難で
あるという欠点がある。
In the conventional hybrid integrated circuit printed circuit board described above, the conductor of the probing pad is printed in a single layer, so the contact resistance between the probe needle for measuring characteristic values and the probing pad is large, making it possible to perform highly accurate trimming. The disadvantage is that it is very difficult to do so.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の混成集積回路の印刷基板は、印刷基板上の電気
部品体のトリミング時の特性値測定に使用する導体が2
層重ねて印刷されたプロービングパッドを有している。
The printed circuit board of the hybrid integrated circuit of the present invention has two conductors used for measuring characteristic values during trimming of electrical components on the printed circuit board.
It has a probing pad printed in layers.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示す部分上面図、第2図は
第1図のA−A線断面図である。
FIG. 1 is a partial top view showing an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line A--A in FIG.

第1図において、本実施例の混成集積回路の印刷基板1
は、印刷基板1上の二つの電極12と、二つの電極12
間に接続された抵抗体13と、二つの電極12のそれぞ
れの上に抵抗体13のトリミング時に抵抗値測定用に使
用するブロービングバッド11が印刷され構成されてい
る。
In FIG. 1, a printed circuit board 1 of the hybrid integrated circuit of this embodiment is shown.
are two electrodes 12 on the printed circuit board 1 and two electrodes 12 on the printed circuit board 1.
A blobbing pad 11 used for measuring the resistance value during trimming of the resistor 13 is printed on each of the two electrodes 12 and the resistor 13 connected therebetween.

又、第2図に示すように、それぞれのブロービングバッ
ド11は電極12の上に上部導体11aと下部導体11
bとが重ねられた二層に印刷されている。
Further, as shown in FIG. 2, each blowing pad 11 has an upper conductor 11a and a lower conductor 11 on the electrode 12.
b is printed in two overlapping layers.

抵抗体13のトリミング時の抵抗値の測定は、第2図の
破線で示すプローブ2の導電性の堅い針21が、上部導
体11aと下部導体11bに圧入接触されて行われる。
Measurement of the resistance value during trimming of the resistor 13 is carried out by press-fitting a hard conductive needle 21 of the probe 2, indicated by a broken line in FIG. 2, into contact with the upper conductor 11a and the lower conductor 11b.

針21は、上部導体11aと下部導体11bにまたがっ
て、従来の一層の場合に比し広い接触面積で接触して接
触抵抗を小さくしている。
The needle 21 straddles the upper conductor 11a and the lower conductor 11b and makes contact with it over a wider contact area than in the conventional single-layer case, thereby reducing contact resistance.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、電気部品体のトリミング
時に使用するブロービングバッドを導体2層の構造にす
ることにより、電気部品体の特性値測定用のプローブの
針とブロービングバッドとの接触抵抗を下げるので、高
精度のトリミングを行うことができる効果がある。
As explained above, the present invention provides a two-layer conductor structure for the blowing pad used when trimming the electrical component body, so that the contact between the probe needle and the blowing pad for measuring the characteristic values of the electrical component body is improved. Since the resistance is lowered, there is an effect that highly accurate trimming can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す部分上面図、第2図は
第1図のA−A線断面図である。 1・・・印刷基板、2・・・プローブ、11・・・ブロ
ービングバッド、lla・・・上部導体、llb・・・
下部導体、12・・・電極、13・・・抵抗体、21・
・・針。 Iど
FIG. 1 is a partial top view showing an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line A--A in FIG. DESCRIPTION OF SYMBOLS 1...Printed board, 2...Probe, 11...Blowing pad, lla...Top conductor, llb...
Lower conductor, 12... Electrode, 13... Resistor, 21.
··needle. I

Claims (1)

【特許請求の範囲】[Claims]  印刷基板上の電気部品体のトリミング時の特性値測定
に使用する導体が2層重ねて印刷されたプロービングパ
ッドを有することを特徴とする混成集積回路の印刷基板
1. A printed board for a hybrid integrated circuit, comprising a probing pad printed with two layers of conductors used for measuring characteristic values during trimming of an electrical component body on the printed board.
JP62132141A 1987-05-27 1987-05-27 Printed substrate of hybrid integrated circuit Pending JPS63296260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62132141A JPS63296260A (en) 1987-05-27 1987-05-27 Printed substrate of hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62132141A JPS63296260A (en) 1987-05-27 1987-05-27 Printed substrate of hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS63296260A true JPS63296260A (en) 1988-12-02

Family

ID=15074320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62132141A Pending JPS63296260A (en) 1987-05-27 1987-05-27 Printed substrate of hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS63296260A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02102761U (en) * 1989-01-31 1990-08-15
JPH0559803U (en) * 1992-01-16 1993-08-06 株式会社小糸製作所 Thick film hybrid integrated circuit
JP2010093207A (en) * 2008-10-10 2010-04-22 Mitsubishi Electric Corp Wiring structure for solder bond inspection of printed circuit board
CN106898449A (en) * 2015-12-18 2017-06-27 三星电机株式会社 Resistor element and the plate with the resistor element

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02102761U (en) * 1989-01-31 1990-08-15
JPH0559803U (en) * 1992-01-16 1993-08-06 株式会社小糸製作所 Thick film hybrid integrated circuit
JP2010093207A (en) * 2008-10-10 2010-04-22 Mitsubishi Electric Corp Wiring structure for solder bond inspection of printed circuit board
CN106898449A (en) * 2015-12-18 2017-06-27 三星电机株式会社 Resistor element and the plate with the resistor element

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