JP2007073755A - Method of manufacturing chip resistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To positively apply highly accurate trimming adjustment with low resistance in which two probes for conduction contact a single top surface electrode without causing cost raise. <P>SOLUTION: A method of manufacturing a chip resistor includes steps of preparing a base material substrate A in which a plurality of insulation substrates are aligned and integrated and a longitudinal break groove A1 and a lateral break groove A2 are engraved on its surface; forming a pair of right and left top surface electrodes 2 astride a portion of each of the insulation substrates and forming a resistance film 3; performing trimming adjustment so that a resistance value of the resistance film can be a predetermined value while measuring the resistance value while a probe B for conduction contacts both the top surface electrodes; forming side surface electrodes 6 on both the right and left end surfaces of each of the insulation substrates after breaking the substrate along the longitudinal break groove; and further breaking substrate along the lateral break groove A2. In this case, when the top surface electrodes 2 are formed, through hole 2a are formed on a portion overlapping over the longitudinal break groove A1 of the top surface electrodes 2. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a chip resistor in which a single resistive film is formed on a chip-type insulating substrate and soldering terminal electrodes are formed on both ends of the resistive film, and a method for manufacturing the chip resistor. is there.

  In general, this type of chip resistor has, as is well known, a chip-type insulating substrate, a pair of left and right upper electrodes formed on the surface thereof, and a resistance film formed therebetween. The left and right end surfaces of the insulating substrate are side electrodes formed so as to be connected to the upper surface electrode, and the both side surface electrodes are soldered to a printed circuit board or the like.

  A cover coat covering the resistance film is formed on the surface of the insulating substrate, and a pair of left and right lower electrodes are provided on the back surface of the insulating substrate as necessary, and the side electrodes are connected to the both lower electrodes. Further, solder plating layers are formed on the surfaces of the upper surface electrodes, the both side surface electrodes, and the lower surface electrodes.

Conventionally, when manufacturing a chip resistor having the above-described configuration, for example, as described in Patent Document 1 and Patent Document 2, as described below,
First, a material substrate is prepared, in which a plurality of the insulating substrates 1 are aligned and integrated in the vertical and horizontal directions, and a vertical break groove and a horizontal break groove are formed on the surface for breaking each insulating substrate. To do.

  Next, the pair of left and right upper surface electrodes are formed on the insulating substrate in the surface of the material substrate so as to straddle the vertical break grooves, and the resistance film is connected to the both upper surface electrodes. To form.

  Next, with respect to the resistance film on each insulating substrate, the resistance value of the resistance film becomes a predetermined value while measuring the resistance value of the resistance film in a state where the upper surface electrodes at both ends are in contact with the energization probes. Trimming adjustment is performed by making a trimming groove on the surface.

  Next, after forming a cover coat on the surface of each insulating substrate, the material substrate is broken along the vertical break grooves, and side electrodes are formed on the left and right end surfaces of each of the broken insulating substrates.

Next, after breaking for each insulating substrate along the lateral break groove, a solder plating layer is formed.
The method is adopted.

  In the manufacturing method described above, forming the upper surface electrode so as to straddle the vertical break groove is because the thickness of the vertical break groove portion of the upper surface electrode is increased, so that the vertical break groove is formed in the vertical break groove. Makes it difficult to break along.

Therefore, in Patent Document 1, the upper surface electrode 2 formed so as to straddle the vertical break groove is narrowed in the vertical break groove portion, and in Patent Document 2, the upper surface electrode 2 is formed. By dividing the electrode 2 at the portion of the vertical break groove, in order to reduce the difficulty of the upper surface electrode 2 from breaking along the vertical break groove, in other words, along the vertical break groove. It is configured to facilitate all breaks.
JP 59-75607 A JP 7-153608 A

  By the way, when performing trimming adjustment of the resistance film with high accuracy under a low resistance value, two energization probes arranged in the width direction of the upper surface electrode are simultaneously applied to each of the upper surface electrodes. I do it by touching.

  For this reason, as described in Patent Document 1, when the upper surface electrode is configured to be narrower in the vertical break groove portion, the narrower portion of the upper surface electrode is not affected. In other words, the two energization probes cannot be contacted at the same time. In other words, it is not possible to apply trimming adjustment with high accuracy and low resistance in which two energization probes are in contact with one upper surface electrode. There is a problem.

  On the other hand, as described in Patent Document 2, when the upper surface electrode is divided at the vertical break groove portion, the upper surface electrode is not narrowed. Two energization probes can be in contact with this simultaneously.

  However, on the other hand, the resistive film has a dimension as long as possible in order to improve its surge resistance, so that the upper surface electrode is divided at the vertical break groove portion. The area of the electrode where the energizing probe can be contacted is greatly narrowed by the above-mentioned division, and it becomes extremely difficult to simultaneously contact two energizing probes to this narrow area. There is a problem in that this contact requires a great deal of labor and accuracy, and the manufacturing cost is considerably increased.

  It is a technical object of the present invention to provide a manufacturing method that solves these problems.

In order to achieve this technical problem, claim 1 of the present invention provides:
“A plurality of insulating substrates constituting one chip resistor are integrated in a vertical and horizontal direction, and a vertical break groove and a horizontal break groove are formed on the surface for breaking each insulating substrate. Preparing a material substrate comprising:
Next, a pair of left and right upper surface electrodes are formed on the insulating substrate in the surface of the material substrate so as to straddle the vertical break grooves, and a resistance film is formed so as to connect to both upper surface electrodes. Process,
Next, adjusting the trimming so that the resistance value becomes a predetermined value while measuring the resistance value in the resistance film in a state where the energization probes are in contact with both upper surface electrodes at both ends of the resistance film;
Next, after the material substrate is broken along the vertical break grooves, side electrodes are formed on both left and right end surfaces of each insulating substrate;
Next, in the method of manufacturing a chip resistor, comprising a step of breaking each insulating substrate along the lateral break groove,
The step of forming the upper surface electrode is a step of forming a hole in a portion of the upper surface electrode that overlaps the vertical break groove. "
It is characterized by that.

Further, claim 2 of the present invention is
“In the first aspect of the present invention, the step of forming the upper surface electrode forms a hole in a portion of the upper surface electrode that overlaps the vertical break groove, and at the same time, the vertical break of the left and right side surfaces of the upper surface electrode. This is the process of forming a recess in the part that overlaps the groove. "
It is characterized by that.

  As described above, by forming a punched hole in a portion of the upper surface electrode formed over the vertical break groove so as to overlap the vertical break groove, the upper surface electrode causes a break along the vertical break groove. Making it difficult can be reliably reduced by the presence of the hole.

  On the other hand, in the portion of the upper surface electrode on the left and right outer sides in the width direction from the punched hole, the upper surface electrode exists so as to straddle the vertical break groove, and the width with respect to these two portions is larger. It becomes possible to simultaneously contact two energizing probes arranged in the direction.

  In addition to this, the area where the two energizing probes can be simultaneously contacted by the two portions is reduced when the top electrode is made narrower at the vertical break groove portion as described above, and Compared to the case where the break groove is divided, the resistance film can be greatly increased in a state where a sufficient length dimension is secured, so that two energizing probes can be easily brought into contact with each other at the same time.

  Therefore, according to the present invention, it is possible to reliably apply trimming adjustment with low resistance and high accuracy in which two energization probes are in contact with one upper surface electrode without causing an increase in manufacturing cost. .

  In particular, according to the second aspect of the present invention, the ease of breaking along the vertical break groove can be further improved while maintaining the above-described effects.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The manufacturing method according to this embodiment includes the steps described below.

  First, as shown in FIGS. 1 to 3, a material substrate A formed by integrating a plurality of insulating substrates 1 constituting one chip resistor by arranging them in the vertical direction and the horizontal direction is formed on the surface of the material substrate A. A vertical break groove A1 and a horizontal break groove A2 for breaking A for each of the insulating substrates 1 are formed by engraving.

  Next, as shown in FIGS. 4 and 5, a pair of left and right upper electrodes 2 are applied to the insulating substrate 1 in the surface of the material substrate A by screen printing of material paste and subsequent firing. While forming so as to straddle the vertical break groove A1, a pair of left and right bottom electrodes are formed on the insulating substrate 1 in the back surface of the material substrate A.

  In forming each upper surface electrode 2, a hole 2 a is provided in a portion of each upper surface electrode 2 that overlaps with the vertical break groove A <b> 1.

  Next, as shown in FIG. 6 and FIG. 7, the resistance film 3 is applied to the portion of each insulating substrate 1 on the surface of the material substrate A by screen printing of material paste and subsequent firing, and both ends thereof are It is formed so as to be connected to the upper surface electrode 2.

  In this case, the step of forming the upper surface electrode 2 and the lower surface electrode and the step of forming the resistance film 3 are interchanged to form the resistance film 3 first, and then the upper surface electrode 2 and the lower surface electrode are formed. You may do it.

  Next, as shown in FIG. 8 and FIG. 9, an undercoat 4 made of glass for covering the resistance film 3 is applied to a portion of each surface of the insulating substrate 1 in the surface of the material substrate A by screen printing of a material paste and thereafter It is formed by firing.

  Next, the resistance value of the resistance film 3 in each insulating substrate 1 is measured while the resistance value in the resistance film 3 is measured in a state where the upper surface electrodes 2 at both ends thereof are in contact with the upper surface electrodes 2. Trimming adjustment is performed in which the trimming groove 3a is formed so as to have a value.

  In the trimming adjustment, as shown in FIG. 10, the energizing probe B is brought into contact with each of the left and right outer portions 2b of the upper surface electrode 2 in the width direction with respect to the hole 2a provided in the upper surface electrode 2. .

  That is, the upper surface electrode 2 exists so as to straddle the vertical break groove A1 in the left and right outer portions 2b of the upper surface electrode 2 in the width direction from the punch hole 2a. It is possible to simultaneously contact two energization probes B arranged in the width direction with respect to 2b, and to allow two energization probes B to be simultaneously contacted by the two portions 2b. Can be significantly increased under the condition that the resistance film 3 has a sufficient length dimension.

  Next, as shown in FIGS. 11 and 12, a cover coat 5 for covering the resistive film 3 is applied to the portion of each insulating substrate 1 on the surface of the material substrate A by screen printing of material paste and subsequent firing ( The cover coat is made of glass) or dried (when the cover coat is a heat-resistant synthetic resin).

  Next, as shown in FIG. 13, the material substrate A is broken into a rod-shaped material substrate A ′ along the vertical break groove A1.

  When breaking along the vertical break groove A1, the upper surface electrode 2 straddling the vertical break groove A1 is formed with a punch hole 2a, so that the upper surface electrode 2 is formed into the vertical break groove A1. Can be reliably reduced by the presence of the hole 2a, in other words, the break can be easily made along the vertical break groove A1.

  Next, as shown in FIG. 14, the side electrodes 6 for the left and right end surfaces 1a of each insulating substrate 1 are applied to the left and right side surfaces a ′, a ″ of the rod-shaped material substrate A ′. By baking (when the material paste is a metal-based conductive paste) or drying (when the material paste is a non-metallic conductive paste), it is formed so as to be connected to the upper surface electrode 2 and the lower surface electrode.

  Next, as shown in FIG. 15, the bar-shaped material substrate A ′ is broken for each insulating substrate 1 along the horizontal break groove A 2, and then subjected to a plating process such as barrel plating, whereby the upper surface electrode 1. , A solder plating layer is formed on the surface of the lower electrode and the side electrode 6 to obtain a finished chip resistor.

  Further, in another embodiment of the present invention, a recess 2c is formed in the left and right side surfaces of each upper surface electrode 2 in a portion overlapping with the vertical break groove A1, as shown by a two-dot chain line in FIG. In this way, the ease of breaking along the vertical break groove a1 can be further improved.

It is a perspective view which shows a 1st manufacturing process. FIG. 2 is an enlarged sectional view taken along line II-II in FIG. 1. FIG. 3 is an enlarged sectional view taken along line III-III in FIG. 1. It is a perspective view which shows a 2nd manufacturing process. FIG. 5 is an enlarged sectional view taken along line VV in FIG. 4. It is a perspective view which shows a 3rd manufacturing process. FIG. 7 is an enlarged sectional view taken along the line VII-VII in FIG. 6. It is a perspective view which shows a 4th manufacturing process. FIG. 9 is an enlarged sectional view taken along the line IX-IX in FIG. 8. It is an expansion perspective view which shows the state which is adjusting trimming. It is a perspective view which shows a 5th manufacturing process. FIG. 12 is an enlarged sectional view taken along line XII-XII in FIG. 11. It is a perspective view which shows a 6th manufacturing process. FIG. 14 is an enlarged sectional view taken along line XIV-XIV in FIG. 13. It is a perspective view which shows a 7th manufacturing process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Upper surface electrode 2a Punching hole 3 Resistive film 3a Trimming groove 4 Undercoat 5 Cover coat 6 Side electrode A Material board A1 Vertical break groove A2 Horizontal break groove A 'Rod-shaped material board B Current probe

Claims (2)

A plurality of insulating substrates constituting one chip resistor are integrated in a vertical and horizontal direction, and a vertical break groove and a horizontal break groove are formed on the surface for breaking each insulating substrate. Preparing a material substrate;
Next, a pair of left and right upper surface electrodes are formed on the insulating substrate in the surface of the material substrate so as to straddle the vertical break grooves, and a resistance film is formed so as to connect to both upper surface electrodes. Process,
Next, adjusting the trimming so that the resistance value becomes a predetermined value while measuring the resistance value in the resistance film in a state where the energization probes are in contact with both upper surface electrodes at both ends of the resistance film;
Next, after the material substrate is broken along the vertical break grooves, side electrodes are formed on both left and right end surfaces of each insulating substrate;
Next, in the method of manufacturing a chip resistor, comprising a step of breaking each insulating substrate along the lateral break groove,
The method of manufacturing a chip resistor, wherein the step of forming the upper surface electrode is a step of forming a punch hole in a portion of the upper surface electrode that overlaps the vertical break groove.   2. The method according to claim 1, wherein the step of forming the upper surface electrode forms a hole in a portion of the upper surface electrode that overlaps the vertical break groove, and at the same time, the vertical break groove of the left and right side surfaces of the upper surface electrode. A method of manufacturing a chip resistor, which is a step of forming a recess in a portion overlapping with the chip resistor.

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