JPS63293997A - Manufacture of multilayer printed interconnection board - Google Patents

Abstract

PURPOSE:To reduce the cost of a multilayer printed interconnection board, and to improve reliability on the conduction of a via hole by coating and protecting the whole surface of a polyimide resin layer with an alkali-resistant resin film and manufacturing the multilayer printed interconnection board having an upper layer conductor pattern by combining an electroless plating means and a lift off method. CONSTITUTION:An alkali-resistant resin film 10 is screen-printed onto the surface of a polyimide resin layer 3 except the internal surfaces of lower holes 5A for via holes thinly, and dried. A ceramic substrate 1 is dipped in a plating tank, and electroless-plated with a conductor metal such as copper, and a conductor film 4A is formed onto the surface of a resist 11, the exposed surfaces of alkali-resistant resin films 10 on which the resist 11 is not applied, and the whole surface of the ceramic substrates 1 in the lower holes 5A for the via holes. The resist 11 is peeled, and upper- layer conductor patterns 4 and the conductor films 4A except the via holes 5 are gotten rid of through a lift-off method in which unnecessary conductor film sections shaped onto the top face of the resist 11 are removed. Accordingly, reliability on the conduction of the via holes acquired is improved.

Description

[Detailed Description of the Invention] [Summary] In manufacturing a multilayer printed wiring board in which a ceramic substrate is used and a lower conductor pattern formed on the surface of the ceramic substrate is insulated from an upper conductor pattern by a polyimide resin layer, polyimide resin is used. After covering and protecting the entire surface of the resin layer with an alkali-resistant resin film, an upper layer conductor pattern is formed using a combination of electroless plating means and a lift-off method.

At the same time as this electroless plating, a conductive film is plated on the pilot hole for the via hole to provide a via hole, thereby reducing the number of steps, reducing costs, and producing a multilayer printed wiring board with high reliability of via hole conduction. I will provide a.

[Industrial application field]

The present invention relates to a method for manufacturing a multilayer printed wiring board using a ceramic or mink substrate as a substrate, and more particularly to a method for manufacturing a multilayer printed wiring board at low cost and with high reliability in conduction through via holes.

As shown in the perspective view of FIG. 2, multilayer printed wiring boards used in recent electronic devices include a lower conductor pattern 2 made of a thin film formed on the surface of a ceramic substrate l, and a lower conductor pattern 2 included. The entire surface of the ceramic substrate 1 is covered with a polyimide resin layer 3, and an upper N donor pattern 4 is provided thereon.
There is one in which the lower conductor pattern 2 and the upper conductor pattern 4 are connected by a via hole 5 that vertically passes through the polyimide resin layer 3.

Polyimide resin has high heat resistance, stable insulation properties, and low dielectric constant (relative dielectric constant of approximately 3.5), which can reduce connection wiring delay time between electronic components mounted on a board. Due to its characteristics, it is suitable as an interlayer insulating material for multilayer printed wiring boards as described above.

However, when using polyimide resin as the interlayer insulating material as described above, it is necessary to keep in mind that polyimide resin is weak and eroded by alkaline solutions such as plating solutions.

[Traditional technique (nei)]

A conventional method for manufacturing a multilayer printed wiring board will be described below with reference to FIG.

■Formation of lower layer conductor pattern (see Figure 3(a)) After forming a conductor film by vapor depositing or sputtering a conductor such as copper on the surface of the ceramic substrate l, photoetching is performed.
A lower conductor pattern 2 having a desired shape is formed.

(2) Formation of polyimide resin layer (see FIG. 3 (bl)) A photosensitive polyimide resin layer 3 of uniform thickness is coated on the entire surface of the ceramic substrate 1, including the surface of the lower conductor pattern 20.

■ Formation of prepared hole for via hole (see Figure 3 (C)) Align the mask with the hole to the position of the via hole that connects the lower layer conductor pattern and the upper layer conductor pattern, and perform exposure and
By developing, a prepared hole 5A for a via hole is provided which penetrates the polyimide resin layer 3 and reaches the lower conductor pattern 2.

■Formation of resistive film layer (see Figure 3(d)) Surface of polyimide resin layer 3, inner peripheral surface of pilot hole 5A for via hole, bottom surface of pilot hole 5A for via hole (surface of lower conductor pattern 2) A resistive film layer 6 made of Cr or the like is then formed by means such as vapor deposition.

This resistive film layer 6 has the function of preventing the polyimide resin layer 3 from being attacked by the plating solution during the electroplating process, and also has the function of becoming an electrode surface and enabling electroplating of the upper conductor pattern.

■Resist coating (see Fig. 3 (el)) Leave a pattern corresponding to the upper layer conductor pattern and apply, for example, screen printing to the entire surface of the resistive film layer 6, and apply the resist 7.
Apply.

■ Formation of upper layer conductor pattern (see Figure 3 (fl)) Dip the ceramic substrate l in an electroplating bath, and remove the surface of the resistive film layer 6 to which the resist 7 is not applied, that is, the portion corresponding to the upper layer conductor pattern, and the via hole. The upper layer conductor pattern 4 and the via hole 5 are formed by electroplating copper or the like in the pilot hole 5A.

■Resist removal (see Figure 3 (gl)) As described above, since the resistive film layer 6 is formed on the entire surface of the polyimide resin layer 3, the upper layer 4-body pattern 4 is
does not fulfill its function.

Therefore, unnecessary portions of the resistive film layer 6 must be removed. For this purpose, the resist 7 is first peeled off and removed.

■Removal of unnecessary parts of the resistive film layer (see Fig. 3 (h)) After peeling off the resist 7, the ceramic substrate 1 is immersed in an etching solution for dissolving the resistive film for one hour, and the lower surface of the upper conductor pattern 4 and The resistive film portion of the via hole 5 is left and other unnecessary resistive film portions are removed.

Conventionally, as described above, the upper conductor pattern 4 on the upper surface of the polyimide resin layer 3 and the via hole 5 connecting the lower door pattern 2 and the single conductor pattern 4 are provided.

[Problems to be solved by the invention] However, the above-mentioned conventional method for manufacturing a multilayer printed wiring board,
As a pre-process for electroplating the upper layer conductor pattern,
There is a vapor deposition process for the resistive film layer. This vapor deposition of the resistive film layer requires high equipment costs, takes a long time, and cannot be mass-produced, so there is a problem that the resulting multilayer printed wiring board is expensive.

Furthermore, as shown in FIG. 4, it is difficult to uniformly adhere the resistive film to a desired thickness on the inner circumferential surface of the via hole prepared hole 5A during the vapor deposition process.

Therefore, the conductor hardly adheres to the portion of the via hole pilot hole 5A where there is no resistive film during the electroplating process.

Therefore, there was a problem in that the reliability of the conduction of the via hole was low.

The present invention was created in view of these points, and an object of the present invention is to provide a multilayer printed wiring board that is low in cost and has high reliability in conduction through via holes.

[Means for solving problems]

In order to solve the above-mentioned conventional problems, the present invention has been developed as shown in FIG.
) ~ (As shown in C1, the lower layer conductor pattern 2 is in close contact with the surface of the ceramic substrate l, and the entire surface of the ceramic substrate 1 including the surface of the lower layer conductor pattern 2 is covered, and the layer for hire hole is placed at a desired location. After forming the polyimide resin layer 3 having a lower hole structure in the same process as the conventional process, the upper one-body pattern 4 and the higher hole 5 are formed in the steps shown in FIG. 1 d) to (g). .

That is, the entire surface of the polyimide resin layer 3 is covered with an alkali-resistant resin film 10, and then an upper layer conductor pattern 4 of a desired shape is formed on the surface of the alkali-resistant resin film 10 using a combination of electroless plating means and a lift-off method. Form.

Then, at the same time during electroless plating, the pilot hole 5 for the via hole is
A is also plated with a conductor film 4A to provide a via hole 5.

[Effect]

According to the means of the present invention, the alkali-resistant resin film 10 is coated on the surface of the polyimide resin layer 3 in the previous step during the electroless plating process for forming the conductor film. therefore,
The polyimide resin layer 3 is not eroded by the plating solution.

The coating operation of the alkali-resistant resin film IO can be carried out by screen printing or the like, which is characterized by low equipment costs and short coating time, so that the resulting multilayer printed wiring board is low cost.

In addition, since the means for forming the conductor film is electroless plating,
The plated surface does not need to be a metal film like the conventional resistive film layer.

Therefore, the surface of the alkali-resistant resin film 10 and the inside of the pilot hole 5A for the via hole can be reliably and almost uniformly plated with the conductive film, and the reliability of the conduction of the via hole is high.

[Example] The present invention will be specifically described below with reference to the drawings. Note that the same reference numerals indicate the same objects throughout the figures.

The method for manufacturing the multilayer printed wiring board of the present invention is as follows. Note that the steps from FIG. 1(a) to FIG. 1(C) are the same as the conventional steps.

■ Formation of lower layer conductor pattern (see Figure 1 (al)) After forming a conductor film by vapor depositing or sputtering a conductor such as copper on the surface of the ceramic substrate l, photoetching is performed.
A lower conductor pattern 2 having a desired shape is formed.

(2) Formation of polyimide resin layer (see FIG. 1 (bl)) A photosensitive polyimide resin layer 3 of uniform thickness is applied to the entire surface of the ceramic substrate 1 including the surface of the lower conductor pattern 2.

■ Formation of prepared hole for via hole (see Figure 1 (C)) Align the mask with the hole to the position of the via hole that connects the lower layer conductor pattern and the upper layer conductor pattern, and perform exposure and
A pilot hole for a via hole is formed by developing and penetrating the polyimide resin layer 3 to reach the lower conductor pattern 2.

■Formation of alkali-resistant resin film (see Figure 1 (d)) Polyimide resin layer 3 excluding the inner surface of the via hole pilot hole 5A
A thin alkali-resistant resin film 10, such as epoxy resin, is screen printed on the surface of the film and dried.

This alkali-resistant resin film 10 has a function of preventing the polyimide resin layer 3 from being attacked by a plating solution during the electroless plating process.

(2) Resist coating (see FIG. 1 (114)) A resist 11 is coated on the surface of the alkali-resistant resin film 10 by, for example, screen printing, leaving a pattern corresponding to the upper layer conductor pattern.

04 Formation of a body film (see FIG. 1(f)) The ceramic substrate l is immersed in a plating bath, and a conductive metal such as copper is electrolessly plated to coat the surface of the resist 11 and the resist 1.
A four-layer film 4A is formed on the bare exposed surface of the alkali-resistant resin film 10 to which No. 1 is not applied and on the entire surface of the ceramic substrate l in the via hole prepared hole 5A.

(2) Upper layer conductor pattern formation (see FIG. 1, 1g)) As described above, since the four-layer film 4A is formed on the entire surface of the ceramic substrate l, the conductor film 4A has no function as a pattern. Therefore, the upper layer conductor pattern 4,
Then, the conductor film 4A other than the inner hole 5 is removed.

Note that the alkali-resistant resin film 10 remains on the ceramic substrate 1, but since it is a thin alkali-resistant resin film,
It has almost no effect on the dielectric constant of the multilayer printed wiring board.

As described above, in the method of the present invention, the polyimide resin layer 3 is protected by the alkali-resistant resin film 10 during electroless plating to form the conductor film 48, so there is no risk that the polyimide resin layer will be eroded by the plating solution. do not have.

Moreover, the coating operation of the alkali-resistant resin film 10 can be carried out by screen printing, which requires less equipment cost and requires an extremely short coating time, so that the resulting multilayer printed wiring board can be obtained at low cost.

Further, the means for forming the conductor film 4A in the via hole prepared hole 5A is an electroless plating method. Therefore, the conductor film 4A can be plated almost regardless of whether or not there is a metal film underneath. That is, the reliability of the conduction of the obtained via hole is high.

〔Effect of the invention〕

As explained above, the present invention provides multilayer printed wiring in which the entire surface of the polyimide resin layer is covered and protected with an alkali-resistant resin film, and then an upper layer 4-body pattern is formed using electroless plating means and a lift-off method. This is a method for manufacturing a board, and has excellent practical effects in that the resulting multilayer printed wiring board is low in cost and has high reliability in conduction through the hire holes.

[Brief explanation of drawings]

FIG. 1 is a manufacturing process diagram of the method of the present invention, Figure 2 is a perspective view of a multilayer printed wiring board. Figure 3 is a conventional manufacturing process diagram. FIG. 4 is a sectional view of a main part of a conventional example. In the figure, l is a ceramic substrate, 2 is the lower layer 4 body pattern, 3 is a polyimide resin layer, 4 is the upper layer conductor pattern, 4A is 4 body membranes, 5 is buyer hall, 5A is a pilot hole for via hole, 6 is a resistive film layer; 7.11 is resist, 10 indicates an alkali-resistant resin film, respectively.

Claims (1)

[Claims] A lower layer conductor pattern (2) that is in close contact with the surface of the ceramic substrate (1), and a layer that covers the entire surface of the ceramic substrate (1) including the surface of the lower layer conductor pattern (2), and After forming a polyimide resin layer (3) having a via hole pilot hole (5A) at the location, the entire surface of the polyimide resin layer (3) is covered with an alkali-resistant resin film (10), and then electroless plating is performed. An upper layer conductor pattern (4) of a desired shape is formed on the surface of the alkali-resistant resin film (10) by using a lift-off method, and at the same time during the electroless plating, the pilot hole (5A) for the via hole is formed.
) is also plated with a conductive film (4A), and the via hole (5) is
A method for manufacturing a multilayer printed wiring board, comprising: