JP2596754B2 - Method of forming solder layer of printed wiring board - Google Patents
Method of forming solder layer of printed wiring boardInfo
- Publication number
- JP2596754B2 JP2596754B2 JP62181752A JP18175287A JP2596754B2 JP 2596754 B2 JP2596754 B2 JP 2596754B2 JP 62181752 A JP62181752 A JP 62181752A JP 18175287 A JP18175287 A JP 18175287A JP 2596754 B2 JP2596754 B2 JP 2596754B2
- Authority
- JP
- Japan
- Prior art keywords
- solder
- wiring board
- printed wiring
- layer
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明はプリント配線板の半田層の形成方法に関し、
特に溶融メッキにより半田層を形成する方法に関するも
のである。Description: TECHNICAL FIELD The present invention relates to a method for forming a solder layer on a printed wiring board,
In particular, the present invention relates to a method for forming a solder layer by hot-dip plating.
(従来の技術) 従来、プリント配線板上へ半田層を形成する方法とし
て、電気メッキによる方法、ソルダークリームを用いる
方法、溶融メッキによる方法が行われている。(Prior Art) Conventionally, as a method of forming a solder layer on a printed wiring board, a method using electroplating, a method using solder cream, and a method using hot-dip plating have been performed.
電気メッキによる方法は、プリント配線板を半田メッ
キ液に浸漬して通電を行い、プリント配線板の半田層形
成箇所に電気分解により半田層を形成する方法である。The method using electroplating is a method in which a printed wiring board is immersed in a solder plating solution to conduct electricity, and a solder layer is formed by electrolysis at a solder layer forming portion of the printed wiring board.
ソルダークリームを用いる方法は、プリント配線板の
半田層形成箇所に、半田粉末がフラックスに懸濁された
ものであるソルダークリームを印刷、あるいはディスペ
ンサーにより塗布する方法である。The method using solder cream is a method of printing or applying a solder cream, which is a suspension of solder powder in a flux, to a solder layer forming portion of a printed wiring board by using a dispenser.
溶融メッキによる方法は、プリント配線板に設けられ
た配線導体の半田層形成箇所以外に、ソルダーレジスト
の被覆を行い、ウエーブ、ドラック、浸漬の手段によっ
て溶融半田とプリント配線板とを接触させることによ
り、半田層を形成する方法である。The method by hot-dip plating is to coat the solder resist on the printed wiring board in addition to the solder layer forming part of the wiring conductor, and to bring the molten solder into contact with the printed wiring board by means of wave, drag, immersion. And a method of forming a solder layer.
しかしながら、従来の半田層の形成方法は、以下に述
べる問題点を有する。However, the conventional method for forming a solder layer has the following problems.
電気メッキによる方法においては、均一な半田組成及
び均一な量を有する半田層を形成することが難かしい。
これは電気メッキにより半田の層を折出させる際に、プ
リント配線板のメッキ折出部において電流密度のバラツ
キが生じるためである。また、電気メッキによる方法で
はプリント配線板の半田層形成箇所には、少なくとも電
気メッキを行う時点で、メッキに用いられる電極と導通
がとられていることが必要であり、プリント配線板に設
けられた配線導体とは別にメッキ用の配線導体を設ける
ことが必要となり、高密度な配線パターンでは前記メッ
キ用の導体回路が形成できない場合が生じる。In the electroplating method, it is difficult to form a solder layer having a uniform solder composition and a uniform amount.
This is because, when the solder layer is bent out by electroplating, a variation in current density occurs at the plated bent portion of the printed wiring board. Further, in the method using electroplating, it is necessary that the solder layer forming portion of the printed wiring board is electrically connected to the electrode used for plating at least at the time of performing the electroplating. It is necessary to provide a wiring conductor for plating separately from the wiring conductor that has been used, and there is a case where a conductor circuit for plating cannot be formed with a high-density wiring pattern.
これに対してソルダークリームを用いる方法及び溶融
メッキによる方法では、前記の如く、メッキ用の配線導
体を設ける必要は無く、所望の位置に半田層が形成でき
る。しかしながら、ソルダークリームを用いる方法にお
いては、ソルダークリーム自体が気泡を含んでいる他
に、ソルダークリームを印刷あるいはディスペンサーに
よりプリント配線板に塗布する際にも気泡を巻き込んで
しまい、塗布した半田が溶融・固化する際に半田層中に
気泡が巻き込まれている場合が多いという欠点を有す
る。また、溶融メッキによる方法では、ソルダーレジス
トにより半田層形成箇所以外を被覆したプリント配線板
と溶融した半田とを接することにより半田の層を形成す
る為、プリント配線板の表面状態、特にソルダーレジス
トの表面状態及び形状の影響を受け易く、均一な量の半
田層を得る事が難かしい他、半田層形成箇所の形状が微
小でソルダーレジストの開孔部の面積が小さい部分で
は、溶融半田が開孔部周囲のソルダーレジストに妨げら
れ、配線導体まで溶融半田が完全には侵入せず、半田の
未着あるいは気泡の巻き込みを起こすという欠点を有す
る。On the other hand, in the method using solder cream and the method using hot-dip plating, as described above, it is not necessary to provide a wiring conductor for plating, and a solder layer can be formed at a desired position. However, in the method using solder cream, in addition to the solder cream itself containing air bubbles, air bubbles are involved when printing the solder cream on the printed wiring board by a dispenser, and the applied solder is melted and melted. There is a disadvantage that air bubbles are often entrained in the solder layer during solidification. In addition, in the method using hot-dip plating, a solder layer is formed by contacting a molten solder with a printed wiring board that covers a portion other than a solder layer forming position with a solder resist. In addition to being easily affected by the surface condition and shape, it is difficult to obtain a uniform amount of solder layer.In addition, in areas where the shape of the solder layer is very small and the area of the solder resist opening is small, the molten solder cannot be opened. It is hindered by the solder resist around the hole, the molten solder does not completely penetrate the wiring conductor, and has a defect that solder does not adhere or bubbles are involved.
(発明が解決しようとする問題点) 従って、従来のプリント配線板の半田層の形成方法に
おいては、上述した様に、プリント配線板の所望の位置
に均一な組成で均一な量の半田の層を得ることが難かし
いという問題点を有する。そして本発明の目的とすると
ころは、上述した従来技術の問題点を除去し、プリント
配線板の任意の位置に均一な組成で均一な量の半田の層
を形成する方法を提供することにある。(Problems to be Solved by the Invention) Therefore, in the conventional method for forming a solder layer of a printed wiring board, as described above, a solder layer having a uniform composition and a uniform amount is formed at a desired position on the printed wiring board. Is difficult to obtain. An object of the present invention is to eliminate the above-mentioned problems of the prior art and to provide a method of forming a uniform amount of solder layer with a uniform composition at an arbitrary position on a printed wiring board. .
(問題点を解決するための手段) 本発明は前記問題点を解決することのできるプリント
配線板の半田層の形成方法、すなわち、プリント配線板
の所望の位置に均一な組成及び量を有する半田の層を形
成する方法を提供するものであり、プリント配線板の配
線導体上に設けられた絶縁層の開孔部に、溶融メッキに
より半田層を形成するプリント配線板の半田層の形成方
法であって、少なくとも前記配線導体上に設けられた絶
縁層の開孔部及びその近傍に、溶融半田メッキを行うこ
とにより、前記金属膜に溶融半田を接触させると同時に
前記金属膜を溶融半田中に拡散させ、前記配線導体上に
溶融半田メッキすることを特徴とするプリント配線板の
半田層の形成方法によって前記目的を達成することがで
きる。(Means for Solving the Problems) The present invention provides a method for forming a solder layer of a printed wiring board capable of solving the above-mentioned problems, that is, a solder having a uniform composition and amount at a desired position on the printed wiring board. A method for forming a solder layer of a printed wiring board, wherein a solder layer is formed by hot-dip plating on an opening of an insulating layer provided on a wiring conductor of the printed wiring board. By performing molten solder plating on at least the opening of the insulating layer provided on the wiring conductor and the vicinity thereof, the molten solder is brought into contact with the metal film and the metal film is simultaneously placed in the molten solder. The above object can be achieved by a method for forming a solder layer of a printed wiring board, wherein the method is performed by diffusing and solder plating on the wiring conductor.
以下、本発明を詳細に説明する。 Hereinafter, the present invention will be described in detail.
本発明に用いられるプリント配線板は、プリント配線
用基板の表面の導体をエッチングなどの方法で所望のパ
ターンに形成した後、絶縁層が形成される。絶縁層の一
例であるソルダーレジストは、ソルダーレジストインク
の印刷、あるいはフォトソルダーレジストのコーティン
グ後、露光、現像することにより形成される。本発明に
よれば、前記のプリント配線板の少なくとも配線導体上
に設けられた絶縁層の開孔部及びその近傍に、溶融した
半田中に拡散可能な金属膜が形成される。前記金属膜に
用いられる金属としては、銅、鉛、錫、金、ニッケル、
パラジウム等の単体あるいはそれらの合金が用いられ
る。例えば、銅は、錫・鉛半田中に250℃以上で拡散が
進行する。この時の銅の厚みは、3μmまでに抑えるこ
とが望ましい。厚みが3μm以上であると、半田中に銅
の膜が拡散せず、半田残りをおこすためである。前記金
属膜の形成方法としては、無電解メッキ、蒸着、スパッ
タリングの手段が用いられる。次いで、溶融メッキが行
われる。溶融メッキは通常の工程の如く、フラックス塗
布後、ウエーブ、ドラック、浸漬により半田層の形成が
行われる。In the printed wiring board used in the present invention, an insulating layer is formed after a conductor on the surface of the printed wiring board is formed into a desired pattern by a method such as etching. A solder resist as an example of the insulating layer is formed by printing with a solder resist ink or coating with a photo solder resist, and then exposing and developing. According to the present invention, a metal film capable of diffusing into the molten solder is formed at least in the opening of the insulating layer provided on the wiring conductor of the printed wiring board and in the vicinity thereof. As the metal used for the metal film, copper, lead, tin, gold, nickel,
A simple substance such as palladium or an alloy thereof is used. For example, copper diffuses in tin / lead solder at 250 ° C. or higher. At this time, the thickness of the copper is desirably suppressed to 3 μm or less. If the thickness is 3 μm or more, the copper film does not diffuse into the solder, and the solder remains. As a method for forming the metal film, means of electroless plating, vapor deposition, and sputtering are used. Next, hot-dip plating is performed. In the hot-dip plating, a solder layer is formed by wave, drag and immersion after flux application as in a normal process.
(発明の作用) 本発明が以上のような手段を採ることによって以下の
ような作用がある。すなわち、溶融メッキは、プリント
配線板上の導体(金属)と絶縁層(非金属)との溶融半
田に対する濡れ性の差を利用して所望の個所、つまり、
露出した導体(金属)上に半田の層を形成する方法であ
る。従って本発明の如く、溶融メッキを行う際に、配線
導体及びその近傍の絶縁層開孔部表面に、溶融した半田
中に拡散可能な厚さ3μm以下の金属膜を形成しておけ
ば、絶縁層の表面状態は溶融半田に対しての漏れ性が著
しく良くなり、溶融半田は前記絶縁層開孔部に均一に回
り込み、微細な開孔部に対しても前記金属膜に沿って溶
融半田が侵入する。さらに、前記金属膜は溶融半田と反
応し、溶融半田中に拡散する為、溶融半田が回り込んだ
後は、プリント配線板の配線導体(金属)及び絶縁層
(非金属)の面が現われる。溶融半田は露出した配線導
体(金属)と金属結合し、絶縁層とは濡れない為、露出
した配線導体(金属)上にのみ半田層が形成される。(Operation of the Invention) The present invention has the following operation by adopting the above means. That is, hot-dip plating is performed at a desired location, that is, by utilizing the difference in wettability of the conductor (metal) and the insulating layer (non-metal) on the printed wiring board with the molten solder,
In this method, a solder layer is formed on an exposed conductor (metal). Therefore, as in the present invention, when hot-dip plating is performed, a metal film having a thickness of 3 μm or less that can be diffused into the molten solder is formed on the wiring conductor and the surface of the insulating layer opening near the wiring conductor. The surface state of the layer has a significantly improved leaking property with respect to the molten solder, the molten solder wraps around the opening of the insulating layer evenly, and the molten solder also extends along the metal film even with the fine opening. invade. Further, since the metal film reacts with the molten solder and diffuses into the molten solder, the surface of the wiring conductor (metal) and the insulating layer (non-metal) of the printed wiring board appears after the molten solder goes around. Since the molten solder is metal-bonded to the exposed wiring conductor (metal) and does not wet the insulating layer, the solder layer is formed only on the exposed wiring conductor (metal).
上述の如く、本発明によれば、溶融半田の回り込みを
向上する際に、金属膜を形成したことにより、均一な
量、均一な組成を有する半田層を所望の位置に形成する
ことが可能である。As described above, according to the present invention, it is possible to form a solder layer having a uniform amount and a uniform composition at a desired position by forming a metal film when improving the wraparound of molten solder. is there.
(実施例) 次に、本発明を実施例によって説明する。(Example) Next, the present invention will be described with reference to examples.
実施例1 この実施例にあたっては、ガラス・エポキシ複合体を
基材(1)とする片面銅張種層板に、エッチングレジス
トをラミネート・露光・現像後、塩化第二銅溶液により
表面の銅箔のエッチングはく膜を行い、配線導体が形成
される。次いで、部分接続部の半田層形成箇所以外の配
線導体を覆うように、絶縁層となるソルダーレジストイ
ンクを印刷後、熱硬化を行い、絶縁層であるソルダーレ
ジスト(3)の層が形成される(第1図)。次いで、導
体回路(2)及びソルダーレジスト(3)の表面に無電
解メッキにより銅膜(4)が形成される(第2図)。前
記のプリント配線板を錫60%、鉛40%よりなる溶融半田
(5)中に浸漬すると、第3図の様に溶融半田が回り込
む。次いで、回り込んだ溶融半田中に銅膜(4)は拡散
する(第4図)。この後、プリント配線板を溶融半田
(5)から引き上げるとソルダーレジスト(3)の開孔
部の配線導体(2)上にのみ半田層(6)が形成される
(第5図)。Example 1 In this example, an etching resist is laminated, exposed and developed on a single-sided copper-clad seed layer plate using a glass-epoxy composite as a substrate (1), and then a copper foil on the surface is coated with a cupric chloride solution. Is performed to form a wiring conductor. Next, a solder resist ink serving as an insulating layer is printed so as to cover the wiring conductors other than the solder layer forming portion of the partial connection portion, and then thermosetting is performed to form a layer of the solder resist (3) serving as the insulating layer. (FIG. 1). Next, a copper film (4) is formed on the surfaces of the conductor circuit (2) and the solder resist (3) by electroless plating (FIG. 2). When the printed wiring board is immersed in a molten solder (5) made of 60% tin and 40% lead, the molten solder wraps around as shown in FIG. Next, the copper film (4) diffuses into the wrapped molten solder (FIG. 4). Thereafter, when the printed wiring board is pulled up from the molten solder (5), the solder layer (6) is formed only on the wiring conductor (2) at the opening of the solder resist (3) (FIG. 5).
実施例2 この実施例にあたっては、実施例1と同様に配線導体
が形成されたプリント配線板上に、光硬化性の液状エポ
キシアクリレート材の被膜を形成後、露光・現像により
半田形成箇所以外にソルダーレジスト(3)の層が形成
されており(第6図)、導体回路(2)及びソルダーレ
ジスト(3)の開孔部周辺に、蒸着により錫膜(7)が
0.2μm形成される(第7図)。次いで、ウエーブ式半
田付けにより鉛50%、インジウム50%よりなる溶融半田
に接触される(第8図)。溶融半田(5)中に錫が拡散
した後(第9図)、鉛・インジウムを組成する半田バン
プ(8)が形成される(第10図)。Example 2 In this example, a film of a photocurable liquid epoxy acrylate material was formed on a printed wiring board on which wiring conductors were formed in the same manner as in Example 1, and then exposed / developed to a portion other than the solder formation portion. A layer of a solder resist (3) is formed (FIG. 6), and a tin film (7) is deposited around the opening of the conductor circuit (2) and the solder resist (3) by vapor deposition.
It is formed in a thickness of 0.2 μm (FIG. 7). Next, it is brought into contact with molten solder consisting of 50% lead and 50% indium by wave soldering (FIG. 8). After tin diffuses into the molten solder (5) (FIG. 9), a solder bump (8) composed of lead and indium is formed (FIG. 10).
実施例3 この実施例にあたっては、ガラス・エポキシ複合体を
基材(1)とする両面銅張積層板にドリル加工により穴
明けが行われた後、無電解メッキによりスルーホールメ
ッキが行われた後、実施例1と同様に、配線導体及びソ
ルダーレジストが形成されたプリント配線板(第11図)
上に無電解メッキにより銅膜(4)が形成される(第12
図)。この基板を錫90%、鉛10%よりなる溶融半田
(5)中に浸漬された後(第13図、第14図)、引き上げ
られる。これによりスルーホール内に半田層(6)が充
填される(第15図)。Example 3 In this example, a double-sided copper-clad laminate using a glass-epoxy composite as a base material (1) was drilled, and then through-hole plating was performed by electroless plating. Thereafter, similarly to Example 1, the printed wiring board on which the wiring conductor and the solder resist are formed (FIG. 11)
A copper film (4) is formed thereon by electroless plating.
Figure). The substrate is immersed in a molten solder (5) made of 90% tin and 10% lead (FIGS. 13 and 14), and then pulled up. As a result, the through-hole is filled with the solder layer (6) (FIG. 15).
実施例4 この実施例にあたっては、実施例3と同様の工程によ
り溶融半田中に浸漬されるが引き上げる際、エアーによ
りスルーホール内の溶融半田の余剰分が除去され、半田
スルーホール(9)が形成される(第16図)。Example 4 In this example, the air was used to immerse the molten solder in the same process as in Example 3. Formed (FIG. 16).
以上の実施例と従来の溶融メッキ法との比較を表1に
示す。Table 1 shows a comparison between the above embodiment and the conventional hot-dip plating method.
(発明の効果) 以上、詳述した通り本発明に係るプリント配線板の半
田層形成方法においては、プリント配線板の配線導体上
に設けられた絶縁層の開口部の近傍に、溶融半田メッキ
を行うことにより、前記金属膜に溶融半田を接触させる
と同時に前記金属膜を溶融半田中に拡散させ、前記配線
導体上に溶融半田メッキすることにその特徴があり、こ
れによりプリント配線板に均一な量及び組成を有する半
田の層を形成する方法を提供することができる。 (Effects of the Invention) As described in detail above, in the method for forming a solder layer of a printed wiring board according to the present invention, molten solder plating is applied to the vicinity of the opening of the insulating layer provided on the wiring conductor of the printed wiring board. By carrying out the process, the molten solder is brought into contact with the metal film, and at the same time, the metal film is diffused in the molten solder, and the molten solder is plated on the wiring conductor. A method of forming a layer of solder having an amount and composition can be provided.
第1図〜第5図は本発明に係る半田層の形成方法(実施
例1)を順を追って説明する部分断面図、第6図〜第10
図は本発明に係る半田層の形成方法(実施例2)を順を
追って説明する部分断面図、第11図〜第16図は本発明に
係る半田層の形成方法(実施例3、実施例4)を順を追
って説明する部分断面図である。 符号の説明 1……基材、2……導体回路、3……ソルダーレジス
ト、4……銅膜、5……溶融半田、6……半田層、7…
…錫膜、8……半田バンプ、9……半田スルーホール。1 to 5 are partial cross-sectional views for sequentially explaining a method for forming a solder layer (Example 1) according to the present invention, and FIGS.
11 is a partial cross-sectional view for sequentially explaining a method of forming a solder layer according to the present invention (Example 2). FIGS. 11 to 16 are diagrams illustrating a method of forming a solder layer according to the present invention (Example 3 and Examples). It is a fragmentary sectional view explaining 4) in order. DESCRIPTION OF SYMBOLS 1 ... base material 2 ... conductor circuit 3 ... solder resist 4 ... copper film 5 ... molten solder 6 solder layer 7
... tin film, 8 ... solder bump, 9 ... solder through hole.
Claims (1)
絶縁層の開孔部に、溶融メッキにより半田層を形成する
プリント配線板の半田層の形成方法であって、 少なくとも前記配線導体上に設けられた絶縁層の開孔部
及びその近傍に、溶融した半田中に拡散可能な厚さ3μ
m以下の金属膜を形成した後、溶融半田メッキを行うこ
とにより、前記金属膜に溶融半田を接触させると同時に
前記金属膜を溶融半田中に拡散させ、前記配線導体上に
溶融半田メッキすることを特徴とするプリント配線板の
半田層の形成方法。1. A method for forming a solder layer of a printed wiring board, wherein a solder layer is formed by hot-dip plating in an opening of an insulating layer provided on a wiring conductor of the printed wiring board, the method comprising: A thickness of 3 μm, which can be diffused into the molten solder, at and near the opening of the insulating layer provided at
m or less, after forming a metal film, by performing molten solder plating, the molten solder is brought into contact with the metal film, and at the same time, the metal film is diffused into the molten solder, and the molten solder is plated on the wiring conductor. A method for forming a solder layer on a printed wiring board, the method comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62181752A JP2596754B2 (en) | 1987-07-20 | 1987-07-20 | Method of forming solder layer of printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62181752A JP2596754B2 (en) | 1987-07-20 | 1987-07-20 | Method of forming solder layer of printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6424494A JPS6424494A (en) | 1989-01-26 |
JP2596754B2 true JP2596754B2 (en) | 1997-04-02 |
Family
ID=16106267
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62181752A Expired - Lifetime JP2596754B2 (en) | 1987-07-20 | 1987-07-20 | Method of forming solder layer of printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2596754B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02113592A (en) * | 1988-10-21 | 1990-04-25 | Mitsubishi Electric Corp | Manufacture of circuit board |
JP2012034073A (en) * | 2010-07-29 | 2012-02-16 | Konica Minolta Opto Inc | Lens unit, camera module, and portable terminal |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49129479A (en) * | 1973-04-11 | 1974-12-11 |
-
1987
- 1987-07-20 JP JP62181752A patent/JP2596754B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS6424494A (en) | 1989-01-26 |
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