JPS63293899A - Multi-layered circuit board - Google Patents
Multi-layered circuit boardInfo
- Publication number
- JPS63293899A JPS63293899A JP12916887A JP12916887A JPS63293899A JP S63293899 A JPS63293899 A JP S63293899A JP 12916887 A JP12916887 A JP 12916887A JP 12916887 A JP12916887 A JP 12916887A JP S63293899 A JPS63293899 A JP S63293899A
- Authority
- JP
- Japan
- Prior art keywords
- weight
- conductor
- glass frit
- glass
- paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims abstract description 52
- 239000011521 glass Substances 0.000 claims abstract description 42
- 239000000463 material Substances 0.000 claims abstract description 20
- 239000000919 ceramic Substances 0.000 claims abstract description 11
- 239000000843 powder Substances 0.000 claims abstract description 11
- 239000011230 binding agent Substances 0.000 claims abstract description 6
- 239000002904 solvent Substances 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 25
- 239000000203 mixture Substances 0.000 claims description 13
- 239000002667 nucleating agent Substances 0.000 claims description 3
- 238000009472 formulation Methods 0.000 claims 1
- 238000002156 mixing Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 40
- 238000010304 firing Methods 0.000 description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 239000010931 gold Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- BYFGZMCJNACEKR-UHFFFAOYSA-N aluminium(i) oxide Chemical compound [Al]O[Al] BYFGZMCJNACEKR-UHFFFAOYSA-N 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000002241 glass-ceramic Substances 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- QTBSBXVTEAMEQO-UHFFFAOYSA-M Acetate Chemical compound CC([O-])=O QTBSBXVTEAMEQO-UHFFFAOYSA-M 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000001856 Ethyl cellulose Substances 0.000 description 1
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 125000000484 butyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000010344 co-firing Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920001249 ethyl cellulose Polymers 0.000 description 1
- 235000019325 ethyl cellulose Nutrition 0.000 description 1
- BBKFSSMUWOMYPI-UHFFFAOYSA-N gold palladium Chemical compound [Pd].[Au] BBKFSSMUWOMYPI-UHFFFAOYSA-N 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 101150042512 mqo3 gene Proteins 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- -1 warping Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
この発明は、銀、銀−パラジウム、金、銅などの低抵抗
金属と同時焼成でき、高集積化したLS■を多数搭載す
るためのセラミックス多層配線板についての技術分野に
属する。[Detailed Description of the Invention] [Technical Field] The present invention provides a ceramic multilayer wiring board that can be co-fired with low resistance metals such as silver, silver-palladium, gold, and copper, and is capable of mounting a large number of highly integrated LS. belongs to the technical field of
近年、高集積化したLSIや各種の素子を多数搭載する
ための多層配線基板においては、小型化や高信頼性の要
求が高まるにつれて、セラミックス材の利用が拡がって
き′ζいる。セラミックス祠を用いた多層配線基板は、
アルミナを主材にしてグリーンシート上に高融点金属(
Mo、W等)の導体配線を厚膜技術により印刷形成する
。そのあと、このグリーンシートを数層重ね合わせて積
層し、約1500〜1600℃の高温非酸化雰囲気中で
焼成する。In recent years, as demands for miniaturization and high reliability have increased in multilayer wiring boards for mounting highly integrated LSIs and large numbers of various elements, the use of ceramic materials has been expanding. Multilayer wiring board using ceramics
The main material is alumina, and a high melting point metal (
Conductive wiring (Mo, W, etc.) is printed using thick film technology. Thereafter, several layers of the green sheets are stacked one on top of the other and fired in a high temperature non-oxidizing atmosphere at about 1500 to 1600°C.
しかし、上述のようなアルミナを主材料とする配線基板
では、アルミナの高い比誘電率と、高い抵抗値を有する
極細高融点金属配線によって、配線板の配線中を伝搬す
る信号の伝達時間が長(なり、高速化の要望に応え難か
った。もちろん、高抵抗の高融点金属材料の代わりに、
低抵抗金属飼料(Au、Ag、Ag−Pd、Cu等)を
使って配線を形成することも考えられる。しかしながら
、上記の各低抵抗金属材料は融点が1000℃付近であ
り、アルミナの焼結温度よりもはるかに低くなっている
。そのため、仮に用いたとしても、焼結以前に配線パタ
ーンが融解して表面張力で収縮し断線してしまうという
問題があった。However, in wiring boards mainly made of alumina as described above, the transmission time of signals propagating through the wiring of the wiring board is long due to the high dielectric constant of alumina and the ultra-fine refractory metal wiring with high resistance. (As a result, it was difficult to meet the demand for higher speeds.Of course, instead of using high-resistance, high-melting-point metal materials,
It is also conceivable to form wiring using low resistance metal materials (Au, Ag, Ag-Pd, Cu, etc.). However, each of the above-mentioned low-resistance metal materials has a melting point of around 1000° C., which is much lower than the sintering temperature of alumina. Therefore, even if it were used, there was a problem that the wiring pattern would melt before sintering, shrink due to surface tension, and break.
この問題を解決するため、ガラス、あるいはガラス粉末
焼結体(ガラス−セラミックス体)によヮて配線基板を
製造する試みが、特願昭61−057341号公報、特
願昭61−013357号公報に開示されている。In order to solve this problem, attempts have been made to manufacture wiring boards using glass or glass powder sintered bodies (glass-ceramic bodies), as disclosed in Japanese Patent Application No. 61-057341 and Japanese Patent Application No. 61-013357. has been disclosed.
このような、ガラス粉末焼結体(ガラス−セラミックス
体)を配線基板に応用する場合には、ガラス粉末からな
るグリーンシート上に導体を印刷し、積層、焼成して目
的の多層配線板を得るのであるが、その際導体ペースト
としては、多層板の内層に用いるものについては、基板
との密着力はそれ程必要とされないが、焼成時の収縮特
性のマツチングがうまく行かないと、焼成基板の反り、
割れの原因となり不良品となってしまう。また多層配線
板の外層に用いるものについては、マツチングに加え、
密着力の大きいことが要求される。When applying such a glass powder sintered body (glass-ceramic body) to a wiring board, a conductor is printed on a green sheet made of glass powder, laminated, and fired to obtain the desired multilayer wiring board. However, in this case, the conductor paste used for the inner layer of a multilayer board does not require much adhesion to the board, but if the shrinkage characteristics during firing are not matched properly, the fired board may warp. ,
This may cause cracks and result in defective products. In addition to matching, for the outer layer of multilayer wiring boards,
High adhesion is required.
さらに、導体本来の特性としてシート抵抗の低いことが
要求される。Furthermore, a low sheet resistance is required as an inherent characteristic of the conductor.
従来、アルミナ配線板においては、このような導体ペー
ストとして絶縁基板材料と同じ組成のガラス材料を、導
体金属に添加し使用してきたが、ガラス系多層配線基板
では、ガラスの添加量が少ないと、絶縁層と導体との収
縮特性が合わず、反り、割れの原因となった。また、ガ
ラスの添加量が多くなると、シート抵抗が高くなるとい
う問題があった。Conventionally, in alumina wiring boards, a glass material with the same composition as the insulating substrate material has been added to the conductor metal as a conductive paste, but in glass-based multilayer wiring boards, if the amount of glass added is small, The shrinkage characteristics of the insulating layer and the conductor did not match, causing warping and cracking. Furthermore, there was a problem in that sheet resistance increased when the amount of glass added increased.
回路導体と基板とのマツチングが良く、シート抵抗の低
い配線が形成されているガラス系多層配線板を提供する
ことを目的とする。It is an object of the present invention to provide a glass-based multilayer wiring board in which circuit conductors and substrates are well matched and wiring with low sheet resistance is formed.
本発明は、重量%表示組成が、
48≦SiO□ ≦63
10≦Al2O,≦25
105MgO≦25
4≦B2O3 ≦10
でかつ、前記MgOのうちのO〜20重景%が、BaO
1SrO,CaOからなる群より選ばれた少なくとも1
つで置換されてなり、かつ必要に応じて、T 10 !
、Z r 02 、、S n Oz XP 205、
MQO3、Taz Os% Nbz Os 、AS20
、からなる群より選ばれた少なくとも1つの核発生剤が
、主成分に対し3重量%以下の割合で添加されてなるガ
ラス組成物の中から選ばれたセラミック基板材料からな
る多層配線板であって、内層回路用導体ペースト(内層
ランド部分も含む)および最外層ランド部分の導体ペー
ストとして特定の導体ペーストを使用したことを特徴と
する多層配線板を提供するものである。In the present invention, the weight percent composition is as follows: 48≦SiO□≦63 10≦Al2O,≦25 105MgO≦25 4≦B2O3≦10, and O to 20% of the MgO is BaO
At least one selected from the group consisting of 1SrO, CaO
and optionally T 10 !
,Z r 02 ,,S n Oz XP 205,
MQO3, Taz Os% Nbz Os, AS20
, a multilayer wiring board made of a ceramic substrate material selected from a glass composition in which at least one nucleating agent selected from the group consisting of is added in a proportion of 3% by weight or less to the main component. The present invention provides a multilayer wiring board characterized in that a specific conductor paste is used as a conductor paste for an inner layer circuit (including an inner layer land portion) and a conductor paste for an outermost layer land portion.
上記のガラス系多層配線基板に対してマツチングの優れ
た導体ペーストとして、低抵抗導体粉末100重量部、
ガラスフリット0.5〜10重量部、有機バインダー1
0〜50重量部および、適当量の溶剤からなる導体ペー
ストを使用するが、多層配線板の内層回路用ないし内層
ランド部分用の導体ペーストとしては、基板ガラス材料
の軟化温度よりも高いガラスを配合したものを使用する
。100 parts by weight of low-resistance conductor powder as a conductor paste with excellent matching for the above-mentioned glass-based multilayer wiring board;
Glass frit 0.5-10 parts by weight, organic binder 1
A conductive paste consisting of 0 to 50 parts by weight and an appropriate amount of solvent is used, but as the conductive paste for the inner layer circuit or inner layer land portion of the multilayer wiring board, a glass whose softening temperature is higher than that of the substrate glass material is mixed. Use the one you made.
軟化温度を高くした理由は、次の通りである。The reason for increasing the softening temperature is as follows.
すなわち、第2図に示したように、基板材料の焼成時の
収縮曲線と導体との収縮曲線はかなり違う。なお、この
図で曲線(イ)、(ロ)は導体の収縮曲線を表わし、(
ハ)は基板の収縮曲線を表わしている。ただし、(イ)
の導体は金(Au)、(ロ)の導体は金−パラジウム(
Ag/pd=80/20)である。低抵抗導体(金属)
としては、金、銀、銅などがよく知られているが、これ
らの融点は、1000℃付近であり、基板の収縮開始温
度よりもかなり早い時期から収縮を開始する。That is, as shown in FIG. 2, the shrinkage curve of the substrate material during firing and the shrinkage curve of the conductor are quite different. In this figure, curves (a) and (b) represent the contraction curves of the conductor, and (
c) represents the shrinkage curve of the substrate. However, (a)
The conductor in (b) is gold (Au), and the conductor in (b) is gold-palladium (
Ag/pd=80/20). Low resistance conductor (metal)
Gold, silver, copper, etc. are well known as materials, but their melting points are around 1000° C., and they start shrinking much earlier than the shrinkage start temperature of the substrate.
従って導体組成の収縮曲線を基板のそれに近づけること
により、基板と導体との同時焼成における反り、割れ不
良を軽減することができる。そこで、基板材料と同じガ
ラスフリットを添加することが考えられるが、かなりの
量添加すれば、マツチングは取れるが、導体のシート抵
抗がかなり上昇してしまう。そこで、基板材料ガラスフ
リットよりも軟化温度の高い(好ましくは30〜50℃
)ガラスフリットを添加すると、少量でマツチングが取
れ、導体のシート抵抗もそれ程上昇しない。Therefore, by bringing the shrinkage curve of the conductor composition closer to that of the substrate, it is possible to reduce warping and cracking defects during simultaneous firing of the substrate and the conductor. Therefore, it is possible to add the same glass frit as the substrate material, but if a considerable amount is added, matching can be achieved, but the sheet resistance of the conductor will increase considerably. Therefore, the softening temperature is higher than that of the substrate material glass frit (preferably 30 to 50°C).
) When glass frit is added, matching can be achieved with a small amount, and the sheet resistance of the conductor does not increase significantly.
しかし、この導体ペーストを用い、多層基板を製造する
と、多層配線板の最外層の導体は、基板との十分な密着
力が得られない。よって前記多層板の最外層導体は同時
焼成せずに、内層回路を形成した後(基板焼結した状B
)、外層用導体を印刷、焼成する。しかしこの場合、外
層のランド部分だけは、内層回路形成時に形成しておか
ないと、内層回路と外層回路との接続信頼性が落ちる。However, when a multilayer board is manufactured using this conductive paste, the conductor in the outermost layer of the multilayer wiring board does not have sufficient adhesion to the board. Therefore, the outermost layer conductor of the multilayer board is not fired at the same time, but after the inner layer circuit is formed (substrate sintered state B).
), print and fire the outer layer conductor. However, in this case, unless the land portion of the outer layer is formed at the time of forming the inner layer circuit, the connection reliability between the inner layer circuit and the outer layer circuit will deteriorate.
従って、ランド部分だけは、同時焼成により、密着力の
ある導体形成が必要になる。それには、基板材料の軟化
温度よりも低い(好ましくは30から50℃)ガラスフ
リットを添加することにより解決できる。しかし、あま
り温度差をつけすぎると小さなランドと言えども反り、
クラックが発生しやすくなる。またガラスフリットも基
板材料ガラスに近い組成の方が、なじみが良く好都合で
ある。。Therefore, it is necessary to form a conductor with good adhesion by co-firing only the land portion. This can be solved by adding a glass frit whose softening temperature is lower than the softening temperature of the substrate material (preferably 30 to 50° C.). However, if the temperature difference is too large, even a small land will warp.
Cracks are more likely to occur. Furthermore, it is advantageous for the glass frit to have a composition similar to that of the substrate material glass, as it is more compatible with the glass frit. .
以上において説明した導体ペーストを利用して製造した
多層配線板の例を第1図に示す。FIG. 1 shows an example of a multilayer wiring board manufactured using the conductor paste described above.
すなわち、第1図は多層配線板の構成を説明するための
層構成を示す模式図である。この図において(イ)は、
グリーンシートに導体ペーストを印刷したものを、4層
用意した状態を示す図であり、5aは外層用のグリーン
シートで、これには外層用の導体ペーストが、外層ラン
ド部分l、外層回路部分2として印刷されている。ただ
し、外層ランド部分l用の導体ペーストは前記の、基板
材料よりも軟化温度の低いガラスを配合した導体ベース
I・で形成され、かつ同時焼成されるが、外層回路部分
2用の導体ペーストは必ずしも同時焼成されない。むし
ろ、外層回路部分2のみは、内層回路および外層ランド
部分を焼成した後、印刷、焼成するのが好ましい。一方
、5bは内層用グリーンシートで、これには内層用の導
体ペーストが内層ランド部分3、内層回路部分4として
印刷されている。この部分は必ず同時焼成される。That is, FIG. 1 is a schematic diagram showing a layer structure for explaining the structure of a multilayer wiring board. In this diagram, (a) is
This is a diagram showing a state in which four layers are prepared by printing conductor paste on a green sheet. 5a is a green sheet for the outer layer, and the conductor paste for the outer layer is applied to the outer layer land portion l, the outer layer circuit portion 2. is printed as. However, the conductor paste for the outer layer land portion l is formed from the conductor base I, which contains glass with a lower softening temperature than the substrate material, and is fired at the same time, but the conductor paste for the outer layer circuit portion 2 is Not necessarily fired at the same time. Rather, it is preferable to print and fire only the outer layer circuit portion 2 after firing the inner layer circuit and the outer layer land portion. On the other hand, 5b is an inner layer green sheet, on which conductor paste for the inner layer is printed as inner layer land portions 3 and inner layer circuit portions 4. This part is always fired at the same time.
以上のグリーンシー)5a、5bを重ねて焼成すると、
第1図(ロ)のように、スルホール部分において、外層
ランド部分用導体と内層用導体が融合し、接続信顛性に
優れた多層配線板が得られる。When the above Green Sea) 5a and 5b are stacked and fired,
As shown in FIG. 1(b), the conductor for the outer layer land portion and the conductor for the inner layer are fused in the through-hole portion, resulting in a multilayer wiring board with excellent connection reliability.
なお、導体ペースト用のガラスフリットは、前記の基板
用のガラス組成と同系の組成であって、配合量を変化さ
せることにより軟化温度を変化させたものであることが
望ましい。Note that it is desirable that the glass frit for the conductor paste has a composition similar to the glass composition for the substrate described above, and that the softening temperature is changed by changing the blending amount.
以下、実施例に基づいて、さらに詳しく説明する。Hereinafter, it will be explained in more detail based on examples.
(実施例)
■ ガラスの溶融
第1表に示したような、配合割合になるように原材料を
混合し、1450℃でガラス溶融を行ない、水に投入し
て急冷しガラスフリットを得た。(Example) (1) Melting of Glass Raw materials were mixed in the proportions shown in Table 1, glass was melted at 1450°C, and the glass was quenched by pouring into water to obtain a glass frit.
そのガラスの軟化温度を第1表に示した。Table 1 shows the softening temperature of the glass.
■ グリーンシートの作成
上記フリットを、アルミナ質ボールミルで粉砕し、平均
粒径が1〜10μmの粉末にした。(2) Preparation of Green Sheet The above frit was ground in an alumina ball mill to form a powder with an average particle size of 1 to 10 μm.
つぎに、この粉末に、アクリル樹脂、分散剤、可塑剤、
溶剤を加えて混練し、減圧下で脱泡処理し、常法のドク
ターブレード法で0.2龍のグリーンシートを作成した
。Next, add acrylic resin, dispersant, plasticizer,
A solvent was added and kneaded, followed by defoaming treatment under reduced pressure, and a 0.2 dragon green sheet was prepared using a conventional doctor blade method.
■ 導体ペーストの作成
第2表に示したような配合になるように、導体金属粉、
ガラス粉、および予めエチルセルロースをブチルカルピ
トールアセテートに溶解させた有機バインダーを、印刷
しやすい粘度になるように添加し、十分に混練し、導体
ペーストを得た。■ Preparation of conductor paste Add conductor metal powder,
Glass powder and an organic binder prepared by dissolving ethyl cellulose in butyl carpitol acetate in advance were added to a viscosity suitable for printing, and thoroughly kneaded to obtain a conductive paste.
■ 多層基キ反の作成
グリーンシートに導体ペーストを印刷し乾燥した後、複
数枚を積層し、70℃、100kg/cdのプレス成形
条件で成形体を作成した。(2) Preparation of multilayer substrate After printing a conductive paste on a green sheet and drying it, a plurality of sheets were laminated to form a molded body under press molding conditions of 70° C. and 100 kg/cd.
この成形体を、第3図に示すような焼成モードで焼成し
、シート抵抗、導体の基板との密着性、反り、層間ハク
リ、導体ハクリ (最外層のランド部分)について評価
を行なった。This molded body was fired in the firing mode shown in FIG. 3, and the sheet resistance, adhesion of the conductor to the substrate, warping, interlayer peeling, and conductor peeling (outermost layer land portion) were evaluated.
その結果を第2表に示す。The results are shown in Table 2.
[以下、余白]
[発明の効果]
この発明は、重量%表示組成が、
48≦Sing ≦63
10≦A1zCh≦25
10≦MgO≦25
4≦B20. ≦10
でかつ、前記MgOのうちの0〜20重量%が、Ba5
s SrO,CaOからなる群より選ばれた少なくとも
1つで置換されてなり、かつ必要に応じて、T i O
z 、Z r O2、S n O2、P z Os、M
oO3、Tax Os 、Nbz 05 、As2O、
からなる群より選ばれた少なくとも1つの核発生剤が、
主成分に対し3重量%以下の割合で゛添加されてなるガ
ラス組成物の中から選ばれたセラミック基板材料からな
る多層配線板であって、内層回路用導体ペーストとして
は、セラミック基板材料よりも軟化温度の高いガラスフ
リットを配合した導体ペーストを使用し、最外層ランド
部分用導本ペーストとしては、セラミック基板材料より
も軟化温度の低いガラスフリットを配合した導体ぺ−ス
トを使用したことを特徴とするので、基板とのマツチン
グが良く、シート抵抗の低い導体を有する多層配線板が
提供できた。[Hereinafter, blank spaces] [Effects of the Invention] In the present invention, the composition expressed in weight percent is as follows: 48≦Sing≦63 10≦A1zCh≦25 10≦MgO≦25 4≦B20. ≦10 and 0 to 20% by weight of the MgO is Ba5
s Substituted with at least one selected from the group consisting of SrO and CaO, and if necessary, T i O
z, Z r O2, S n O2, P z Os, M
oO3, TaxOs, Nbz05, As2O,
At least one nucleating agent selected from the group consisting of
A multilayer wiring board made of a ceramic substrate material selected from among glass compositions in which 3% by weight or less is added to the main components, and which is used as a conductive paste for inner layer circuits rather than ceramic substrate materials. A conductor paste containing glass frit with a high softening temperature is used, and the conductor paste for the outermost land portion is a conductor paste containing glass frit with a lower softening temperature than the ceramic substrate material. Therefore, it was possible to provide a multilayer wiring board having a conductor that matches well with the substrate and has a low sheet resistance.
第1図は、この発明に係る多層配線板の構成を示す模式
図、第2図は、導体における焼成温度と収縮率の関係を
説明するだめのグラフ、第3図は、焼成モードの一例を
示すグラフである。
lは外層ランド部分
2は外層回路部分
3は内層ランド部分
4は内層回路部分
5a、5bはグリーンシート
特許出願人 松下電工株式会社
代理人弁理士 竹元 敏丸(ほか2名)第1図
(イ)
(ロ)FIG. 1 is a schematic diagram showing the structure of a multilayer wiring board according to the present invention, FIG. 2 is a graph illustrating the relationship between firing temperature and shrinkage rate in a conductor, and FIG. 3 is an example of a firing mode. This is a graph showing. l is the outer layer land portion 2 is the outer layer circuit portion 3 is the inner layer land portion 4 is the inner layer circuit portion 5a, 5b is the green sheet Patent applicant Toshimaru Takemoto (and 2 other people, patent attorney representing Matsushita Electric Works Co., Ltd.) Figure 1 ( b) (b)
Claims (1)
、SrO、CaOからなる群より選ばれた少なくとも1
つで置換されてなり、かつ必要に応じて、TiO_2、
ZrO_2、SnO_2、P_2O_5、MoO_3、
Ta_2O_5、Nb_2O_5、As_2O_3から
なる群より選ばれた少なくとも1つの核発生剤が、主成
分に対し3重量%以下の割合で添加されてなるガラス組
成物の中から選ばれたセラミック基板材料からなる多層
配線板であって、内層回路用導体ペーストとして下記(
A)の導体ペーストを使用し、最外層ランド部分用導体
ペーストとして下記(B)の導体ペーストを使用したこ
とを特徴とする多層配線板。 (A)配合が、 低抵抗導体粉末 100重量部 ガラスフリット 0.5〜10重量部 有機バインダー 10〜50重量部 および適当量の溶剤からなり、かつ前記ガラスフリット
が、セラミック基板材料よりも軟化温度の高いものであ
る導体ペースト。 (B)配合が、 低抵抗導体粉末 100重量部 ガラスフリット 0.5〜10重量部 有機バインダー 10〜50重量部 および適当量の溶剤からなり、かつ前記ガラスフリット
が、セラミック基板材料よりも軟化温度の低いものであ
る導体ペースト。(1) The composition expressed in weight% is 48≦SiO_2≦63 10≦Al_2O_3≦25 10≦MgO≦25 4≦B_2O_3≦10, and 0 to 20% by weight of the MgO is BaO
, SrO, and CaO.
and optionally, TiO_2,
ZrO_2, SnO_2, P_2O_5, MoO_3,
A multilayer made of a ceramic substrate material selected from a glass composition in which at least one nucleating agent selected from the group consisting of Ta_2O_5, Nb_2O_5, and As_2O_3 is added at a ratio of 3% by weight or less to the main component. For wiring boards, the following (
A multilayer wiring board characterized in that the conductor paste of A) is used, and the conductor paste of the following (B) is used as the conductor paste for the outermost land portion. (A) The formulation consists of 100 parts by weight of low resistance conductor powder, 0.5 to 10 parts by weight of glass frit, 10 to 50 parts by weight of organic binder, and an appropriate amount of solvent, and the glass frit has a softening temperature lower than that of the ceramic substrate material. Conductor paste with high quality. (B) The composition consists of 100 parts by weight of low resistance conductor powder, 0.5 to 10 parts by weight of glass frit, 10 to 50 parts by weight of organic binder, and an appropriate amount of solvent, and the glass frit has a softening temperature lower than that of the ceramic substrate material. conductor paste, which has a low
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12916887A JPS63293899A (en) | 1987-05-26 | 1987-05-26 | Multi-layered circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12916887A JPS63293899A (en) | 1987-05-26 | 1987-05-26 | Multi-layered circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63293899A true JPS63293899A (en) | 1988-11-30 |
Family
ID=15002821
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12916887A Pending JPS63293899A (en) | 1987-05-26 | 1987-05-26 | Multi-layered circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63293899A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004319706A (en) * | 2003-04-15 | 2004-11-11 | Ngk Spark Plug Co Ltd | Conductive paste, and multilayer substrate and its manufacturing method |
JP2010177383A (en) * | 2009-01-28 | 2010-08-12 | Ngk Spark Plug Co Ltd | Multilayer ceramic substrate, method of manufacturing the same, and probe card |
-
1987
- 1987-05-26 JP JP12916887A patent/JPS63293899A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004319706A (en) * | 2003-04-15 | 2004-11-11 | Ngk Spark Plug Co Ltd | Conductive paste, and multilayer substrate and its manufacturing method |
JP2010177383A (en) * | 2009-01-28 | 2010-08-12 | Ngk Spark Plug Co Ltd | Multilayer ceramic substrate, method of manufacturing the same, and probe card |
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