JPS63291014A - Opto-electronic integrated circuit board device - Google Patents
Opto-electronic integrated circuit board deviceInfo
- Publication number
- JPS63291014A JPS63291014A JP12667587A JP12667587A JPS63291014A JP S63291014 A JPS63291014 A JP S63291014A JP 12667587 A JP12667587 A JP 12667587A JP 12667587 A JP12667587 A JP 12667587A JP S63291014 A JPS63291014 A JP S63291014A
- Authority
- JP
- Japan
- Prior art keywords
- boards
- board
- waveguide
- light emitting
- oeic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005693 optoelectronics Effects 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 230000003287 optical effect Effects 0.000 claims abstract description 20
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 239000004071 soot Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Couplings Of Light Guides (AREA)
- Optical Integrated Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は、光集積回路基板の複数個、あるいはこれらと
導波路基板の複数個を組合せた光集積回路基板装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an optical integrated circuit board device including a plurality of optical integrated circuit boards or a combination of these and a plurality of waveguide boards.
〈従来の技術〉
光集積回路基板（以下、０ＲＩＣ基板という）は、電子
素子／回路部分と光素子／回路部分とが混在されてなり
、従来のものにあっては、一般に独立した一個の基板と
して提供されていた。<Prior art> An optical integrated circuit board (hereinafter referred to as an ORIC board) is made up of a mixture of electronic elements/circuit parts and optical elements/circuit parts, and in the conventional one, it is generally a single independent board. It was offered as.
〈発明が解決しようとする問題点〉
従って、このような従来の０ＥＩＣ基板の場合、−個の
基板を一つのユニットやモジュールとして、多数のもの
を有機的に組合せて、いろいろな使用態様に対応させた
り、あるいはこの組合せの過程で、装置全体の光配線ラ
インの領域割合を増やして、信号の遅延やクロストーク
による電子素子／回路の性能限界を改善する等のことも
できなかった。<Problems to be Solved by the Invention> Therefore, in the case of such conventional 0EIC boards, a large number of boards can be organically combined into one unit or module to accommodate various usage modes. In the process of this combination, it has not been possible to improve the performance limits of electronic elements/circuits due to signal delay and crosstalk by increasing the area ratio of optical wiring lines in the entire device.
〈問題点を解決するための手段〉
本発明は、このように実情に鑑みてなされたものであり
、その特徴とするところは、一つの０ＥＩＣ基板を一つ
のユニットやモジュールとして捉え、これらの０ＥＩＣ
基板の複数個、あるいはこれらと導波路基板の複数個を
適宜隣接する等して組み合わせて装置化した０ＥＩＣ基
板装置にある。<Means for Solving the Problems> The present invention was made in view of the above-mentioned circumstances, and its characteristics are that one 0EIC board is regarded as one unit or module, and these 0EIC
The present invention is an 0EIC substrate device in which a plurality of substrates or a plurality of waveguide substrates are combined as appropriate adjacent to each other.
〈作用〉
従って、本発明では、種々の使用態様に対応することが
でき、また、装置全体において、光配線ライン領域の拡
大が容易なため、信号処理速度の高速化が容易に行なえ
る。<Operation> Therefore, the present invention can be adapted to various usage modes, and since the optical wiring line area can be easily expanded in the entire device, the signal processing speed can be easily increased.
〈実施例〉
第１図は本発明に係る０ＥＩＣ基板装置の一実施例を示
したものである。<Embodiment> FIG. 1 shows an embodiment of an 0EIC substrate device according to the present invention.
図において、］・・・ば正六角形状のワンチップからな
る０ＢＩＣ基板で、やはり正六角形状のワンチップから
なる導波路基板２の外周に６個配置しである。In the figure, . . . is an 0BIC board consisting of one regular hexagonal chip, and six pieces are arranged around the outer periphery of a waveguide substrate 2 also consisting of one regular hexagonal chip.
上記○ＥＩＣ基板１は、ＧａＡｓ、Ｉ ｎＰ、Ｇａ Ａ
ｓ ／ Ｓ ｉ、ＴｎＰ／Ｓｉ等のヘース基板を用い
、このヘース基板上にＧａＡｓ系の高速光ＩＣやＳｉ系
ＩＣ等の各素子部品域３を設けると共に、他の基板１，
２と隣接する縁部には半導体レーザ（ＬＤ）、多重量子
井戸型レーザ（ＭＱＷｌ、、Ｄ）、発光ダイオード（Ｌ
Ｅ Ｄ ）等の発光素子４、およびフォトダイオード
（ＰＤ）、アバランシェフォ１−ダイオ−）”（ＡＰＤ
）等の受光素子５を適宜組合せで設けである。The above ○EIC substrate 1 is made of GaAs, InP, GaA
A Heath substrate such as s/Si, TnP/Si, etc. is used, and each element component region 3 such as a GaAs-based high-speed optical IC or a Si-based IC is provided on this Heath substrate, and other substrates 1,
On the edge adjacent to
A light emitting element 4 such as E D ), a photodiode (PD), an avalanche photodiode
), etc., are provided in appropriate combinations.
上記導波路基板２は、Ｓｉ、ＳｉＯ□、１．、ｊＮｂＯ
３、ガラス等のヘース基板を用い、この基板」−にガラ
ス埋込み法、光フアイバ埋込み法、コツトインチューブ
法、電解イオン拡散法、薄膜法、スート堆積法等により
所望本数の導波路６・・・が形成しである。The waveguide substrate 2 is made of Si, SiO□, 1. ,jNbO
3. Using a Heath substrate made of glass or the like, the desired number of waveguides 6...・is formed.
そして、上記のように組み合わせた状態では、隣接する
一方のＯＥ■Ｃ基板１の発光素子４は、隣接する他方の
０ＢＩＣ基板１の受光素子５と直接または導波路基板２
の導波路６を介して対峙され、光学的に接続されている
。In the combined state as described above, the light emitting element 4 of one adjacent OEIC substrate 1 is directly connected to the light receiving element 5 of the other adjacent 0BIC substrate 1 or the waveguide substrate 2.
are faced to each other and optically connected via a waveguide 6.
従って、各０ＢＩＣ基板１・・・の場合、直接隣接する
基板同志の場合は勿論のこと、導波路基板２を隔てた他
の基板とも複雑に接続される。Therefore, in the case of each 0BIC board 1 . . . , not only directly adjacent boards but also other boards across the waveguide board 2 are connected in a complicated manner.
このため、ある一つの０ＥＩＣ基板１の各素子部分で処
理された信号は、発光素子４と受光素子５の光配線ライ
ンを通じて、あるいは発光素子４と導波路基板２の導波
路６と受光素子５の光配線ラインを通じて、光速度で他
の０ＢＩＣ基板１に伝達される。このようにして伝達さ
れた信号はこの０ＥＩＣ基板１の各素子部分で所望の処
理が施され、上記同様にして、さらに他の○ＥＩＣ基板
１に伝達される。これらの繰り返しにより、信号処理が
完了する。Therefore, the signals processed in each element part of a certain 0EIC board 1 are transmitted through the optical wiring line between the light emitting element 4 and the light receiving element 5, or between the light emitting element 4 and the waveguide 6 of the waveguide substrate 2 and the light receiving element 5. The signal is transmitted to other 0BIC boards 1 at the speed of light through the optical wiring line of the 0BIC board 1. The signals thus transmitted are subjected to desired processing in each element portion of this 0EIC substrate 1, and are further transmitted to other 0EIC substrates 1 in the same manner as described above. By repeating these steps, signal processing is completed.
本実施例では、６個の０ＢＩＣ基板１・・・と１個の導
波路基板２との組合せであったが、この組合せの個数は
、特に限定されず、例えば第２図に示したようにその個
数を適宜増やして、任意のｊ、■合せ態様を取ることが
可能である。In this embodiment, six 0BIC substrates 1... and one waveguide substrate 2 are combined, but the number of such combinations is not particularly limited, and for example, as shown in FIG. By increasing the number appropriately, it is possible to take any form of combination of j and (2).
第３図は本発明に係る０ＥＩＣ基板装置の他の実施例を
示したものである。FIG. 3 shows another embodiment of the 0EIC substrate device according to the present invention.
図において、１１・・は正四角形状のワンチップからな
る○ＥＴＣ基板で、やはり正四角形状のワンチップから
なる導波路基板１２と市松模様状に各３個づつ配置しで
ある。In the figure, reference numerals 11, . . . are OETC substrates each consisting of one square chip, and three ETC substrates each are arranged in a checkerboard pattern with a waveguide substrate 12 also consisting of one square chip.
」−記０ＥＴＣ基板１１は、ＧａＡｓ、ＩｎＰ、Ｇ ａ
Ａ ｓ ／ Ｓ ｉ、Ｔ ｎ Ｐ ／ Ｓ ｊ等のヘ
ース基板を用い、このヘース基板」二にはＧａＡｓ系の
高速光ＩＣやＳｉ系ＩＣ等の各素子部品域１３を設ける
と共に、導波路基板１２と隣接する縁部には半導体レー
ザ（ＬＤ）、多重量子井戸型レーザ（ＭＱＷＬＤ）、発
光ダイオード（Ｌ Ｅ Ｄ ）等の発光素子１４、およ
びフォトダイオード（ＰＤ）、アバランシェフォトダイ
オード（ＡＰＤ）等の受光素子１５を、例えば各１個づ
つ設けである。”-0ETC substrate 11 is made of GaAs, InP, Ga
A Heath substrate such as As/S i, TnP/S A light emitting element 14 such as a semiconductor laser (LD), a multiple quantum well laser (MQWLD), a light emitting diode (LED), a photodiode (PD), an avalanche photodiode (APD), etc. is provided at the edge adjacent to the 12. For example, one light receiving element 15 is provided.
上記上記導波路基板１２ば、Ｓｉ、５ｉ０２、ＬｉＮｂ
Ｏ３、ガラス等のヘース基板を用い、この基板上にはガ
ラス埋込み法、光フアイバ埋込み法、コツトインチュー
ブ法、電解イオン拡散法、薄膜法、スート堆積法等によ
り、隣接または対向する０ＥＩＣ基板１１．１１同志を
接続するべく、分岐型の導波路１６が形成しである。The above-mentioned waveguide substrate 12, Si, 5i02, LiNb
A base substrate made of O3, glass, etc. is used, and adjacent or opposing 0EIC substrates 11 are formed on this substrate by a glass embedding method, an optical fiber embedding method, a cot-in-tube method, an electrolytic ion diffusion method, a thin film method, a soot deposition method, etc. A branched waveguide 16 is formed to connect the .11 comrades.
そして、上記のように組み合わせた状態では、ある一方
の○ＥＩＣ基板１１の発光素子１４は、隣接する３個の
導波路基板１２の導波路１６を介して、他方の３個の０
ＥＩＣ基板１１の受光素子１５と対峙され、光学的に接
続されている。また、逆に他方の３個の０ＥＩＣ基板１
１の発光素子１４に対しては、やはり隣接する３個の導
波路基板１２の導波路１６を介して、一方の０ＥＩＣ基
板１１の受光素子１５が対峙して、光学的に接続されて
いる。In the above-described combined state, the light emitting elements 14 of one EIC substrate 11 are connected to the other three O EIC substrates 12 via the waveguides 16 of the three adjacent waveguide substrates 12.
It faces the light receiving element 15 of the EIC board 11 and is optically connected. Also, conversely, the other three 0EIC boards 1
The light receiving element 15 of one 0EIC substrate 11 faces and is optically connected to one light emitting element 14 via the waveguides 16 of three adjacent waveguide substrates 12.
従って、各０ＥＩＣ基板１１・・の場合、導波路基板１
２を隔てた他の基板と複雑に接続される。Therefore, in the case of each 0EIC substrate 11..., the waveguide substrate 1
It is connected in a complicated manner to other boards across the board.
このため、各０ＥＩＣ基板１１・・の各素子部分で処理
された信号は、発光素１４と導波路基板１２の導波路１
６と受光素子５の光配線ラインを通じて、高速度で相互
に遺り取りされる。Therefore, the signals processed in each element part of each 0EIC substrate 11...
6 and the light-receiving element 5 through the optical wiring line, they are transferred to each other at high speed.
本実施例では、３個の０ＥＩＣ基板１１・・と３個の導
波路基板１２・・とを市松模様状に組合せたが、この組
合せの形状および個数は、特に限定されず、例えば中心
部の導波路基板１２の外周に６個の０ＥＴＣ基板１１・
・・を設置する等、種々の形状を取ることが可能である
。In this embodiment, three 0EIC substrates 11... and three waveguide substrates 12... are combined in a checkerboard pattern, but the shape and number of this combination are not particularly limited. Six 0ETC substrates 11 are placed around the outer periphery of the waveguide substrate 12.
It is possible to take various shapes, such as installing ....
なお、上記各実施例では、０ＥＩＣ基板１． １１と導
波路基板２．１２との組合せであったが、本発明は、こ
の組合せに限定されず、○ＥＩＣ基板１，１１のみの組
合せで構成することも可能である。また、各基板の形状
も、上述の六角や四角等に限らず、広くその他の多角形
も採用することが可能である。In each of the above embodiments, the 0EIC substrate 1. 11 and the waveguide substrates 2 and 12, the present invention is not limited to this combination, and it is also possible to configure a combination of only the EIC substrates 1 and 11. Furthermore, the shape of each substrate is not limited to the above-mentioned hexagonal or square shapes, but other polygonal shapes can also be adopted.
〈発明の効果〉
以上の説明から明らかなように本発明の０ＥＩＣ基板装
置によれば、次のようにな効果を得ることができる。<Effects of the Invention> As is clear from the above description, according to the 0EIC substrate device of the present invention, the following effects can be obtained.
■一つの０ＥＩＣ基板またはこれと導波路基板を一つの
ユニットやモジュールとして捉え、これらの基板の複数
個を適宜隣接させる等して組み合わせて、装置化できる
ため、極めて広範な使用態様に対応することができる。■One 0EIC substrate or it and a waveguide substrate can be considered as one unit or module, and multiple of these substrates can be placed adjacent to each other as appropriate and combined to form a device, so it can be used in an extremely wide range of ways. Can be done.
■また、各０ＥＩＣ基板間の接続を光配線ラインで行い
、かつその光配線ライン領域の割合の拡大が容易にでき
るため、信号相互の高アイソレーションおよび信号処理
の高速化を図ることができる。(2) Furthermore, since the connection between each 0EIC board is made by an optical wiring line and the ratio of the area of the optical wiring line can be easily expanded, high isolation between signals and high speed signal processing can be achieved.
■さらに、０ＥＩＣ基板や導波路基板を予め標準化して
、必要な幾つかのパターンを用意しておけば、量産性に
優れ、また、大幅な使用上の便宜を図ることもできる。(2) Furthermore, if the 0EIC substrate and waveguide substrate are standardized in advance and several necessary patterns are prepared, mass production is excellent and it is also possible to achieve great convenience in use.
第１図は本発明に係る０ＥＩＣ基板装置の一実施例を示
した概略平面図、第２図は第１図の装置の他の応用例を
示した概略平面図、第３図は本発明に係る０ＥＩＣ基板
装置の他の実施例を示した概略平面図である。
図中、
１．１１・・・０ＥＩＣ基板、
２．１２・・・導波路基板、
３．１３・・・素子部品域、
４．１４・・・発光素子、
５．１５・・・受光素子、
６．１６・・・導波路、FIG. 1 is a schematic plan view showing one embodiment of the 0EIC substrate device according to the present invention, FIG. 2 is a schematic plan view showing another application example of the device shown in FIG. 1, and FIG. FIG. 7 is a schematic plan view showing another embodiment of the 0EIC substrate device. In the figure, 1.11...0EIC board, 2.12... Waveguide substrate, 3.13... Element parts area, 4.14... Light emitting element, 5.15... Light receiving element, 6.16... Waveguide,
Claims (2)
基板相互を、当該基板の隣接する縁部に形成した発光素
子および受光素子を介して光学的に接続させたことを特
徴とする光集積回路基板装置。(1) Polygonal optical integrated circuit boards are installed adjacent to each other, and the adjacent boards are optically connected to each other via a light emitting element and a light receiving element formed on adjacent edges of the boards. Optical integrated circuit board equipment.
て設置し、前記光集積回路基板相互を、当該光集積回路
基板の隣接する縁部や対向する光集積回路基板の縁部に
形成した発光素子、受光素子および導波路基板に形成し
た導波路を介して光学的に接続させたことを特徴とする
光集積回路基板装置。(2) A polygonal optical integrated circuit board and a waveguide board are installed adjacent to each other, and the optical integrated circuit boards are connected to the adjacent edges of the optical integrated circuit board or the edges of the opposing optical integrated circuit board. What is claimed is: 1. An optical integrated circuit board device comprising a light emitting element, a light receiving element, and a waveguide formed on a waveguide substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62126675A JP2540040B2 (en) | 1987-05-23 | 1987-05-23 | Optical integrated circuit board device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62126675A JP2540040B2 (en) | 1987-05-23 | 1987-05-23 | Optical integrated circuit board device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63291014A true JPS63291014A (en) | 1988-11-28 |
| JP2540040B2 JP2540040B2 (en) | 1996-10-02 |
Family
ID=14941077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62126675A Expired - Fee Related JP2540040B2 (en) | 1987-05-23 | 1987-05-23 | Optical integrated circuit board device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2540040B2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0536726A2 (en) * | 1991-10-07 | 1993-04-14 | Nec Corporation | Arrangement of optically interconnecting a plurality of light emitter/receiver modules respectively mounted on separate circuit boards |
| US5343545A (en) * | 1992-07-14 | 1994-08-30 | Fuji Xerox Co., Ltd. | Interconnectable multi-terminal star coupler |
| EP0729659A4 (en) * | 1992-09-18 | 1995-11-07 | Krissman Stephen | Improved semiconductor architecture and application therefor |
| JP2002299598A (en) * | 2001-04-03 | 2002-10-11 | Fujitsu Ltd | Semiconductor device |
| KR100855479B1 (en) * | 2001-12-29 | 2008-09-01 | 엘지디스플레이 주식회사 | Active matrix flat panel display panel |
| US20110069973A1 (en) * | 2009-09-22 | 2011-03-24 | Sun Microsystems, Inc. | Edge-coupled optical proximity communication |
| US8417071B2 (en) | 2010-05-24 | 2013-04-09 | Xyratex Technology Limited | Data storage system, a modular printed circuit board, a backplane and a backplane component |
| JP2020052269A (en) * | 2018-09-27 | 2020-04-02 | 沖電気工業株式会社 | Optical chip, optical integrated circuit and optical module |
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|---|---|---|---|---|
| JPS52145240A (en) * | 1976-05-28 | 1977-12-03 | Nippon Telegr & Teleph Corp <Ntt> | Optical guide connecting method |
| JPS5715465A (en) * | 1980-07-02 | 1982-01-26 | Fujitsu Ltd | Large scale optical integrated circuit |
| JPS61148405A (en) * | 1984-12-21 | 1986-07-07 | Omron Tateisi Electronics Co | Microwave optical circuit device |
-
1987
- 1987-05-23 JP JP62126675A patent/JP2540040B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52145240A (en) * | 1976-05-28 | 1977-12-03 | Nippon Telegr & Teleph Corp <Ntt> | Optical guide connecting method |
| JPS5715465A (en) * | 1980-07-02 | 1982-01-26 | Fujitsu Ltd | Large scale optical integrated circuit |
| JPS61148405A (en) * | 1984-12-21 | 1986-07-07 | Omron Tateisi Electronics Co | Microwave optical circuit device |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0536726A2 (en) * | 1991-10-07 | 1993-04-14 | Nec Corporation | Arrangement of optically interconnecting a plurality of light emitter/receiver modules respectively mounted on separate circuit boards |
| EP0536726A3 (en) * | 1991-10-07 | 1994-06-01 | Nec Corp | Arrangement of optically interconnecting a plurality of light emitter/receiver modules respectively mounted on separate circuit boards |
| US5343545A (en) * | 1992-07-14 | 1994-08-30 | Fuji Xerox Co., Ltd. | Interconnectable multi-terminal star coupler |
| EP0729659A4 (en) * | 1992-09-18 | 1995-11-07 | Krissman Stephen | Improved semiconductor architecture and application therefor |
| EP0729659A1 (en) * | 1992-09-18 | 1996-09-04 | KRISSMAN, Stephen | Improved semiconductor architecture and application therefor |
| JP2002299598A (en) * | 2001-04-03 | 2002-10-11 | Fujitsu Ltd | Semiconductor device |
| KR100855479B1 (en) * | 2001-12-29 | 2008-09-01 | 엘지디스플레이 주식회사 | Active matrix flat panel display panel |
| US20110069973A1 (en) * | 2009-09-22 | 2011-03-24 | Sun Microsystems, Inc. | Edge-coupled optical proximity communication |
| US8755655B2 (en) * | 2009-09-22 | 2014-06-17 | Oracle America, Inc. | Edge-coupled optical proximity communication |
| US8417071B2 (en) | 2010-05-24 | 2013-04-09 | Xyratex Technology Limited | Data storage system, a modular printed circuit board, a backplane and a backplane component |
| JP2020052269A (en) * | 2018-09-27 | 2020-04-02 | 沖電気工業株式会社 | Optical chip, optical integrated circuit and optical module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2540040B2 (en) | 1996-10-02 |
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