JP2764127B2 - Optical connection integrated circuit - Google Patents
Optical connection integrated circuitInfo
- Publication number
- JP2764127B2 JP2764127B2 JP2238957A JP23895790A JP2764127B2 JP 2764127 B2 JP2764127 B2 JP 2764127B2 JP 2238957 A JP2238957 A JP 2238957A JP 23895790 A JP23895790 A JP 23895790A JP 2764127 B2 JP2764127 B2 JP 2764127B2
- Authority
- JP
- Japan
- Prior art keywords
- light
- wafer
- light emitting
- emitting element
- receiving element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、集積回路に関し、特に、特定素子間を光で
接続し、超高速演算、高度の画像処理、超並列演算時の
機能を有する光接続集積回路に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit, and more particularly, to an integrated circuit, in which specific elements are connected by light, and has a function at the time of ultra-high-speed operation, advanced image processing, and massively parallel operation. The present invention relates to an optical connection integrated circuit.
［従来の技術］ 単一の半導体基板上に複数の電子素子を集積して電子
回路を構成したIC（集積回路）、LSI（大規模集積回
路）、VLSI（超LSI）等が広く知られている。[Prior art] ICs (integrated circuits), LSIs (large-scale integrated circuits), VLSIs (ultra LSIs), etc., in which an electronic circuit is formed by integrating a plurality of electronic elements on a single semiconductor substrate, are widely known. I have.
これら従来の集積回路では、いずれの場合においても
集積回路を構成する電子素子間は、金属配線等によって
電気的に接続されている。In these conventional integrated circuits, in each case, the electronic elements constituting the integrated circuit are electrically connected by metal wiring or the like.
［発明が解決しようとする課題］ しかしながら、近年の電子素子の高集積化に伴い配線
の接続距離が増加し、金属配線による抵抗と静電容量の
増大が信号の遅延と、減衰をもたらす、しかもこの影響
は動作周波数の上昇に伴い増大するという問題点があ
る。加えて、高集積化によって各電子素子は微小化し、
その駆動に必要な電力の低下が、金属配線による抵抗と
静電容量の影響を大きくするという問題点もある。さら
に、金属配線では周囲の金属配線との間で信号の干渉と
雑音の増加が生じるという問題点がある。[Problems to be Solved by the Invention] However, with the recent increase in the degree of integration of electronic elements, the connection distance of wiring increases, and the increase in resistance and capacitance due to metal wiring causes signal delay and attenuation. There is a problem that this effect increases as the operating frequency increases. In addition, each electronic element is miniaturized by high integration,
There is also a problem that the reduction in power required for the driving increases the influence of the resistance and the capacitance due to the metal wiring. Further, the metal wiring has a problem that signal interference and noise increase between the metal wiring and surrounding metal wiring.
本発明は、上記問題を生ずる金属配線を光配線に置き
換えることにより、信号の遅延と減衰を抑制させると共
に、信号の干渉と雑音の発生を抑えることを目的とす
る。SUMMARY OF THE INVENTION It is an object of the present invention to suppress the delay and attenuation of a signal and the occurrence of signal interference and noise by replacing a metal wiring causing the above problem with an optical wiring.
［課題を解決するための手段］ 本発明によれば、複数の電子素子が集積され、該複数
の電子素子のうち、互いに電気的に接続されるべき第１
の特定の電子素子と第２の特定の電子素子にそれぞれ第
１の発光素子と第１の受光素子が接続されている第１の
ウエハーと、該第１のウエハーに平行かつ近接させて配
置され、前記第１のウエハーに対向する面上に、前記第
１の発光素子からの光を前記第１の受光素子に導くため
の光導波路が形成された第２のウエハーとを有すること
を特徴とする光接続集積回路が得られる。[Means for Solving the Problems] According to the present invention, a plurality of electronic elements are integrated, and among the plurality of electronic elements, a first electronic element to be electrically connected to each other.
A first wafer in which a first light-emitting element and a first light-receiving element are connected to a specific electronic element and a second specific electronic element, respectively, and are arranged in parallel and close to the first wafer. A second wafer having an optical waveguide for guiding light from the first light emitting element to the first light receiving element formed on a surface facing the first wafer. Is obtained.
［実施例］ 以下に図面を参照して本発明の実施例を説明する。Embodiment An embodiment of the present invention will be described below with reference to the drawings.
第１図は、本発明の一実施例の光接続集積回路の略断
面図である。第１図に示すように本実施例の集積回路
は、ウエハー11及び12を有している。FIG. 1 is a schematic sectional view of an optical connection integrated circuit according to one embodiment of the present invention. As shown in FIG. 1, the integrated circuit of this embodiment has wafers 11 and 12.
ウエハー11は、Si基板13を有し、その上部には電子素
子（図示せず）を集積した電子回路14が形成されてい
る。この電子回路14は、一部の配線を除いて完全な１つ
の電子回路網を構成している。即ち、配線が完全であれ
ば、LSIとして機能する。また、この電子回路14の電子
素子相互間の接続には金属配線（図示せず）が用いられ
ており、金属配線は配線スペース15内に収められてい
る。The wafer 11 has a Si substrate 13, on which an electronic circuit 14 in which electronic elements (not shown) are integrated is formed. The electronic circuit 14 constitutes a complete electronic circuit network except for some wirings. That is, if the wiring is perfect, it functions as an LSI. Further, metal wiring (not shown) is used for connection between the electronic elements of the electronic circuit 14, and the metal wiring is housed in the wiring space 15.
電子回路14の特定の端子16には面発光素子17が、ま
た、他の特定の端子18には面受光素子19が接続されてい
る。ここで端子16と端子18とは、電子回路設計上、電気
的に接続されていなければならない端子である。なお、
面発光素子17は、III−Ｖ族化合物のレーザまたはLED
（発光ダイオード）であり、面受光素子19は、Si系また
はIII−Ｖ族化合物の受光素子である。A surface light emitting element 17 is connected to a specific terminal 16 of the electronic circuit 14, and a surface light receiving element 19 is connected to another specific terminal 18. Here, the terminals 16 and 18 are terminals that must be electrically connected in electronic circuit design. In addition,
The surface emitting device 17 is a laser or LED of a group III-V compound.
(Light-emitting diode), and the surface light-receiving element 19 is a light-receiving element made of Si or a III-V compound.
ウエハー12は、GaAs基板20上に形成された受光素子21
と発光素子22とを有している。そして、この受光素子21
と発光素子22とを光導波路23により接続するために、増
幅器24,25、及び発光素子26と受光素子27とが形成され
ている。この発光素子26と受光素子27とは、基板と同じ
GaAs系の素子である。これらのウエハー11,12は互いに
平行に、かつ近接させて配置され、発光素子17と受光素
子21、受光素子19と発光素子22とがそれぞれ正対してい
る。これによって、端子16と端子18とが電気的に接続さ
れたのと等価になる。The wafer 12 has a light receiving element 21 formed on a GaAs substrate 20.
And a light emitting element 22. Then, this light receiving element 21
Amplifiers 24 and 25, and a light emitting element 26 and a light receiving element 27 are formed in order to connect the light emitting element 22 and the light emitting element 22. The light emitting element 26 and the light receiving element 27 are the same as the substrate
It is a GaAs device. The wafers 11 and 12 are arranged in parallel and close to each other, and the light emitting element 17 and the light receiving element 21 face each other, and the light receiving element 19 and the light emitting element 22 face each other. This is equivalent to the terminal 16 and the terminal 18 being electrically connected.
本実施例では、例えば、金属配線での伝送時間が数ns
〜数10nsかかるところを、0.1ns程度にすることができ
る。しかも、光のパワーに無関係に一定速度で伝送でき
る。In this embodiment, for example, the transmission time in the metal wiring is several ns.
Where it takes several tens of ns, it can be reduced to about 0.1 ns. Moreover, transmission can be performed at a constant speed regardless of the power of light.
ウエハー11とウエハー12との間隔は、100μｍ以下、
望ましくは10μｍ程度である。２つのウエハー11,12の
間隔を狭くしておけば、発光素子17と受光素子21との間
（発光素子22と受光素子19との間）での光信号の送受の
際の光の拡がりによる漏れが減少し、信号の減衰を防止
できる。ここで、２枚のウエハー11,12間の間隔を均一
にするために、２枚のウエハー11,12の間に無色透明の
スペーサまたは光路を避けるように配置された微小ブロ
ックを挟んで、接着しても良い。この様に、光接続部分
をそれぞれ異なるウエハーに分離することにより、それ
ぞれのウエハーの製作が容易になり、それぞれ個別のテ
ストも可能となり歩留まりが改善される。特に、ICの製
造においては、従来の構造（設計）及び製造方法をほと
んど変更することなく、動作の高速化、製造の容易化、
及び歩留まりの改善を実現できる。The distance between the wafer 11 and the wafer 12 is 100 μm or less,
Desirably, it is about 10 μm. If the distance between the two wafers 11 and 12 is reduced, the spread of light when transmitting and receiving an optical signal between the light emitting element 17 and the light receiving element 21 (between the light emitting element 22 and the light receiving element 19) is caused. Leakage is reduced and signal attenuation can be prevented. Here, in order to make the interval between the two wafers 11 and 12 uniform, a colorless transparent spacer or a small block arranged so as to avoid the optical path is sandwiched between the two wafers 11 and 12 and bonded. You may. In this way, by separating the optical connection portion into different wafers, the manufacture of each wafer is facilitated, individual tests can be performed, and the yield is improved. In particular, in the manufacture of ICs, it is possible to increase the speed of operation, simplify manufacturing,
In addition, the yield can be improved.
発光素子17,22、及び受光素子19,21は、共にそのサイ
ズは小さいほうが駆動電流が小さくてすむみ、かつ高速
動作が可能となる。そして、その大きさは、〜10μｍ程
度、またはそれ以下が好ましい。The smaller the size of each of the light-emitting elements 17, 22 and the light-receiving elements 19, 21, the smaller the drive current, the higher the operation speed. The size is preferably about 10 μm or less.
また、光導波路23の幅ωは、ω＝１〜10μｍ程度であ
る。The width ω of the optical waveguide 23 is about ω = 1 to 10 μm.
上記例では特定の２点間を接続することについて述べ
たが、本発明によれば、複数組の特定の２点間を接続し
たり、１対多または多対１の接続も可能である。そのこ
とを第２図を参照して説明する。In the above example, connection between specific two points has been described. However, according to the present invention, connection between plural sets of specific two points or one-to-many or many-to-one connection is possible. This will be described with reference to FIG.
第２図には、ウエハー12上に形成された受光素子26a
と発光素子27a、受光素子26bと発光素子27b、を光導波
路23a,23bによって接続した場合が示されている。な
お、ウエハー11側の説明は省略する。FIG. 2 shows a light receiving element 26a formed on the wafer 12.
The figure shows a case where the light emitting element 27a and the light receiving element 26b and the light emitting element 27b are connected by the optical waveguides 23a and 23b. The description of the wafer 11 will be omitted.
図のように光導波路23aと23bとを互いに交差させても
（α90゜の場合）光導波路23aと23b内に伝送される光
信号には相互干渉（カップリング）はほとんど生じな
い。また、光導波路23bは屈曲させることもできる。さ
らに、途中に鏡を配置して屈折させることもできる。従
って、複数組の特定の２点間を比較的自由に接続するこ
とができる。As shown in the figure, even if the optical waveguides 23a and 23b cross each other (in the case of α90 °), almost no mutual interference (coupling) occurs in the optical signals transmitted in the optical waveguides 23a and 23b. Further, the optical waveguide 23b can be bent. Furthermore, it is also possible to arrange a mirror in the middle and make it refracted. Therefore, it is possible to relatively freely connect a plurality of pairs of specific two points.
さらに、カップリング手段28を利用すれば、光導波路
23b内を伝導する光信号を複数の光導波路29内に分割し
て導くこともできる。また、逆に複数の光導波路29から
の光信号を一つの導波路内に導くこともできる。即ち、
クロック系バスライン等に利用することができる。Furthermore, if the coupling means 28 is used, the optical waveguide
An optical signal transmitted through 23b can be divided and guided into a plurality of optical waveguides 29. Conversely, optical signals from a plurality of optical waveguides 29 can be guided into one waveguide. That is,
It can be used for a clock bus line or the like.
この様に、光導波路を電子回路が形成されたウエハー
とは異なるウエハー上に形成するようにしたことで、電
子回路の如何なる２点間でも高速かつ相互干渉のない信
号接続が可能となり、電子回路の設計の自由度が著しく
広がる。As described above, by forming the optical waveguide on a wafer different from the wafer on which the electronic circuit is formed, high-speed and signal-free signal connection between any two points of the electronic circuit becomes possible. The degree of freedom of the design is greatly expanded.
なお、上記実施例では、一方のウエハーにのみ電子回
路が形成されている場合に付いて説明したが、電子回路
の一部を他方のウエハー上に形成するようにしても良
い。In the above embodiment, the case where the electronic circuit is formed on only one wafer has been described. However, a part of the electronic circuit may be formed on the other wafer.
また、上記実施例では２枚のウエハーを用いた場合に
ついて説明したが、これに限られるものではなく、２枚
以上のウエハーを重ね合わせることもできる。In the above embodiment, the case where two wafers are used has been described. However, the present invention is not limited to this, and two or more wafers can be superposed.
さらに、上記実施例では、GaAs基板上に受光素子、発
光素子、及び増幅器などを形成するとともに光導波路を
形成しているが、受光素子、発光素子、及び増幅器は、
省略することができる。即ち、基板上に光導波路のみを
形成するようにしてもよい。この場合、基板としてガラ
スなども使用できる。Furthermore, in the above embodiment, the light receiving element, the light emitting element, and the amplifier are formed on the GaAs substrate and the optical waveguide is formed.
Can be omitted. That is, only the optical waveguide may be formed on the substrate. In this case, glass or the like can be used as the substrate.
［発明の効果］ 本発明によれば、集積回路内の特定素子間の接続を、
集積回路が形成されたウエハーとは異なるウエハー上に
形成した光導波路を用いて接続するようにしたことで、
金属配線による信号の遅延を抑えることができる。[Effects of the Invention] According to the present invention, connection between specific elements in an integrated circuit is
By connecting using an optical waveguide formed on a wafer different from the wafer on which the integrated circuit is formed,
Signal delay due to metal wiring can be suppressed.
また、配線間の信号の干渉を抑えることができる。 In addition, signal interference between wirings can be suppressed.
第１図は本発明の位置実施例の略断面図、第２図は光導
波路を説明するための図である。 11,12……ウエハー、13……Si基板、14……電子回路、1
5……配線スペース、16,18……端子、17,22……面発光
素子、19,21……面受光素子、20……GaAs基板、23……
光導波路、24,25……増幅器、26……発光素子、27……
受光素子、28……カップリング手段、29……光導波路。FIG. 1 is a schematic sectional view of a position embodiment of the present invention, and FIG. 2 is a view for explaining an optical waveguide. 11,12 Wafer, 13 Si substrate, 14 Electronic circuit, 1
5 ... Wiring space, 16,18 ... Terminal, 17,22 ... Surface light emitting element, 19,21 ... Surface light receiving element, 20 ... GaAs substrate, 23 ...
Optical waveguide, 24, 25 …… Amplifier, 26 …… Light-emitting element, 27 ……
Light receiving element, 28 coupling means, 29 optical waveguide.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 Ｏｐｔｉｃａｌ ａｎｄ Ｑｕｏｎｔ ｕｍ Ｅｌｅｅｔｒｏｎｉｃｓ 20 （1988） ＰＰ．441−474 Ｐｒｏｃｅｅｄｉｎｇｓ ｏｆ ＩＥ ＥＥ Ｖｏｌ．72，Ｎｏ．７ （1984) ＰＰ．850−866 ＳＰＩＥ Ｖｏｌ．466 Ｏｐｔｉｃ ａｌ Ｉｎｔｅｒｆａｃｅ ｆｏｒ ｄ ｉｇｉｔａｌ Ａｒｃｕｉｔｓ ａｎｄ Ｓｙｓｔｅｍｓ （1984） ＰＰ．10 −20 ──────────────────────────────────────────────────続 き Continuation of front page (56) References Optical and Quantum Electronics 20 (1988) PP. 441-474 Proceedings of IE EE Vol. 72, No. 7 (1984) PP. 850-866 SPIE Vol. 466 Optical Interface for digital Architects and Systems (1984) PP. 10 −20
Claims (2)
素子のうち、互いに電気的に接続されるべき第１の特定
の電子素子と第２の特定の電子素子にそれぞれ第１の発
光素子と第１の受光素子が接続されている第１のウエハ
ーと、 該第１のウエハーに平行かつ近接させて配置され、前記
第１のウエハーに対向する面上に、前記第１の発光素子
からの光を前記第１の受光素子に導くための光導波路が
形成された第２のウエハーと、 を有することを特徴とする光接続集積回路。A plurality of electronic elements are integrated, and a first light emission is provided for each of a first specific electronic element and a second specific electronic element to be electrically connected to each other among the plurality of electronic elements. A first wafer to which an element and a first light receiving element are connected; and a first light emitting element which is arranged in parallel and close to the first wafer, and on a surface facing the first wafer. And a second wafer on which an optical waveguide for guiding light from the first light-receiving element to the first light-receiving element is provided.
に対向する面上であって、前記第１の発光素子と前記第
１の受光素子とに対向する位置に、それぞれ第２の受光
素子と第２の発光素子とを設け、前記第２の受光素子に
接続される第３の発光素子を前記第２の受光素子に近接
して設け、前記第２の発光素子に接続される第３の受光
素子を前記第２の発光素子に近接して設け、前記第３の
発光素子と前記第２の発光素子とを前記光導波路で接続
したことを特徴とする請求項１の光接続集積回路。2. A second light receiving device is provided on a surface of the second wafer facing the first wafer and at a position facing the first light emitting element and the first light receiving element. An element and a second light emitting element, a third light emitting element connected to the second light receiving element is provided near the second light receiving element, and a third light emitting element connected to the second light emitting element is provided. 3. The optical connection integration according to claim 1, wherein a third light receiving element is provided in proximity to the second light emitting element, and the third light emitting element and the second light emitting element are connected by the optical waveguide. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2238957A JP2764127B2 (en) | 1990-09-11 | 1990-09-11 | Optical connection integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2238957A JP2764127B2 (en) | 1990-09-11 | 1990-09-11 | Optical connection integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04119667A JPH04119667A (en) | 1992-04-21 |
| JP2764127B2 true JP2764127B2 (en) | 1998-06-11 |
Family
ID=17037814
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2238957A Expired - Fee Related JP2764127B2 (en) | 1990-09-11 | 1990-09-11 | Optical connection integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2764127B2 (en) |
-
1990
- 1990-09-11 JP JP2238957A patent/JP2764127B2/en not_active Expired - Fee Related
Non-Patent Citations (3)
| Title |
|---|
| Ｏｐｔｉｃａｌ ａｎｄ Ｑｕｏｎｔｕｍ Ｅｌｅｅｔｒｏｎｉｃｓ ２０（１９８８） ＰＰ．４４１−４７４ |
| Ｐｒｏｃｅｅｄｉｎｇｓ ｏｆ ＩＥＥＥ Ｖｏｌ．７２，Ｎｏ．７ （１９８４） ＰＰ．８５０−８６６ |
| ＳＰＩＥ Ｖｏｌ．４６６ Ｏｐｔｉｃａｌ Ｉｎｔｅｒｆａｃｅ ｆｏｒ ｄｉｇｉｔａｌ Ａｒｃｕｉｔｓ ａｎｄ Ｓｙｓｔｅｍｓ （１９８４） ＰＰ．１０−２０ |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04119667A (en) | 1992-04-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7044658B1 (en) | High speed serial I/O technology using an optical link | |
| US10962728B2 (en) | Co-packaged optics and transceiver | |
| JP3345143B2 (en) | Manufacturing method of optical waveguide | |
| US6663295B2 (en) | Optical transmitter-receiver module suitable for reducing crosstalk | |
| US5061027A (en) | Solder-bump attached optical interconnect structure utilizing holographic elements and method of making same | |
| US8231284B2 (en) | Ultra-high bandwidth, multiple-channel full-duplex, single-chip CMOS optical transceiver | |
| JP3728147B2 (en) | Opto-electric hybrid wiring board | |
| JP2853400B2 (en) | Simultaneous two-way optical interconnection method | |
| JPH06224408A (en) | Optical transmitter-receiver module and its preparation | |
| US9179584B2 (en) | Method of assembling an electro-optical device | |
| US20030231840A1 (en) | Optical communications module and method for producing the module | |
| US20120301154A1 (en) | Semiconductor-based optical transceiver | |
| US20050135727A1 (en) | EMI-EMC shield for silicon-based optical transceiver | |
| JP3684112B2 (en) | Opto-electric hybrid board, driving method thereof, and electronic circuit device using the same | |
| US11177219B1 (en) | Photonic integrated circuit with integrated optical transceiver front-end circuitry for photonic devices and methods of fabricating the same | |
| US6736552B2 (en) | Optically interconnecting integrated circuit chips | |
| JP3629713B2 (en) | Optical connection integrated circuit | |
| JP2764127B2 (en) | Optical connection integrated circuit | |
| CN113994470A (en) | Co-packaged optical device and transceiver | |
| US20030038297A1 (en) | Apparatus,system, and method for transmission of information between microelectronic devices | |
| JPH0758805B2 (en) | Optical wiring circuit | |
| JP2007019133A (en) | Photoelectric conversion device, its manufacturing method, and optical information process device | |
| US10605985B2 (en) | Integration of bonded optoelectronics, photonics waveguide and VLSI SOI | |
| US4838633A (en) | Semiconductor device with high speed signal transmission arrangement utilizing light | |
| JP2000028871A (en) | Packaging form of optical semiconductor module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080403 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090403 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100403 Year of fee payment: 12 |
|
| LAPS | Cancellation because of no payment of annual fees |