JPS63288066A - Protective circuit for thin-film semiconductor - Google Patents

Protective circuit for thin-film semiconductor

Info

Publication number
JPS63288066A
JPS63288066A JP12128187A JP12128187A JPS63288066A JP S63288066 A JPS63288066 A JP S63288066A JP 12128187 A JP12128187 A JP 12128187A JP 12128187 A JP12128187 A JP 12128187A JP S63288066 A JPS63288066 A JP S63288066A
Authority
JP
Japan
Prior art keywords
hydrogen
transistor
protection circuit
protective
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12128187A
Other languages
Japanese (ja)
Inventor
Kikuo Ono
記久雄 小野
Akio Mimura
三村 秋男
Yoshikazu Hosokawa
細川 義和
Nobutake Konishi
信武 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12128187A priority Critical patent/JPS63288066A/en
Publication of JPS63288066A publication Critical patent/JPS63288066A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Abstract

PURPOSE:To cause large leakage currents to flow through a protective transistor by the increase of drain voltage, and to operate a protective circuit excellently by lowering driving gate voltage through hydrogen substitution treatment and composing the protective circuit by using an element having structure, in which hydrogen substitution treatment is difficult to work, in the protective transistor. CONSTITUTION:When a sample substrate is positioned in plasma hydrogen discharge at high frequency in a plane parallel electrode in order to conduct hydrogen substitution in a thin-film transistor Tr1, hydrogen passes through an insulating film 8, the polycrystalline silicon of a gate 7 and a gate insulating film 6, and enters a channel region 2. Consequently, the effect of hydrogen substitution treatment is displayed to the Tr1, and the driving gate voltage of the Tr1 is lowered. On the other hand, a shielding electrode 20 covering the upper section of at least the gate electrode 7 during the manufacturing process of a wiring electrode 5 from the upper section of the protective insulating film 8 is shaped to a protective transistor Tr2. The Tr2 is used as the protective transistor in such structure, thus shielding the intrusion of hydrogen. The protective transistor is shaped in structure in which hydrogen substitution treatment cannot be performed, and a protective circuit is formed by employing the transistor.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜半導体素子のゲート絶縁膜保護回路に係り
、特に製造コストが安価で良好な保護特性を持つ薄膜半
導体用保護回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a gate insulating film protection circuit for thin film semiconductor devices, and particularly to a protection circuit for thin film semiconductors that is inexpensive to manufacture and has good protection characteristics.

〔従来の技術〕[Conventional technology]

近年、ガラスなどの安価な絶縁基板上に薄膜半導体素子
を形成し、これを液晶ディスプレイの画素を駆動するト
ランジスタに使う、あるいは画面を駆動する回路さえも
基板上に形成する、ラインセンサ及びその回路を薄膜半
導体素子で形成するといったような薄膜トランジスタ(
TPT)技術の開発が急速に進んでいる。形成するトラ
ンジスタ構造としては製造工程が短く、コストの面から
有利なMOS型トランジスタがほとんどである。
In recent years, line sensors and their circuits have been developed, in which thin-film semiconductor elements are formed on inexpensive insulating substrates such as glass, and these are used as transistors that drive the pixels of liquid crystal displays, or even the circuits that drive the screen are formed on the substrate. Thin film transistors (
Development of TPT) technology is progressing rapidly. Most of the transistor structures to be formed are MOS type transistors, which have a short manufacturing process and are advantageous in terms of cost.

ところで、基板上に半導体素子を形成しこれを配線で接
続するいわゆる集積回路においては、製造中のハンドリ
ングや実装段階で回路に静電気のサージ電圧が飛び込む
ことがしばしば起る。この電圧は50〜100vのパル
ス電圧でこれがMOS型トランジスタのゲート絶縁膜を
破壊し、素子の王位りを悪化させる原因の1つになって
いる。単ダイオードを接続する。第2図(a)はダイオ
ードを使った保護回路で、例えば「集積回路工学(2)
、コロナ社 第147頁」に示されている。
Incidentally, in so-called integrated circuits in which semiconductor elements are formed on a substrate and connected by wiring, a surge voltage of static electricity often jumps into the circuit during handling or mounting during manufacturing. This voltage is a pulse voltage of 50 to 100 V, which destroys the gate insulating film of the MOS transistor and is one of the causes of deteriorating the stability of the device. Connect a single diode. Figure 2 (a) shows a protection circuit using diodes, for example, in ``Integrated Circuit Engineering (2)''.
, Corona Publishing, p. 147.

第2図(b)は保護ダイオードの電圧−電流特性である
。動作を簡単に説明する。第2図(a)のMOSTrは
nチャネル型(ゲートをソースに対して正にした時オン
電流が流れる)とする、正常動作時にかかるゲート電圧
Vz  (Vg >O)はダイオードのアバランジャ電
圧Va以下である。サージ電圧として正の電圧(Vp)
がかかった場合。
FIG. 2(b) shows the voltage-current characteristics of the protection diode. Briefly explain the operation. The MOSTr in Fig. 2 (a) is an n-channel type (on-current flows when the gate is positive with respect to the source), and the gate voltage Vz (Vg > O) applied during normal operation is less than the diode avalanche voltage Va. It is. Positive voltage (Vp) as surge voltage
If it takes.

Vp >Va >Vt >Oとして保護ダイオードのp
n接合のそれぞれの不純物濃度を調整して、Vaを設計
しておけばMOSTrのゲート絶縁膜に高電圧は印加さ
れない。負のサージ(V、<O)の場合にはダイオード
オン電流が流れて電圧を下げる。
p of the protection diode as Vp > Va > Vt > O
If Va is designed by adjusting the impurity concentration of each n-junction, high voltage will not be applied to the gate insulating film of the MOSTr. In the case of a negative surge (V, <O), a diode-on current flows to lower the voltage.

保護ダイオードとしてMOS型Trを用いた例を第3図
に示す。第3図(a)のTrzは保護トランジスタであ
る。第3図(b)はTrzの断面図である。Trl、T
rz共にnチャネル型のMOSトランジスタである。1
1はp十の基板、12はp型のエピタキシャルチャネル
層、3はソース領域。
FIG. 3 shows an example in which a MOS type transistor is used as a protection diode. Trz in FIG. 3(a) is a protection transistor. FIG. 3(b) is a cross-sectional view of Trz. Trl, T
Both rz and rz are n-channel type MOS transistors. 1
1 is a p-type substrate, 12 is a p-type epitaxial channel layer, and 3 is a source region.

4はドレイン領域、5は配線電極、6はゲート絶aM、
7はゲート電極、8は保護絶縁膜である。
4 is a drain region, 5 is a wiring electrode, 6 is a gate electrode,
7 is a gate electrode, and 8 is a protective insulating film.

この回路では、正のサージの場合は、4ドレイン層と1
2のチャネル層との接合の耐圧Vaのアバランジャ電流
で、負のサージの場合n型の反転層のオン電流でゲート
絶縁膜を保護する。ところで、絶縁基板上にMOS型の
1膜半導体素子形成した場合の保護回路について考えて
みる。薄膜トランジスタの断面構造を第4図に示す、1
の基板はガラスを用いる。2はノンドープのチャネル層
、3はソース領域、4はドレイン領域である。基板がガ
ラスであるため2,3.4は低温(600”C)プロセ
スで形成する非晶質シリコンあるいは多結晶シリコンで
形成する。出願人本人が第4図に示すようなTPTを製
作してその特性を調べた結果。
In this circuit, for positive surge, 4 drain layers and 1
In the case of a negative surge, the gate insulating film is protected by the on-current of the n-type inversion layer by the avalanche current of the breakdown voltage Va of the junction with the channel layer No. 2. By the way, let us consider a protection circuit when a MOS type one-film semiconductor element is formed on an insulating substrate. The cross-sectional structure of a thin film transistor is shown in Fig. 1.
The substrate used is glass. 2 is a non-doped channel layer, 3 is a source region, and 4 is a drain region. Since the substrate is glass, 2, 3, and 4 are made of amorphous silicon or polycrystalline silicon formed by a low-temperature (600''C) process.The applicant himself manufactured a TPT as shown in Fig. 4. The results of investigating its characteristics.

次の事が判明した6例えば多結晶シリコンTPTを製作
した場合、ドレイン接合で起るアバランシェ電圧は非常
に高い、この原因の1つは、2がノンドープ層であり、
接合にできる10の空乏層がチャネル層2に広がり電界
を緩和しているためである。しきい値電圧が高い、多結
晶シリコンには粒界に数多くのトラップ準位がありこれ
がしきい値電圧を高くしている。これで、使用電圧も高
くなってしまう。しきい値を下げるには6のゲート絶縁
膜を薄くすれば良いがこれでは、ゲート耐圧が下がって
しまう、Tft実にはアバランシェ耐圧がゲート耐圧よ
り高くなり、保護回路には使えないことがわかった。2
のチャネル層にp型のイオンを打込みアバランシェ耐圧
を下げる試みを行ったが、今後は逆にしきい値電圧が高
くなってしまい、トランジスタ使用電圧とゲート耐圧と
のマージンが非常に少なくなった。またp型のイオン打
込みでプロセスも長くなり歩留り低下、コスト高の原因
となった。
It was found that 6. For example, when polycrystalline silicon TPT is manufactured, the avalanche voltage that occurs at the drain junction is very high. One of the reasons for this is that 2 is a non-doped layer.
This is because ten depletion layers formed at the junction spread to the channel layer 2 and relax the electric field. Polycrystalline silicon, which has a high threshold voltage, has many trap levels at grain boundaries, which increases the threshold voltage. This also increases the voltage used. In order to lower the threshold, it is possible to make the gate insulating film in step 6 thinner, but this will lower the gate withstand voltage.In fact, the avalanche withstand voltage of TFT is higher than the gate withstand voltage, so it was found that it cannot be used as a protection circuit. . 2
Attempts were made to lower the avalanche breakdown voltage by implanting p-type ions into the channel layer of the transistor, but in the future the threshold voltage would become higher, and the margin between the transistor operating voltage and the gate breakdown voltage would become extremely small. Furthermore, p-type ion implantation requires a longer process, resulting in lower yields and higher costs.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記の従来技術では薄膜半導体素子の集積回路に使う良
好なゲート絶縁膜保護回路は形成できないことが判明し
た。本発明の目的は薄膜半導体素子に対しても良好な保
護回路動作を行う薄膜半導体素子保護回路を提供するこ
とにある。
It has been found that the above conventional techniques cannot form a good gate insulating film protection circuit for use in integrated circuits of thin film semiconductor devices. An object of the present invention is to provide a thin film semiconductor device protection circuit that performs good protection circuit operation even for thin film semiconductor devices.

〔問題点を解決するための手段〕[Means for solving problems]

良好なゲート絶縁膜保護回路を実現する薄膜半導体素子
に必要な特性としては、保護されるMOS型トランジス
タをTrl、保護トランジスタをTrzとすると以下の
ような条件が必要である。
Assuming that the MOS transistor to be protected is Trl and the protection transistor is Trz, the following conditions are necessary for a thin film semiconductor device to realize a good gate insulating film protection circuit.

T rx : Vt (T rx) <Vta(正のサ
ージに対して) すなわちTrsの駆動電圧およびそれ以下の正の電圧が
印加された場合、Trzに流れるリーク電流は小さく、
正の高いサージ電圧が印加された場合流れるリーク電流
は大きくなくてはならない。
T rx : Vt (T rx) < Vta (for positive surge) In other words, when a positive voltage equal to or lower than the driving voltage of Trs is applied, the leakage current flowing to Trz is small;
When a high positive surge voltage is applied, the leakage current must be large.

負のサージの場合はTrzの反転層に流れる電流が大き
くなければならない、薄膜半導体素子特性を詳細にしら
べた結果、負のサージに対しては従来の素子で十分使え
ることが判明した。 Vg(T r 1)を下げればマ
ージンも大きくなるa Vt (T rりを下げる方法
として、多結晶シリコンに水素を置換してトラップ密度
を下げる方法が知られている。
In the case of a negative surge, the current flowing through the TrZ inversion layer must be large.A detailed study of the characteristics of thin-film semiconductor devices revealed that conventional devices are sufficient for negative surges. If Vg (T r 1) is lowered, the margin becomes larger.a Vt (T r 1) A known method for lowering the T r is to lower the trap density by substituting hydrogen in polycrystalline silicon.

出願人本人も第4図の素子を製造し、これをプラズマ水
素置換処理した結果、 Vz (T rz)が半減する
ことを確認した。しかしそれらの実験結果を詳細に調査
した結果新たな知見が得られた。すなわち、水素置換処
理前後のリーク電流を調べてみると、駆動のドレイン電
圧Voが小さい時にはリーク電流は変わらないが、駆動
電圧を高くすると水素置換処理前の素子がリーク電流が
20倍も高くなってしまうことである。このことは、保
護されるTrlを水素置換処理して駆動電圧を下げ、保
護トランジスタTrzを水素置換処理のきかない構造に
して保護回路を構成すれば正のサージに対しても十分使
用できることが判明した。すなわち、上記の目的は保護
されるトランジスタを水素置換処理のききやすい構造に
して、保護トランジスタを水素化のききにくい構造にす
ることにより達成される。
The applicant himself manufactured the device shown in FIG. 4, and as a result of subjecting it to plasma hydrogen substitution treatment, it was confirmed that Vz (T rz) was reduced by half. However, as a result of detailed investigation of those experimental results, new findings were obtained. In other words, when we examine the leakage current before and after the hydrogen replacement treatment, we find that when the driving drain voltage Vo is small, the leakage current remains the same, but when the driving voltage is increased, the leakage current of the element before the hydrogen replacement treatment becomes 20 times higher. It's something that happens. This shows that if the protected Trl is subjected to hydrogen substitution treatment to lower the driving voltage, and the protection transistor Trz is constructed to a structure that cannot undergo hydrogen substitution treatment, it can be used satisfactorily even against positive surges. did. That is, the above object is achieved by making the transistor to be protected a structure that is easily subjected to hydrogen replacement treatment, and making the protection transistor a structure that is difficult to undergo hydrogenation.

〔作用〕[Effect]

保護される側のトランジスタを水素置換処理によって駆
動のゲート電圧を下げ、保護トランジスタを水素置換処
理のききにくい構造の素子を用い保護回路を構成するこ
とにより、保護されるトランジスタに正の高いサージ電
圧が印加した場合、保護トランジスタのドレイン電圧が
高くなり大きなリーク電流が保護トランジスタに流れ、
良好な保護回路の動作を行う。
By lowering the driving gate voltage of the transistor to be protected by hydrogen replacement treatment and configuring a protection circuit using an element with a structure that is difficult to undergo hydrogen replacement treatment for the protection transistor, high positive surge voltage can be applied to the protected transistor. is applied, the drain voltage of the protection transistor increases and a large leakage current flows to the protection transistor.
Ensure good protection circuit operation.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図により説明するe T
 r zは保護されるトランジスタ、Trzは保護トラ
ンジスタである。まずTrrについて説明する。Trl
は通常の薄膜トランジスタである61は絶縁基板、2は
ノンドープのチャネル層、3゜4はそれぞれソース及び
ドレイン領域、5は配線電極で通常はAQ及びその合金
で作る。6はゲート絶縁膜でCVD法で形成する。7は
ゲート電極で通常は自己整合型で3及び4の領域及び7
のゲート電極を低抵抗化するため半導体材料を用いる。
Hereinafter, one embodiment of the present invention will be explained with reference to FIG.
rz is a protected transistor and Trz is a protection transistor. First, Trr will be explained. Trl
61 is an ordinary thin film transistor; 2 is an insulating substrate; 2 is a non-doped channel layer; 3 and 4 are source and drain regions, respectively; and 5 is a wiring electrode, which is usually made of AQ or its alloy. 6 is a gate insulating film formed by the CVD method. 7 is a gate electrode which is usually self-aligned and is connected to regions 3 and 4 and 7.
A semiconductor material is used to lower the resistance of the gate electrode.

本例では半導体材料としては多結晶シリコンである* 
T r tでは2,3,4及び7が多結晶シリコンであ
る。7の多結晶シリコンの厚さは300〜5000人と
する。8は保護絶縁膜である* T r Lに水素置換
するために5図中の矢印で示した様に、例えば試料基板
を平行平板電極で高周波のプラズマ水素放電中に置くと
水素が8の絶縁膜、7のゲートの多結晶シリコン及び6
のゲート絶縁膜を通過して2のチャネル領域に入る。こ
れによりTrlには水素置換処理の効果があり、Trx
の駆動ゲート電圧が下げられる。一方、保護トランジス
タTrzには8の保護絶縁膜の上から5の配IIA電極
の作成工程で少なくとも7のゲート電極上部をおおう2
0の遮へい電極を設ける。このような構造にTrzを保
護トランジスタに用いることで水素の進入が遮へいされ
る。著者の実験結果では、水素の透過率は 八〇あるいは他の金属)多結晶シリコン)SiOz等の
絶縁膜であった。第5図に同一基板上に形成した同一寸
法のTrlとTrzの水素置換処理後のMOS特性:ゲ
ート電圧(V「)−ドレイン電流(Io )特性を示す
@ Vsoはドレイン電圧、チャネル長し。
In this example, the semiconductor material is polycrystalline silicon*
In T r t, 2, 3, 4 and 7 are polycrystalline silicon. The thickness of the polycrystalline silicon of No. 7 is 300 to 5000. 8 is a protective insulating film * In order to replace T r L with hydrogen, as shown by the arrow in Figure 5, for example, when the sample substrate is placed in a high-frequency plasma hydrogen discharge using parallel plate electrodes, hydrogen will insulate 8. film, polycrystalline silicon of the gate of 7 and 6
It passes through the gate insulating film of 2 and enters the channel region of 2. As a result, Trl has the effect of hydrogen replacement treatment, and Trx
The drive gate voltage of is lowered. On the other hand, in the protection transistor Trz, in the step of forming the 5th interconnection IIA electrode from above the 8th protective insulating film, at least 7th gate electrode is covered with 2nd
A shielding electrode of 0 is provided. By using Trz as a protection transistor in such a structure, entry of hydrogen can be blocked. According to the author's experimental results, the hydrogen permeability was 80% or that of other metals (polycrystalline silicon), SiOz, or other insulating films. FIG. 5 shows the MOS characteristics of Trl and Trz of the same size formed on the same substrate after hydrogen replacement treatment: gate voltage (V'') vs. drain current (Io) characteristics @Vso is the drain voltage and channel length.

チャネル幅Wはそれぞれ50μm、20μmである。T
rlの特性を実線、Trzの特性を破線で示す、但し、
Trzのゲートソースは短絡せずに単体MOSとして特
性を測定した。Trtの素子のオン特性はTrxに比べ
て著しく改善され、同一ドレイン電流を得るゲート電圧
はTrtの方が172程度に低くなり駆動ゲート電圧が
下げられる。
Channel width W is 50 μm and 20 μm, respectively. T
The characteristics of rl are shown by a solid line, and the characteristics of Trz are shown by a broken line, however,
The characteristics of the Trz were measured as a single MOS without shorting the gate and source. The on-characteristics of the Trt element are significantly improved compared to the Trx, and the gate voltage for obtaining the same drain current is about 172 lower for the Trt, allowing the drive gate voltage to be lowered.

1)通常の動作時: Trx にVt =5〜20V電
圧が印加しTrtはオン状態になる。Trzはソース・
ゲートが第1図の様に短縮しであるのでVgo=5〜2
0Vで動作する。その時のリーク電流は第5図(a)の
A点に表わす様に小さく電流でTrsのVtの電圧降下
に影響を与えない。
1) During normal operation: A voltage of Vt = 5 to 20 V is applied to Trx, and Trt is turned on. Trz is the source
Since the gate is shortened as shown in Figure 1, Vgo = 5 to 2.
Operates at 0V. The leakage current at this time is small as shown at point A in FIG. 5(a) and does not affect the voltage drop of Vt of the Trs.

2)正のサージ電圧印加時:入力端子から50Vのサー
ジが入るとする。この時TrzはVso=50Vである
ので、第4図(b)のBの電流がTrzを流れる。これ
はTrtのリーク電流の20倍以上ありTrlのゲート
電圧を下げ絶縁膜を保護する。
2) When applying a positive surge voltage: Assume that a 50V surge is applied from the input terminal. At this time, since Vso of Trz is 50V, the current B in FIG. 4(b) flows through Trz. This is more than 20 times the leakage current of Trt, and lowers the gate voltage of Trl to protect the insulating film.

3)負のサージ電圧印加時ニー40Vのサージが入力し
たとする。Trzは直ちにオンして第4図(b)のCの
電流が流れてTrl を保護する。
3) Assume that a knee surge of 40 V is input when a negative surge voltage is applied. Trz is immediately turned on and current C in FIG. 4(b) flows to protect Trl.

Trzのゲート絶縁膜にもサージ電圧が印加するが、サ
ージがパルス電圧なので過渡的に電流がTrzに流れて
いると電圧が下がってくるので問題はない6本発明構造
で示した他にTrzに水素が進入しない構造としては、
Trzの7のゲート電極を金屑とする方法や、7の多結
晶シリコンゲート及び3,4の表面を白金やモリブデン
等のシリサイド電極処理をしても達成できる。また、T
rz とTrzの7の多結晶シリコンゲート電極の厚さ
を変えてTrzの方を厚く形成することによっても同等
の効果が得られる。又、本実施例では、nチャネル構造
のみを示したがこれはPチャネル型であっても全く同様
の効果が得られる。もちろん、半導体材質として非晶質
シリコンを用いても良い。
A surge voltage is also applied to the gate insulating film of the Trz, but since the surge is a pulse voltage, the voltage will drop if the current flows transiently through the Trz, so there is no problem. As a structure that does not allow hydrogen to enter,
This can be achieved by using gold scrap for the gate electrode 7 of the Trz, or by treating the polycrystalline silicon gate 7 and the surfaces 3 and 4 with silicide electrodes such as platinum or molybdenum. Also, T
The same effect can be obtained by changing the thickness of the polycrystalline silicon gate electrodes 7 for rz and Trz so that Trz is formed thicker. Further, in this embodiment, only an n-channel structure is shown, but even if it is a p-channel type, exactly the same effect can be obtained. Of course, amorphous silicon may be used as the semiconductor material.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、保護用トランジスタを水素置換処理の
きかない構造にしてこれを用いて保護回路を形成するこ
とで、良好な機能を持つ静電気サージを防止できる回路
を提供できる0本発明を用いない保護回路に比べて少な
くとも正のサージ電圧に対して20倍以上の保護性能を
持つ。
According to the present invention, a protective transistor is formed into a structure that cannot be subjected to hydrogen replacement treatment, and is used to form a protective circuit, thereby providing a circuit that can prevent static electricity surges and has good functionality. It has at least 20 times the protection performance against positive surge voltages compared to a protection circuit that does not have this type of protection.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は一実施例を表す薄膜半導体素子を用いた保護回
路の素子説明図、第2図は従来の保護回路とその特性図
、第3図は従来の保護回路を構成するMoSトランジス
タの説明図、第4図は一般的な薄膜トランジスタの断面
図、第5図は本発明の保護回路を構成する薄膜トランジ
スタの素子特性図である。 1・・・絶縁基板、2・・・ノンドープチャネル層、3
・・・ソース領域、4・・・ドレイン領域、5・・・配
線電極。 帛艷 早2−口 (α) (b) 宅3図 C(L) (b) 11−一−ビT1h拠 1z−−−P 型f q 牟’L4 も40 寄S図 V%いり $(V)
Fig. 1 is an element explanatory diagram of a protection circuit using a thin film semiconductor element representing one embodiment, Fig. 2 is a conventional protection circuit and its characteristic diagram, and Fig. 3 is an explanation of a MoS transistor constituting the conventional protection circuit. FIG. 4 is a cross-sectional view of a general thin film transistor, and FIG. 5 is an element characteristic diagram of the thin film transistor constituting the protection circuit of the present invention. 1... Insulating substrate, 2... Non-doped channel layer, 3
... Source region, 4... Drain region, 5... Wiring electrode. 2-guchi (α) (b) House 3 C (L) (b) 11-1-bi T1h based 1z---P type f q MU'L4 also 40 yose S figure V% ri $ ( V)

Claims (1)

【特許請求の範囲】 1、絶縁基板上に非晶質あるいは多結晶半導体を用い複
数のMOS型半導体素子を形成し、これを配線電極によ
り連結した集積回路において、MOS型半導体素子のゲ
ート絶縁膜の静電気によるサージ破壊を防止するために
用いる保護回路に用いるMOS型半導体素子として、保
護回路に用いるMOS型素子の素子特性が水素化置換法
の効果の受けにくい構造を有する素子を用い、また保護
すべきMOS型半導体素子は水素化置換法の効果の受け
やすい構造を有する素子を用いたことを特徴とする薄膜
半導体用保護回路。 2、特許請求の範囲第1項において、前記水素置換法の
効果の受けにくいMOS型半導体素子の構造において、
金属配線を利用して水素の進入を遮へいした構造を有す
る素子を保護回路の素子として用いたことを特徴とする
薄膜半導体用保護回路。 3、特許請求の範囲第1項において、前記水素置換法の
効果の受けにくいMOS型半導体素子の構造において、
ゲート電極となる半導体層およびソース、ドレイン半導
体層にシリサイド系の金属を蒸着して水素の進入を遮へ
いした構造を有する素子を保護回路の素子として用いた
ことを特徴とする薄膜半導体用保護回路。
[Claims] 1. In an integrated circuit in which a plurality of MOS type semiconductor elements are formed using an amorphous or polycrystalline semiconductor on an insulating substrate and are connected by wiring electrodes, the gate insulating film of the MOS type semiconductor elements is As a MOS type semiconductor element used in a protection circuit used to prevent surge damage due to static electricity, an element having a structure in which the element characteristics of the MOS type element used in the protection circuit are not susceptible to the effect of the hydrogenation replacement method is used. A protection circuit for a thin film semiconductor, characterized in that the MOS type semiconductor element to be used is an element having a structure that is easily susceptible to the effect of a hydrogenation substitution method. 2. In claim 1, in the structure of a MOS type semiconductor element that is not easily affected by the hydrogen replacement method,
A protection circuit for a thin film semiconductor, characterized in that an element having a structure that uses metal wiring to block the entry of hydrogen is used as an element of the protection circuit. 3. In claim 1, in the structure of a MOS type semiconductor element that is not easily susceptible to the effect of the hydrogen replacement method,
A protection circuit for a thin film semiconductor, characterized in that an element having a structure in which a silicide-based metal is vapor-deposited on a semiconductor layer serving as a gate electrode and a source and drain semiconductor layer to shield hydrogen from entering is used as an element of the protection circuit.
JP12128187A 1987-05-20 1987-05-20 Protective circuit for thin-film semiconductor Pending JPS63288066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12128187A JPS63288066A (en) 1987-05-20 1987-05-20 Protective circuit for thin-film semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12128187A JPS63288066A (en) 1987-05-20 1987-05-20 Protective circuit for thin-film semiconductor

Publications (1)

Publication Number Publication Date
JPS63288066A true JPS63288066A (en) 1988-11-25

Family

ID=14807371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12128187A Pending JPS63288066A (en) 1987-05-20 1987-05-20 Protective circuit for thin-film semiconductor

Country Status (1)

Country Link
JP (1) JPS63288066A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5486716A (en) * 1991-05-14 1996-01-23 Seiko Instruments Inc. Semiconductor integrated circuit device with electrostatic damage protection

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5486716A (en) * 1991-05-14 1996-01-23 Seiko Instruments Inc. Semiconductor integrated circuit device with electrostatic damage protection

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