JPS63287887A - Display signal formation system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a personal computer that uses a television as a display, and more particularly to a system for a device that forms a composite signal that is a television video signal.

[Conventional technology] In conventional PCs, the display is not a TV.
A high-priced monitor device is used to transmit an analog signal indicating the color formed by the shading of each of the basic colors red (R), green (G), and blue (B) to the monitor device. It was showing.

This conventional display signal forming system for a personal computer is shown in FIG.

The CPUI is connected to the bus 2 and controls each device within the personal computer. A signal of 21 MHz, for example, output from the oscillation circuit 3 is input to the CPU 1, and the frequency is divided by four in the frequency dividing circuit 4, and used as the clock signal 5 of 53 MHz. The display control device 6 is a one-chip integrated circuit (hereinafter referred to as IC) that is controlled by the CPUI, and reads out and synthesizes display data stored in the RAM 8, which is a storage device, and creates a display corresponding to the color of one pixel. A code signal 11 is formed. This display control device 6 has a built-in synchronization circuit 7 that outputs a synchronization signal inside and outside the device. The synchronization circuit 7 outputs a synchronization signal to the outside of the device under internal control, or receives a synchronization signal from outside the device and supplies the synchronization signal to the inside of the device.

The display control device 6 is 53M as shown in FIG.
It receives a Hz clock signal 5 and outputs a display code signal 11 indicating the color of one dot (pixel) of a character to be displayed in synchronization with the clock signal 5.

Furthermore, since the character is formed in units of 8 dots, the synchronization circuit 7 converts the 53MHz clock signal 5 into 1/8
It is possible to control synchronization using the divided period. The synchronization circuit 7 outputs a vertical synchronization signal 9 at the start of one frame to be displayed, and thereafter starts outputting a display code signal for one frame. Further, the horizontal synchronization signal 10 is output before the horizontal display code signal within one frame is output, and the horizontal output is output every time the next row is scanned.

The display signal forming device 12 is a one-chip IC that is controlled by the CPU 1 and receives a display code signal 11, a vertical synchronizing signal 9, and a horizontal synchronizing signal 10 from the display control device 6, and also receives a clock signal 5 from the frequency dividing circuit 4. receive. This display signal forming device 12 includes a latch circuit 13, RA
It has a built-in M14, a D/A conversion circuit 15, and the like, and outputs an analog signal indicating the color of the pixel to be displayed on the monitor 16, which is a display. This analog signal is R%G,H
Each of these is output as a signal indicating the lightness and darkness of each.

Here, to explain the operation of the display signal forming device 12, first, the latch circuit receives the clock signal 5 and latches the display code signal 11 of one pixel.

The RAM 14 is then addressed by the latched code signal. This RAM 14 stores data on how deep each of R and GlB should be made with respect to the color code signal. Therefore, by D/A converting this read data, an analog signal required by the monitor 16 is formed.

The monitor 16 receives the R%G, B analog signals and the synchronization signal from the display signal forming device 12 and displays them.

[Problem that the invention seeks to solve]

In this conventional system, if the monitor 16, which is a display, is to be changed to a television, it is inevitably necessary to reconfigure the system.

In other words, the signal that is displayed on the TV must be transmitted over a single signal line, and as shown in Figure 4, it is a composite signal whose standard is strictly determined, and cannot be replaced with an R%G1B analog signal. be.

In addition, the synchronization circuit built into the display control device is
It operates based on a 53MHz clock signal,
It is not possible to output a synchronization signal that conforms to the composite signal standard shown in FIG.

Therefore, instead of the D/A conversion circuit, a composite signal forming circuit that forms a composite signal and a synchronization circuit that outputs a vertical synchronization signal and a horizontal synchronization signal conforming to the composite signal standard must be incorporated into the conventional system.

In addition, in conventional systems, clock signals were supplied to the display control device and the display signal forming device, respectively, which caused signal delays due to device terminals and transmission lines, making it easy for the latch timing in the latch circuit to deviate. It had become. However, there are frequency standards for composite signals, and this signal cannot be formed unless the timings of the clock signal and display code signal match. Regarding this delay, if the two devices are integrated into one chip, the delay becomes negligibly small and the problem is solved. However, with current manufacturing technology, it is impossible to combine both into one chip.

An object of the present invention is to provide a system in which necessary improvements to the conventional system can be made at the lowest cost by replacing the display in the conventional system with a television.

In particular, by simply improving one of the two devices that cannot be integrated into a single chip, an optimal system for forming display signals for television can be provided.

[Means for solving problems]

The display signal forming system of the present invention receives a display code signal specifying the color of each pixel and determines the shading of each basic color,
A display signal forming device that outputs a composite signal for displaying an image on a television, and a display control device that receives a clock signal, a vertical synchronization signal, and a horizontal synchronization signal and outputs the display code signal in synchronization with the clock signal. , the display signal forming device includes a clock signal forming circuit that divides the oscillation frequency of an oscillation device to form the clock signal, and a synchronization circuit that outputs the vertical synchronization signal and horizontal synchronization signal for displaying images on the television. It is characterized by including.

〔Example〕

Examples of the present invention will be described in detail below.

FIG. 2 is a diagram showing a display signal forming system of the present invention.

The CPU 21 is connected to the bus 22 and controls each device within the personal computer. The display signal forming device 32 is a one-chip IC controlled by the CPU 21, and the clock forming circuit 24
, a synchronous circuit 27, a latch 33, a RAM 34, and a composite signal forming circuit 39.

The clock forming circuit 24 receives a signal of about 21 MHz, which is six times the color subcarrier, from the oscillation circuit 23, and divides the signal into 5
396MH2 clock signal 25 is formed. The synchronization circuit 27 generates a vertical synchronization signal 29' indicating the start of display in the vertical direction of one frame and a horizontal synchronization signal 3 indicating the start of display in the horizontal direction in accordance with the TV composite signal standard.
Outputs 0'.

The display control device 26 is the CPU 21? : It is a one-chip IC that is controlled by , the color to be displayed for each pixel in one frame is sequentially output as a display code signal 31. This display code signal 31 is formed as a signal indicating the color of a pixel at a predetermined position by combining display data read out from the RAM 28 that stores various data necessary for displaying on the television 36. In FIG. 2, the display code signal 31 has 9 bits and allows display of 2'=512 different colors.

The latch circuit 83 latches the display code signal from the display control device 26 in synchronization with the clock signal 25. This latched signal becomes an address signal for the RAM 34. Unlike in the past, the latch clock signal here is generated internally, so the delay is so small that it can be ignored. Therefore, by reliably latching the display code signal, the code signal and the clock signal can be synchronized.

The address of the RAM 34 is designated by the display code signal 31 for the pixels latched by the latch circuit 38, and the data to be stored is output to this address. This data is based on the basic color red (R) for the color type indicated by the display code.
), green (G), and blue (B), which determines the basic color combination. In Figure 2, 3-bit data is output for R, 8-bit data for G, and 3-bit data for B, and each basic color has 8 levels of darkness. . In this embodiment, the display code is 9 bits, and the density specification for each basic color is 3 bits, but this can be any number of bits; the greater the number of bits, the more types of colors that can be displayed. It is.

The composite signal forming circuit 35 receives a signal specifying the density of each basic color from the RAM 34, and receives the signal from the synchronous circuit 2.
7, a vertical synchronizing signal 29" or a horizontal synchronizing signal 30" is received, and a composite signal conforming to the standards is formed as shown in FIG.

The system of the present invention is improved only in the display signal forming device compared to the conventional system.

Therefore, the display control device is exactly the same as the conventional one, and the display can be changed to a television by simply improving the display signal forming device.

In the present invention, the synchronization circuit of the display control device is configured to control the inside of the device in synchronization with the television synchronization signal from the display signal forming device.

Furthermore, as shown in FIG. 4, the composite signal includes a color burst signal that is obtained by dividing the 21 MHz output from the oscillation device into 1/6, but is not supplied to the clock forming circuit of the display signal forming device. A 21 MHz clock signal can be used.

〔Effect of the invention〕

As described above, the display signal forming system of the present invention improves only the display signal forming device of the conventional system, and includes a composite signal forming circuit, a clock signal forming circuit, and a synchronization circuit for composite signals in this device. Composite signals with fixed standards can be created simply by incorporating circuits.

In addition, the display control device can be used for monitors as before, and can also be used for televisions, maintaining versatility.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional display signal forming system. FIG. 2 is a diagram showing a display signal forming system of the present invention. FIG. 3 is a diagram showing a display code signal output in synchronization with a clock signal. FIG. 4 is a diagram showing a composite signal. Above Figure 3

Claims (1)

[Claims] A display signal forming device that receives a display code signal that specifies the color of each pixel, determines the shading of each basic color, and outputs a composite signal that displays an image on a television, a clock signal, a vertical synchronization signal, and a horizontal synchronization signal. a display control device that outputs the display code signal in synchronization with the clock signal, and the display signal forming device divides the oscillation frequency of the oscillation device to form the clock signal. and a synchronization circuit that outputs a vertical synchronization signal and a horizontal synchronization signal for displaying images on the television.