JPS6328510B2 - - Google Patents

Info

Publication number
JPS6328510B2
JPS6328510B2 JP10555482A JP10555482A JPS6328510B2 JP S6328510 B2 JPS6328510 B2 JP S6328510B2 JP 10555482 A JP10555482 A JP 10555482A JP 10555482 A JP10555482 A JP 10555482A JP S6328510 B2 JPS6328510 B2 JP S6328510B2
Authority
JP
Japan
Prior art keywords
light emitting
region
growth layer
conductivity type
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10555482A
Other languages
Japanese (ja)
Other versions
JPS58223380A (en
Inventor
Tomio Nakaya
Hideo Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stanley Electric Co Ltd
Original Assignee
Stanley Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stanley Electric Co Ltd filed Critical Stanley Electric Co Ltd
Priority to JP57105554A priority Critical patent/JPS58223380A/en
Publication of JPS58223380A publication Critical patent/JPS58223380A/en
Publication of JPS6328510B2 publication Critical patent/JPS6328510B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions

Description

【発明の詳細な説明】 本発明は発光ダイオードに関し、とくに同一基
板内に複数個の発光ダイオードを配列するいわゆ
る発光ダイオードアレイ(array)に係わるもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to light emitting diodes, and particularly to a so-called light emitting diode array in which a plurality of light emitting diodes are arranged on the same substrate.

周知の如く、発光ダイオード(以下LEDと略
す)とは半導体結晶内に形成されたpn接合に順
方向電流を流して発光させるダイオードである。
このLEDに要求される特性のうち重要なものは
発光波長特性、発光効率、寿命、価格などであ
り、そのために用途に応じて種々の半導体材料、
製作技術が開発され、各種ランプ、数字表示装
置、オプトエレクトロニクス用光源などに広く用
いられている。LEDは用途によつては単一素子
として用いられることも多いが、特に数字、文字
などの発光表示装置をLEDで製作する場合には、
同一基板内に複数個のLEDを配列するいわゆる
LEDアレイとして製作される方法が通常よく採
られている。LEDをどの分野に利用する場合で
も、すなわち単一素子として利用する場合でも、
またアレイとして利用する場合でも発光効率の高
いことが望ましいことは勿論である。しかしなが
ら従来の方法によつて得られたLEDアレイには
発光効率を低下させている重要な問題点があるこ
とが判明した。
As is well known, a light emitting diode (hereinafter abbreviated as LED) is a diode that emits light by passing a forward current through a pn junction formed in a semiconductor crystal.
The important characteristics required for this LED are emission wavelength characteristics, luminous efficiency, lifespan, price, etc., and for this purpose, various semiconductor materials,
Manufacturing technology has been developed and it is widely used in various lamps, numeric display devices, light sources for optoelectronics, etc. LEDs are often used as a single element depending on the application, but especially when manufacturing light emitting display devices such as numbers and letters with LEDs,
So-called arranging multiple LEDs on the same board
The most common method is to fabricate it as an LED array. No matter what field you use LEDs in, that is, when you use them as a single element,
Furthermore, even when used as an array, it is of course desirable that the luminous efficiency be high. However, it has been found that LED arrays obtained by conventional methods have important problems that reduce luminous efficiency.

この従来のLEDアレイのもつ上記問題点を以
下の具体例によつて説明する。
The above-mentioned problems with this conventional LED array will be explained using the following specific example.

従来では、例えば赤色LEDアレイをGaAlAs結
晶を用いて製作しようとすれば次に述べるような
方法が採られる。第1図aに断面構造を示すよう
に、まずn型GaAs基板1上に液相成長法で設計
されたn型GaAlAs結晶層2が不純物密度、厚み
をもつて形成され、しかる後再び液相成長法で設
計されたp型GaAlAs結晶層3が形成される。こ
のn型GaAlAs層2とp型GaAlAs層3とで形成
されるpn接合がLEDの主たる発光領域になるの
であるが、このpn接合を液相成長で得るのは拡
散法で得られるPn接合よりも発光効率が高いか
らである。
Conventionally, for example, when attempting to manufacture a red LED array using GaAlAs crystal, the following method has been adopted. As the cross-sectional structure is shown in FIG. A p-type GaAlAs crystal layer 3 designed by the growth method is formed. The pn junction formed by this n-type GaAlAs layer 2 and p-type GaAlAs layer 3 becomes the main light emitting region of the LED, but it is better to obtain this pn junction by liquid phase growth than the pn junction obtained by diffusion method. This is because the luminous efficiency is also high.

さてこの結晶を用いてLEDアレイを製作する
には、発光面側となるp型GaAlAs層3を電気的
に分離しなければならない。従来においては、第
1図bに分離された後の断面構造を示すように、
SiO2などの絶縁膜5を付着させた後所定の寸法
の窓をあけそこからSe、Teなどのn型不純物を
選択的に拡散し、n型成長層2に到達するような
n型拡散領域4を形成するのである。これで個々
のLEDとなる領域が島状に分離されることにな
る。
Now, in order to manufacture an LED array using this crystal, the p-type GaAlAs layer 3 on the light emitting surface side must be electrically isolated. Conventionally, as shown in FIG. 1b, which shows the cross-sectional structure after separation,
After depositing an insulating film 5 such as SiO 2 , a window of a predetermined size is opened and n-type impurities such as Se and Te are selectively diffused through the window to form an n-type diffusion region that reaches the n-type growth layer 2 . 4 is formed. This will separate the areas that will become individual LEDs into islands.

第1図から容易に判るように、p型表面からn
型不純物が拡散していく時には深さ方向ばかりで
なく横方向にも拡散していくことになるから、後
で光の取り出し窓となる領域の幅Bは肝心な発光
面である液相成長によつて形成されたpn接合の
領域の幅Aに比して必然的に遥かに狭い構造とな
る。従つて発光効率が良く且つ光の取り出し窓の
面に平行で光が取り出し易くなつている液相成長
のpn接合面積は広いにも拘らず、光を外に取り
出す窓は小さくなつてしまうために、結果的に発
光効率が低下していたのである。加えて拡散によ
つて形成されたpn接合はそれ自体発光効率が悪
く且つ光の取り出しにくい状態となつている。
As can be easily seen from Figure 1, from the p-type surface to the n
When the type impurity diffuses, it diffuses not only in the depth direction but also in the lateral direction, so the width B of the region that will later become the light extraction window is determined by the liquid phase growth, which is the important light emitting surface. As a result, the structure is inevitably much narrower than the width A of the pn junction region thus formed. Therefore, although the pn junction area of liquid phase growth, which has good luminous efficiency and is parallel to the plane of the light extraction window and makes it easy to extract light, is wide, the window that extracts the light to the outside is small. As a result, the luminous efficiency was reduced. In addition, the pn junction formed by diffusion itself has poor luminous efficiency and is in a state where it is difficult to extract light.

この従来のLEDアレイでは個々のLEDの大き
さを小さくし、且つLED間の距離を短くする程、
すなわち高集積度化する程上述した発光効率がよ
り低下していくことになる。
In this conventional LED array, the smaller the size of the individual LEDs and the shorter the distance between the LEDs, the more
In other words, the higher the degree of integration, the more the above-mentioned luminous efficiency decreases.

本発明の目的はこの従来のLEDのもつ問題点、
すなわち発光効率を低下させる原因を除去し、発
光効率の高いLEDアレイを提供することにある。
The purpose of the present invention is to solve the problems of conventional LEDs,
In other words, the object is to eliminate the causes of decreasing luminous efficiency and provide an LED array with high luminous efficiency.

本発明の一実施例についてGaAlAs赤色LEDア
レイを例にとつて詳細に説明する。
An embodiment of the present invention will be described in detail using a GaAlAs red LED array as an example.

本発明においても主たる発光領域となるpn接
合領域の形成法は従来法と同様に液相成長法で行
われる。すなわち、第1図aと全く同じ方法で得
られた第2図aに断面構造で示すものをLEDア
レイ製作のための結晶板として用いるのである。
LEDアレイをこの基板上に配列構成するために
は、アレイ内の各LEDを電気的に分離しなけれ
ばならないのであるが、本発明のLEDアレイは
次に述べるような製作工程によつて得られる。な
お、本発明を理解しやすくするために、この工程
はLEDアレイを一方向に配列構成する場合を例
としてある。
In the present invention, the pn junction region, which is the main light emitting region, is formed by liquid phase growth, as in the conventional method. That is, the cross-sectional structure shown in FIG. 2a, obtained by the same method as in FIG. 1a, is used as a crystal plate for manufacturing an LED array.
In order to configure an LED array on this substrate, each LED in the array must be electrically isolated, but the LED array of the present invention can be obtained by the following manufacturing process. . In order to make it easier to understand the present invention, this process is based on an example in which the LED array is arranged in one direction.

第2図aの断面構造をもつ結晶板の表面から、
Se、Teなどのn型不純物を選択的に拡散する。
その拡散によつてできるn型GaAlAs領域4は液
相成長法によつて得られたn型GaAlAs層2に達
するようにされているわけである。基板表面から
見た拡散領域4は、第2図bに示すようにLED
を一方向に配列する領域3を残し、p型GaAlAs
層に対するオーミツク接触のための金属電極が配
置される領域(光取り出しの行われない領域)に
形成される。その後表面に露出している拡散によ
つて形成されたpn接合を覆うような形で拡散領
域4の上にSiO2、Si3N4などの絶縁膜を形成す
る。しかる後LEDアレイにおいて各LEDを電気
的に分離するためには、従来のように拡散法によ
るのではなく第2図cに表面構造を示したよう
に、p型GaAlAs液相成長層3を選択的にn型
GaAlAs液相成長層2に達するように除去し、一
部n型拡散領域4に食い込むような形の切り込み
領域6を設けるのである。p型GaAlAs成長層の
選択的な除去は、通常は化学的エツチングがとら
れるが、他の物理的化学的な方法、例えばスパツ
タリング法などが用いられても良い。このように
することによつて、第2図cのX―X′方向の断
面図は、第2図c―1に示すように各LEDとな
る領域3が電気的に分離された構造となる。すな
わち、発光効率の高い液相成長法によつて得られ
たpn接合発光面積と光取り出し窓の面積はほぼ
等しくなり、且つ発光効率の良くない拡散法によ
つて得られるpn接合は、第2図cのY―Y′方向
の断面図である第2図c―2からも判るように、
p型GaAlAs層に対するオーミツク接触のための
金属電極が配置される部分において若干残存して
いるだけとなる。第2図c―3は第2図cの―
X′方向の断面図である。第2図dは、第2図c
のLEDアレイのp型GaAlAs成長層にオーミツク
接触のための金属電極7を形成して完成させた表
面配置構成図の例である。
From the surface of the crystal plate with the cross-sectional structure shown in Figure 2a,
Selectively diffuse n-type impurities such as Se and Te.
The n-type GaAlAs region 4 formed by the diffusion is made to reach the n-type GaAlAs layer 2 obtained by the liquid phase growth method. The diffusion region 4 seen from the substrate surface is the LED as shown in Figure 2b.
Leaving region 3 where the
It is formed in a region where a metal electrode for ohmic contact with the layer is arranged (a region from which light is not extracted). Thereafter, an insulating film of SiO 2 , Si 3 N 4 or the like is formed on the diffusion region 4 so as to cover the pn junction formed by diffusion exposed on the surface. After that, in order to electrically isolate each LED in the LED array, instead of using the conventional diffusion method, we selected a p-type GaAlAs liquid phase growth layer 3, whose surface structure is shown in Figure 2c. Generally n-type
The cut region 6 is removed so as to reach the GaAlAs liquid phase growth layer 2 and partially cuts into the n-type diffusion region 4. For selective removal of the p-type GaAlAs growth layer, chemical etching is usually used, but other physical and chemical methods such as sputtering may also be used. By doing this, the cross-sectional view in the X-X' direction of Figure 2c has a structure in which the regions 3 that become each LED are electrically isolated, as shown in Figure 2c-1. . In other words, the light emitting area of the pn junction obtained by the liquid phase growth method, which has high luminous efficiency, and the area of the light extraction window are almost equal, and the pn junction obtained by the diffusion method, which has low luminous efficiency, has a second As can be seen from Figure 2 c-2, which is a cross-sectional view in the Y-Y′ direction of Figure c,
Only a small amount remains in the area where the metal electrode for ohmic contact with the p-type GaAlAs layer is placed. Figure 2 c-3 is Figure 2 c-
FIG. 3 is a cross-sectional view in the X' direction. Figure 2 d is Figure 2 c
This is an example of a surface layout configuration diagram completed by forming a metal electrode 7 for ohmic contact on a p-type GaAlAs growth layer of an LED array.

このように本発明によるLEDアレイにおいて
は、実質的な発光面積(すなわち効率の高い液相
成長法によつて得られるpn接合面積)と光取り
出し面積とがほぼ同じとなるので従来のような発
光損失を極めて少なくすることができ、結果的に
LEDアレイの発光効率を高めることができるの
である。しかも拡散法によつて形成されている余
分なpn接合の面積はわずかになるので、各LED
の光取り出し面積を同じにしても接合面積は従来
のLEDよりも小さくなつているから電流密度を
高くすることができ、発光強度も増加するといつ
た利点も合わせもつのである。
In this way, in the LED array according to the present invention, the actual light emitting area (that is, the pn junction area obtained by the highly efficient liquid phase growth method) and the light extraction area are almost the same, so it is not possible to emit light like the conventional one. Loss can be extremely reduced, resulting in
This makes it possible to increase the luminous efficiency of the LED array. Moreover, the area of the extra pn junction formed by the diffusion method is small, so each LED
Even if the light extraction area is the same, the junction area is smaller than that of conventional LEDs, so current density can be increased, and the light emission intensity also increases.

本発明による第2図に示すLEDアレイは、上
述したように従来のLEDアレイに比し遥かに発
光効率が上昇するのであるが、なお発光効率の低
い拡散法によるpn接合領域が若干残存している。
本発明を更に明確にする目的で、第2図dの
LEDアレイの発光効率をより向上させる実施例
を第3図に基づいて説明する。
As mentioned above, the LED array shown in FIG. 2 according to the present invention has a much higher luminous efficiency than the conventional LED array, but there still remains some pn junction region due to the diffusion method with low luminous efficiency. There is.
For the purpose of further clarifying the invention, FIG.
An embodiment for further improving the luminous efficiency of the LED array will be described based on FIG. 3.

第2図aに示したような基板の表面から第3図
aに平面図を示したように、p型GaAlAs成長層
3の上からSeやTeなどのn型不純物を選択的に
拡散し、n型拡散領域4を複数個形成する。拡散
深さはn型GaAlAs成長層2に達するようにす
る。このn型拡散領域4の大きさ、形状及び配置
は、最後に発光面となるp型GaAlAs成長層3に
オーミツク接触のための金属電極がその上に配置
形成されることになるので、それによつて決めら
れることになる。
N-type impurities such as Se and Te are selectively diffused from the surface of the substrate as shown in FIG. 2a to the top of the p-type GaAlAs growth layer 3 as shown in the plan view in FIG. A plurality of n-type diffusion regions 4 are formed. The diffusion depth is set to reach the n-type GaAlAs growth layer 2. The size, shape, and arrangement of this n-type diffusion region 4 are determined by the fact that a metal electrode for ohmic contact will be formed on the p-type GaAlAs growth layer 3, which will finally become the light emitting surface. The decision will be made accordingly.

このn型拡散領域4を覆う形でSiO2、Si3N4
どの絶縁層5が形成された後前述した切り込み領
域6を設ける。この切り込み領域6は第3図bに
LEDアレイの完成後の平面図を示したように発
光面となる領域3と電極7とを残して全面に亘る
ようにし、深さはn型GaAlAs層2に達するよう
設けられるのである。
After an insulating layer 5 of SiO 2 , Si 3 N 4 or the like is formed to cover the n-type diffusion region 4, the above-mentioned cut region 6 is provided. This cut area 6 is shown in Figure 3b.
As shown in the plan view after completion of the LED array, the LED array is provided so as to extend over the entire surface except for the region 3 that will become the light emitting surface and the electrode 7, and to reach the depth of the n-type GaAlAs layer 2.

従つて、LEDアレイの中の1個のLEDの断面
図(第3図bのY―Y′方向の断面図)である第
3図cからも理解されるように、拡散によつて形
成されるpn接合は、電極7と発光領域3とを接
続する電極下の部分にのみ存在することになるか
ら、第2図の構造のLEDアレイよりも更に発光
効率、発光強度が向上するのである。
Therefore, as can be understood from FIG. 3c, which is a cross-sectional view of one LED in the LED array (a cross-sectional view along the Y-Y' direction in FIG. 3b), the LED is formed by diffusion. Since the pn junction exists only in the portion below the electrode that connects the electrode 7 and the light emitting region 3, the luminous efficiency and luminous intensity are further improved compared to the LED array having the structure shown in FIG.

以上、GaAlAs赤色LEDアレイを実施例として
本発明を述べてきたが、他の―族化合物半導
体、或いは―族化合物半導体を用いたLED
アレイにも適用できることは勿論である。また、
第2図と全く逆の伝導型のLEDアレイであつて
も何ら差し支えがない。さらに、切り込み領域の
形成は第2図の例では表面のオーミツク電極形成
前で行つているが後でも良い。さらにまた、この
切り込み領域内に合成樹脂などを流し込む方法を
併用しても良いことは勿論である。
The present invention has been described above using a GaAlAs red LED array as an example, but LEDs using other - group compound semiconductors or - group compound semiconductors may also be used.
Of course, it can also be applied to arrays. Also,
There is no problem even if the LED array has a conduction type completely opposite to that shown in Figure 2. Furthermore, although the cut region is formed before the formation of the ohmic electrode on the surface in the example shown in FIG. 2, it may be formed after the formation of the ohmic electrode. Furthermore, it goes without saying that a method of pouring synthetic resin or the like into the cut area may also be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aはn型GaAs結晶基板にn型GaAlAs、
p型GaAlAs成長層を液相成長法によつて得た結
晶板の断面構造図。第1図bは従来の
GaAlAsLEDアレイの断面構造図。第2図aは第
1図aと同様、n型GaAs結晶基板にn型
GaAlAs、p型GaAlAs成長層を液相成長法によ
つて得た結晶板の断面図。第2図bは本発明によ
る第2図aに選択的にn型不純物を拡散した後の
表面から見た平面図。第2図cは本発明による切
り込み領域が形成された後のGaAlAsLEDアレイ
の平面図であり、同c―1は第2図cのX―
X′方向、同c―2はY―Y′方向、同c―3は
―′方向の各断面図。第2図dは本発明による
切り込み領域が形成された後金属電極が設けられ
て完成したGaAlAsLEDアレイの平面図。第3図
aは本発明により第2図aの表面から選択的にn
型不純物を拡散し拡散領域を形成した基板を表面
から見た平面図。第3図bは本発明による切り込
み領域が形成され完成されたGaAlAsLEDアレイ
の平面図。第3図cは第3図bのY―Y′方向の
断面図である。 1…n型GaAs基板;2…n型GaAlAs結晶
層;3…p型GaAlAs結晶層;4…n型拡散領
域;5…絶縁膜;6…切り込み領域;7…電極。
Figure 1a shows n-type GaAlAs on an n-type GaAs crystal substrate.
FIG. 2 is a cross-sectional structural diagram of a crystal plate in which a p-type GaAlAs growth layer is obtained by liquid phase growth. Figure 1b shows the conventional
Cross-sectional structure diagram of GaAlAs LED array. Figure 2 a is the same as Figure 1 a, with an n-type GaAs crystal substrate and an n-type GaAs crystal substrate.
FIG. 2 is a cross-sectional view of a crystal plate in which a GaAlAs and p-type GaAlAs growth layer is obtained by liquid phase growth. FIG. 2b is a plan view of the surface of FIG. 2a after selectively diffusing n-type impurities according to the present invention. FIG. 2c is a plan view of the GaAlAs LED array after the notch region according to the present invention is formed, and FIG.
Cross-sectional views in the X' direction, c-2 in the Y-Y' direction, and c-3 in the -' direction. FIG. 2d is a plan view of a completed GaAlAs LED array in which metal electrodes are provided after the notch region is formed according to the present invention. FIG. 3a is selectively n from the surface of FIG. 2a according to the present invention.
FIG. 2 is a plan view of a substrate in which a type impurity is diffused to form a diffusion region, viewed from the surface. FIG. 3b is a plan view of a completed GaAlAs LED array with cut regions formed according to the present invention. FIG. 3c is a cross-sectional view taken along YY' direction of FIG. 3b. DESCRIPTION OF SYMBOLS 1... n-type GaAs substrate; 2... n-type GaAlAs crystal layer; 3... p-type GaAlAs crystal layer; 4... n-type diffusion region; 5... insulating film; 6... notch region; 7... electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体結晶上に液相成長により第1の伝導型
を有する成長層と、引き続き液相成長により上記
第1とは逆の第2の伝導型を有する成長層とが形
成されることによつて得られたpn接合を有する
半導体基板上に発光ダイオードを複数個配列せし
めた発光ダイオードアレイにおいて、この発光ダ
イオードアレイを構成する各発光ダイオードの発
光面にオーミツク接触を設けるために配置される
金属電極領域にほぼ対応する第2の成長層領域が
選択拡散によつて上記第1の伝導型を有する成長
層と同一の伝導型に変換されており、また各発光
ダイオードの発光面となる第2の成長層領域と実
質的に上記金属電極領域に対応する上記伝導型変
換された第2の成長層領域とを残しその他の部分
の第2の成長層が除去されていることを特徴とす
る発光ダイオードアレイ。
1. By forming a growth layer having a first conductivity type by liquid phase growth on a semiconductor crystal, and a growth layer having a second conductivity type opposite to the first conductivity type by subsequent liquid phase growth. In a light emitting diode array in which a plurality of light emitting diodes are arranged on a semiconductor substrate having a pn junction, a metal electrode region is arranged to provide ohmic contact with the light emitting surface of each light emitting diode constituting the light emitting diode array. A region of the second growth layer corresponding approximately to the region of the growth layer having the first conductivity type is converted by selective diffusion to the same conductivity type as the growth layer having the first conductivity type, and a region of the second growth layer that becomes the light emitting surface of each light emitting diode is A light emitting diode array characterized in that the second growth layer in other parts is removed, leaving only the layer region and the second growth layer region whose conductivity type has been converted substantially corresponding to the metal electrode region. .
JP57105554A 1982-06-21 1982-06-21 Light emitting diode array Granted JPS58223380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57105554A JPS58223380A (en) 1982-06-21 1982-06-21 Light emitting diode array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57105554A JPS58223380A (en) 1982-06-21 1982-06-21 Light emitting diode array

Publications (2)

Publication Number Publication Date
JPS58223380A JPS58223380A (en) 1983-12-24
JPS6328510B2 true JPS6328510B2 (en) 1988-06-08

Family

ID=14410773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57105554A Granted JPS58223380A (en) 1982-06-21 1982-06-21 Light emitting diode array

Country Status (1)

Country Link
JP (1) JPS58223380A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004247435A (en) 2003-02-12 2004-09-02 Sharp Corp Semiconductor light emitting device

Also Published As

Publication number Publication date
JPS58223380A (en) 1983-12-24

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