JPH06169104A - Emiconductor light-emitting device and manufacture thereof - Google Patents

Emiconductor light-emitting device and manufacture thereof

Info

Publication number
JPH06169104A
JPH06169104A JP34162692A JP34162692A JPH06169104A JP H06169104 A JPH06169104 A JP H06169104A JP 34162692 A JP34162692 A JP 34162692A JP 34162692 A JP34162692 A JP 34162692A JP H06169104 A JPH06169104 A JP H06169104A
Authority
JP
Japan
Prior art keywords
light emitting
groove
mesa shape
light
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34162692A
Other languages
Japanese (ja)
Inventor
Masashi Yoshimura
雅司 吉村
Toshiki Yoshida
俊樹 吉田
Manabu Endo
学 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP34162692A priority Critical patent/JPH06169104A/en
Priority to US08/112,669 priority patent/US5406095A/en
Publication of JPH06169104A publication Critical patent/JPH06169104A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To increase the current-passing area on a P-N junction surface by a method wherein the groove, formed in the direction in parallel with the array direction where a plurality of lightemitting parts are arranged, is formed in mesa shape, adjacently- located light-emitting part separating groove is formed in forward mesa shape from the light-emitting surface to the P-N junction, and the part deeper than the P-N junction is formed in inverted mesa shape. CONSTITUTION:A p-type GaAs layer 13 is formed by growing an n-type GaAs layer 12 on a (100) n-type GaAs substrate 11 and by diffusing Zn. The photoresit, to be used for formation of a groove in the direction vertical to the array direction to be used for isolation of each light-emitting part from the array direction, is patterned in such a manner that the column direction where light-emitting parts are arranged in line is brought in parallel with the crystal axis in <0-11> direction, and when an etching treatment is conducted for formation of a groove deeper than the P-N junction surface using the above-mentioned photoresit as a mask, the groove in the direction of <0-11> is brought into forward mesa shape. The groove in direction <0-11> between light-emitting parts is formed in forwards mesa shape from the light emitting surface of the P-N junction surface 14, the part deeper than that is formed into inverted mesa shape, and the P-N junction surface 14 can be made wider.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、モノリシック発光ダイ
オードアレイなどの半導体発光装置に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a monolithic light emitting diode array.

【0002】[0002]

【従来の技術】従来より、発光ダイオードアレイは、デ
ィスプレイ装置やLEDプリンタ装置の光源として使用
されるなど各種装置に使用されている。そして、単結晶
基板上にエピタキシャル成長させた各層からなる化合物
半導体の表面に複数の発光部分(発光ダイオード部)を
列状に形成したモノリシック発光ダイオードアレイで
は、それぞれの発光部分が、選択拡散法やメサ型エッチ
ング法などによって各々分離されている。そして、例え
ば、GaAs基板上にGaAsP層をエピタキシャル成
長させた化合物半導体の発光部分の分離を選択拡散法に
よって行う場合は、エピタキシャル成長されたGaAs
P層の各発光部分の境界部分にZnを拡散する方法が多
く採られているが、この方法は、拡散マスクとGaAs
P層表面との界面にZnが拡散しやすく、製造歩留まり
が悪くなるという欠点があった。
2. Description of the Related Art Conventionally, light emitting diode arrays have been used in various devices such as used as a light source for display devices and LED printer devices. Then, in a monolithic light-emitting diode array in which a plurality of light-emitting portions (light-emitting diode portions) are formed in rows on the surface of a compound semiconductor composed of each layer epitaxially grown on a single crystal substrate, each light-emitting portion has a selective diffusion method or a mesa. They are separated by a die etching method or the like. Then, for example, when the light emitting portion of the compound semiconductor in which the GaAsP layer is epitaxially grown on the GaAs substrate is separated by the selective diffusion method, the epitaxially grown GaAs is used.
The method of diffusing Zn at the boundary of each light emitting portion of the P layer is often adopted, but this method uses a diffusion mask and GaAs.
There is a drawback that Zn easily diffuses at the interface with the surface of the P layer, resulting in a poor production yield.

【0003】そこで、基板表面に凹凸を形成して各発光
部分を分離するメサ型エッチング法が多く用いられてい
る。このメサ型エッチング法を図4〜図6と共に説明す
る。図4は従来の発光ダイオードアレイを示す斜視図、
図5はそのA−A断面を示す一部拡大図、図6は同じく
B−B断面を示す一部拡大図である。
Therefore, a mesa type etching method is widely used in which unevenness is formed on the substrate surface to separate each light emitting portion. This mesa type etching method will be described with reference to FIGS. FIG. 4 is a perspective view showing a conventional light emitting diode array,
5 is a partially enlarged view showing the AA cross section, and FIG. 6 is a partially enlarged view also showing the BB cross section.

【0004】図4に示す発光ダイオードアレイは、(1
0 0)n型GaAs基板1上にVPE(気相成長
法)などによりn型GaAsP層2をエピタキシャル成
長させ、このn型GaAsP層2に、封管法によりZn
を拡散してp型GaAsP層3を形成する。そして、こ
の上にSiO2 、SiN等のエッチングマスクを設け
て、図のような結晶軸の方向にアレイを形成するように
パターニングしたのち、硫酸系のエッチャントを使用し
てpn接合面4よりも深くエッチングを行うと図5,図
6のようにエッチングされて各発光部分が分離される。
The light emitting diode array shown in FIG.
0) An n-type GaAsP layer 2 is epitaxially grown on the n-type GaAs substrate 1 by VPE (vapor phase epitaxy) or the like, and Zn is formed on the n-type GaAsP layer 2 by a sealed tube method.
To form a p-type GaAsP layer 3. Then, an etching mask of SiO 2 , SiN or the like is provided on this, and patterning is performed so as to form an array in the direction of the crystal axis as shown in the figure. When deep etching is performed, the light emitting portions are separated as shown in FIGS.

【0005】一般に、III −V族化合物半導体結晶はエ
ッチング方向に異方性が強く存在し、(1 0 0)面
を<0 1 1>方向の溝を形成するようにメサエッチ
ングすると、その溝の側面の稜角は鋭角(逆メサ)とな
り、<0 −1 1>方向の溝を形成するようにメサエ
ッチングすると、その溝の側面の稜角は鈍角(順メサ)
となる。したがって、この例では、発光部分の並ぶ列方
向(アレイ方向)の結晶軸が<0 −1 1>方向であ
るので、この列と平行方向にエッチングされる溝は図6
に示すように順メサ型のエッチング溝となり、この溝と
垂直方向では、結晶軸が<0 1 1>方向であるの
で、各発光部分を分離するためにその間にエッチングさ
れる溝は、図5に示すように逆メサ型のエッチング溝と
なる。そして、全体にSiO2 、SiN等の保護膜5を
設けて、発光面上の電極コンタクト部分にスルーホール
6を設けた後、Al等のオーミック電極7を順メサ型の
エッチング溝上を這うように(アレイ方向とは垂直方向
に)して引き出している。さらに、SiO2 、SiN等
の保護膜8を表面全体に付けてから、n型GaAs基板
1の裏面側を研磨して、n型電極9を取り付ける。な
お、電極7を順メサ型のエッチング溝上に配線するの
は、逆メサ型のエッチング溝上に金属を蒸着すると断切
れを生じる恐れがあるからである。
Generally, the III-V compound semiconductor crystal has a strong anisotropy in the etching direction, and when the (1 0 0) plane is mesa-etched to form a groove in the <0 1 1> direction, the groove is formed. The ridge angle on the side surface of the groove is an acute angle (reverse mesa), and when the mesa etching is performed to form a groove in the <0 -11> direction, the ridge angle on the side surface of the groove is an obtuse angle (forward mesa).
Becomes Therefore, in this example, since the crystal axis in the column direction (array direction) in which the light emitting portions are arranged is the <0 -11> direction, the groove etched in the direction parallel to this column is shown in FIG.
As shown in FIG. 5, the etching groove is a forward mesa type, and in the direction perpendicular to this groove, the crystal axis is in the <0 1 1> direction. Therefore, the groove etched between them in order to separate each light emitting portion is shown in FIG. As shown in FIG. 4, the etching groove is an inverted mesa type. Then, a protective film 5 of SiO 2 , SiN or the like is provided over the entire surface, a through hole 6 is provided in an electrode contact portion on the light emitting surface, and then an ohmic electrode 7 of Al or the like is laid on the forward mesa type etching groove. (Perpendicular to the array direction). Further, after a protective film 8 of SiO 2 , SiN or the like is attached to the entire surface, the back surface side of the n-type GaAs substrate 1 is polished and an n-type electrode 9 is attached. The electrode 7 is provided on the forward mesa type etching groove because the metal may be vapor-deposited on the reverse mesa type etching groove to cause breakage.

【0006】[0006]

【発明が解決しようとする課題】従来の発光ダイオード
アレイは、各発光部分を分離する溝が、図5に示すよう
な逆メサ形状のエッチング溝であるので、エッチング溝
を深くするほど各発光部分のpn接合面での電流通過面
積が小さくなって抵抗が大きくなり、その結果発光出力
が低下する。特に、10μm程度の狭ピッチで発光部分
が形成された発光ダイオードアレイでは、1ドットあた
り数mAの電流を流しただけで異常な高電流密度とな
り、この結果生じる発熱により、数百時間の寿命しか得
られなかった。そこで本発明は、pn接合面での電流通
過面積を大きくして、各発光部分の抵抗を小さくした半
導体発光装置及びその製造方法を提供することにより、
狭ピッチで発光部分が形成された発光ダイオードアレイ
を長寿命化・高出力化させることを目的とする。
In the conventional light emitting diode array, since the groove for separating each light emitting portion is an inverted mesa-shaped etching groove as shown in FIG. 5, each light emitting portion is deepened as the etching groove is deepened. The current passing area at the pn junction surface becomes smaller and the resistance becomes larger, resulting in a decrease in light emission output. Particularly, in a light emitting diode array in which light emitting portions are formed with a narrow pitch of about 10 μm, an abnormally high current density is obtained by simply passing a current of several mA per dot, and the resulting heat generation results in a lifetime of several hundred hours. I couldn't get it. Therefore, the present invention provides a semiconductor light emitting device in which the current passing area at the pn junction surface is increased and the resistance of each light emitting portion is decreased, and a manufacturing method thereof.
It is an object of the present invention to extend the life and increase the output of a light emitting diode array in which light emitting portions are formed with a narrow pitch.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
の手段として、基板上にpn接合を有する化合物半導体
からなる複数の発光部分が列状に形成されている半導体
発光装置において、前記複数の発光部分が並ぶアレイ方
向と平行方向に形成された溝は順メサ形状に形成され、
隣合う前記各発光部分を分離する溝は前記各発光部分の
発光面から前記pn接合面までは順メサ形状で前記pn
接合面よりも深い部分は逆メサ形状に形成されているこ
とを特徴とする半導体発光装置、及び、基板上にpn接
合を有する化合物半導体からなる複数の発光部分を列状
に形成する半導体発光装置の製造方法であって、基板上
にpn接合を有する化合物半導体を形成する工程と、リ
ン酸過水またはその水溶液にてエッチングを行って、前
記複数の発光部分が並ぶアレイ方向と平行方向に順メサ
形状の溝を形成するとともに隣合う前記アレイ方向と垂
直方向に前記各発光部分の発光面から前記pn接合面ま
では順メサ形状で前記pn接合面よりも深い部分は逆メ
サ形状の溝を形成して前記各発光部分を分離する工程
と、前記各発光部分にそれぞれ電極を設ける工程とより
なることを特徴とする半導体発光装置の製造方法を提供
しようとするものである。
As means for achieving the above object, in a semiconductor light emitting device in which a plurality of light emitting portions made of a compound semiconductor having a pn junction are formed in rows on a substrate. The grooves formed in the direction parallel to the array direction in which the light emitting portions are arranged are formed in a regular mesa shape,
The groove separating the adjacent light emitting portions has a forward mesa shape from the light emitting surface of each light emitting portion to the pn junction surface.
A semiconductor light emitting device characterized in that a portion deeper than the junction surface is formed in an inverted mesa shape, and a semiconductor light emitting device in which a plurality of light emitting portions made of a compound semiconductor having a pn junction are formed in rows on a substrate. And a step of forming a compound semiconductor having a pn junction on a substrate, and performing etching with phosphoric acid / hydrogen peroxide or an aqueous solution thereof to perform a step in a direction parallel to an array direction in which the plurality of light emitting portions are arranged. A mesa-shaped groove is formed, and a mesa-shaped groove is formed from the light-emitting surface of each light-emitting portion to the pn junction surface in a direction perpendicular to the adjacent array direction, and an inverted mesa-shaped groove is formed in a portion deeper than the pn junction surface. An object of the present invention is to provide a method for manufacturing a semiconductor light emitting device, which comprises the steps of forming and separating each of the light emitting portions, and providing each of the light emitting portions with an electrode. That.

【0008】[0008]

【作用】発光ダイオードアレイの発光部分の並ぶアレイ
方向と平行方向にエッチングされる溝が順メサ型のエッ
チング溝のままで、各発光部分を分離する溝がpn接合
面を広くする形状であれば、上記した課題は解決する。
Znを拡散したn型GaAsP半導体を、リン酸と過酸
化水素水を混合したリン酸過水またはその水溶液でエッ
チングすると、<0 −1 1>方向にエッチングされ
る溝は順メサ型のエッチング溝となり、<0 1 1>
方向にエッチングされる溝はZnを拡散したp型部分で
は順メサ形状となり、n型部分では逆メサ形状のエッチ
ング溝となることが判った。したがって、各発光部分を
分離する溝が<0 1 1>方向と平行になるようにし
て上記した方法によりエッチングすれば、各発光部分を
分離する溝は、発光面からpn接合面までが順メサ形状
で、それより深い部分が逆メサ形状となってpn接合面
が広くなる。
If the groove that is etched in the direction parallel to the array direction of the light emitting portions of the light emitting diode array is a forward mesa type etching groove and the groove that separates each light emitting portion has a wide pn junction surface. The above-mentioned problems are solved.
When an n-type GaAsP semiconductor in which Zn is diffused is etched with phosphoric acid / hydrogen peroxide mixture of phosphoric acid and hydrogen peroxide solution or an aqueous solution thereof, the groove etched in the <0 -11> direction is a forward mesa type etching groove. And <0 1 1>
It was found that the groove etched in the direction has a forward mesa shape in the p-type portion into which Zn is diffused and has an inverted mesa shape in the n-type portion. Therefore, if the grooves separating the light emitting portions are parallel to the <0 1 1> direction and etched by the above-described method, the grooves separating the light emitting portions from the light emitting surface to the pn junction surface are forward mesa. In the shape, the deeper portion becomes an inverted mesa shape and the pn junction surface becomes wider.

【0009】[0009]

【実施例】本発明の半導体発光装置及びその製造方法を
図面と共に説明する。図1は、本発明の半導体発光装置
の一実施例である発光ダイオードアレイを示す斜視図で
あり、図2はそのA−A断面を示す一部拡大図、図3は
そのB−B断面を示す一部拡大図である。まず、この発
光ダイオードアレイの製造方法を図面を参照しながら以
下に説明する。(1 0 0)n型GaAs基板11上
に、n型GaAsP層12をVPE(気相成長法)にて
80μm成長させる。次に、封管法にてZnを拡散し、
表面から2μmの深さまでp型GaAsP層(拡散層)
13を形成する。そして、発光部分の並ぶ列方向(アレ
イ方向)が<0 −1 1>方向の結晶軸と平行になる
ように、そのアレイ方向と各発光部分を分離するための
アレイ方向と垂直な方向に溝を形成するためのフォトレ
ジストをパターニングしてこれをマスクとし、n型Ga
AsP層12とp型GaAsP層13との境界面である
pn接合面14よりも深い溝を形成するために、表面か
ら3μmの深さまでリン酸過水を用いてエッチングする
と、アレイ方向と平行に形成される<0 −1 1>方
向の溝は図3に示すように順メサ形状となり、各発光部
分間の<0 1 1>方向の溝は図2に示すように発光
面からpn接合面14までが順メサ形状で、それより深
い部分が逆メサ形状となってpn接合面14が広くな
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor light emitting device and a method of manufacturing the same according to the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing a light emitting diode array which is an embodiment of a semiconductor light emitting device of the present invention, FIG. 2 is a partially enlarged view showing an AA cross section thereof, and FIG. 3 is a BB cross section thereof. It is a partially enlarged view shown. First, a method of manufacturing the light emitting diode array will be described below with reference to the drawings. On the (100) n-type GaAs substrate 11, the n-type GaAsP layer 12 is grown to 80 μm by VPE (vapor phase epitaxy). Next, Zn is diffused by the sealed tube method,
P-type GaAsP layer (diffusion layer) from the surface to a depth of 2 μm
13 is formed. Then, a groove is formed in a direction perpendicular to the array direction and the array direction for separating each light emitting part so that the column direction (array direction) in which the light emitting parts are arranged is parallel to the crystal axis in the <0 −1 1> direction. Patterning the photoresist for forming the n-type Ga
In order to form a groove deeper than the pn junction surface 14 which is a boundary surface between the AsP layer 12 and the p-type GaAsP layer 13, when etching is performed with phosphoric acid / hydrogen peroxide up to a depth of 3 μm from the surface, it becomes parallel to the array direction. Grooves formed in the <0 -1 1> direction have a forward mesa shape as shown in FIG. 3, and grooves formed in the <0 1 1> direction between the respective light emitting portions are formed from the light emitting surface to the pn junction surface as shown in FIG. Up to 14 is a normal mesa shape, and a deeper portion is an inverted mesa shape, and the pn junction surface 14 is widened.

【0010】その後、フォトレジストを除去してからプ
ラズマCVDにてSiNの保護膜15を1000A(オング
ストローム)の厚さに付けて各発光部分の発光面にスル
ーホール16をプラズマエッチングにより形成し、さら
に蒸着法によりAl17を8000Aの厚さに付ける。さら
に、このAl17上に電極配線のパターンをフォトレジ
ストでパターニングし、これをマスクとして塩素系ガス
でAl17をプラズマエッチングしてからフォトレジス
トを除去することにより、アレイ方向と平行に設けられ
た順メサ形状の溝を通って引き出されるp型電極を形成
する。その後、表面全体にSiNの保護膜18を付け
る。最後に、n型GaAs基板11の裏面を研磨してか
らAuGeNi合金19を5000A蒸着、熱処理してn型
電極を形成することにより、図1に示すような発光ダイ
オードアレイを製造することができる。
Then, after removing the photoresist, a protective film 15 of SiN is formed by plasma CVD to a thickness of 1000 A (angstrom), and through holes 16 are formed in the light emitting surface of each light emitting portion by plasma etching. Al17 is applied to a thickness of 8000 A by a vapor deposition method. Further, the pattern of the electrode wiring is patterned on the Al 17 with a photoresist, and the Al 17 is plasma-etched with a chlorine-based gas using this as a mask, and then the photoresist is removed to form a forward mesa formed in parallel with the array direction. A p-type electrode is formed that is drawn through the shaped groove. After that, a SiN protective film 18 is applied to the entire surface. Finally, the back surface of the n-type GaAs substrate 11 is polished, and then AuGeNi alloy 19 is vapor-deposited at 5000 A and heat-treated to form an n-type electrode, whereby a light emitting diode array as shown in FIG. 1 can be manufactured.

【0011】そして、このような構造の発光ダイオード
アレイは、各発光部分のpn接合面14での電流通過面
積が大きいので、ここでの抵抗が低くなり発光出力を向
上させることができる。また、pn接合面14での抵抗
が低ので、狭ピッチで発光部分を形成しても発熱が大き
くならず、長寿命化させることができる。さらに、各発
光部分のpn接合面14よりも下の部分が逆メサ形状と
なっているので、pn接合面14から下側に発光する光
もこの面で反射して発光面から取り出すことができる。
そして、これらの結果、実用に絶え得るより狭ピッチの
発光ダイオードアレイを製造することが可能となる。な
お、上記各実施例で使用したGaAsP以外の化合物半
導体材料による半導体発光装置においても応用可能であ
る。
Since the light emitting diode array having such a structure has a large current passing area at the pn junction surface 14 of each light emitting portion, the resistance here becomes low and the light emitting output can be improved. Further, since the resistance at the pn junction surface 14 is low, even if the light emitting portions are formed with a narrow pitch, the heat generation does not increase, and the life can be extended. Further, since the portion of each light emitting portion below the pn junction surface 14 has an inverted mesa shape, light emitted downward from the pn junction surface 14 can also be reflected from this surface and extracted from the light emitting surface. .
As a result, it becomes possible to manufacture a light-emitting diode array having a narrower pitch that can be practically used. The present invention is also applicable to a semiconductor light emitting device made of a compound semiconductor material other than GaAsP used in the above embodiments.

【0012】[0012]

【発明の効果】本発明の半導体発光装置は、複数の発光
部分が並ぶアレイ方向と平行方向に形成された溝は順メ
サ形状に形成され、隣合う各発光部分を分離する溝は各
発光部分の発光面からpn接合面までは順メサ形状でp
n接合面よりも深い部分は逆メサ形状に形成されている
ので、各発光部分のpn接合面での電流通過面積を大き
くすることができ、抵抗の増加による発光出力の低下を
防ぐことができる。また、pn接合面での抵抗を低く押
さえられる結果、狭ピッチで発光部分を形成しても発熱
が大きくならないので、長寿命化・高出力化させること
ができる。そして、本発明の半導体発光装置の製造方法
により、上記したような効果の得られる半導体発光装置
を簡単に製造することができ、より狭ピッチの発光ダイ
オードアレイを製造することができるという効果があ
る。
According to the semiconductor light emitting device of the present invention, the groove formed in the direction parallel to the array direction in which a plurality of light emitting portions are arranged is formed in a forward mesa shape, and the groove for separating adjacent light emitting portions is each light emitting portion. From the light emitting surface to the pn junction surface in a normal mesa shape
Since the portion deeper than the n-junction surface is formed in an inverted mesa shape, it is possible to increase the current passing area at the pn-junction surface of each light emitting portion and prevent a decrease in light emission output due to an increase in resistance. . In addition, as a result of suppressing the resistance at the pn junction surface to be low, heat generation does not increase even when the light emitting portions are formed with a narrow pitch, so that the life and output can be extended. The semiconductor light-emitting device manufacturing method of the present invention can easily manufacture a semiconductor light-emitting device having the above-described effects and can manufacture a light-emitting diode array having a narrower pitch. .

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体発光装置の一実施例を示す斜視
図である。
FIG. 1 is a perspective view showing an embodiment of a semiconductor light emitting device of the present invention.

【図2】図1に示す本発明の一実施例のA−A断面を示
す一部拡大図である。
2 is a partially enlarged view showing an AA cross section of the embodiment of the present invention shown in FIG.

【図3】図1に示す本発明の一実施例のB−B断面を示
す一部拡大図である。
3 is a partially enlarged view showing a B-B cross section of the embodiment of the present invention shown in FIG. 1. FIG.

【図4】従来の半導体発光装置の例を示す斜視図であ
る。
FIG. 4 is a perspective view showing an example of a conventional semiconductor light emitting device.

【図5】図4に示す従来例のA−A断面を示す一部拡大
図である。
5 is a partially enlarged view showing an AA cross section of the conventional example shown in FIG.

【図6】図4に示す従来例のB−B断面を示す一部拡大
図である。
FIG. 6 is a partially enlarged view showing a BB cross section of the conventional example shown in FIG.

【符号の説明】[Explanation of symbols]

1,11 n型GaAs基板 2,12 n型GaAsP層 3,13 p型GaAsP層(拡散層) 4,14 pn接合面 5,8,15,18 保護膜 6,16 スルーホール 7,9,17,19 電極 1,11 n-type GaAs substrate 2,12 n-type GaAsP layer 3,13 p-type GaAsP layer (diffusion layer) 4,14 pn junction surface 5,8,15,18 protective film 6,16 through-hole 7,9,17 , 19 electrodes

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】基板上にpn接合を有する化合物半導体か
らなる複数の発光部分が列状に形成されている半導体発
光装置において、 前記複数の発光部分が並ぶアレイ方向と平行方向に形成
された溝は順メサ形状に形成され、 隣合う前記各発光部分を分離する溝は前記各発光部分の
発光面から前記pn接合面までは順メサ形状で前記pn
接合面よりも深い部分は逆メサ形状に形成されているこ
とを特徴とする半導体発光装置。
1. A semiconductor light emitting device in which a plurality of light emitting portions made of a compound semiconductor having a pn junction are formed in a row on a substrate, and a groove formed in a direction parallel to an array direction in which the plurality of light emitting portions are arranged. Is formed in a normal mesa shape, and the groove separating the adjacent light emitting portions is a normal mesa shape from the light emitting surface of each light emitting portion to the pn junction surface.
A semiconductor light emitting device characterized in that a portion deeper than the bonding surface is formed in an inverted mesa shape.
【請求項2】基板上にpn接合を有する化合物半導体か
らなる複数の発光部分を列状に形成する半導体発光装置
の製造方法であって、 基板上にpn接合を有する化合物半導体を形成する工程
と、 リン酸過水またはその水溶液にてエッチングを行って、
前記複数の発光部分が並ぶアレイ方向と平行方向に順メ
サ形状の溝を形成するとともに隣合う前記アレイ方向と
垂直方向に前記各発光部分の発光面から前記pn接合面
までは順メサ形状で前記pn接合面よりも深い部分は逆
メサ形状の溝を形成して前記各発光部分を分離する工程
と、 前記各発光部分にそれぞれ電極を設ける工程とよりなる
ことを特徴とする半導体発光装置の製造方法。
2. A method for manufacturing a semiconductor light emitting device, comprising: forming a plurality of light emitting portions made of a compound semiconductor having a pn junction on a substrate in a row; and forming a compound semiconductor having a pn junction on a substrate. , Etching with phosphoric acid / hydrogen peroxide or its aqueous solution,
A groove having a forward mesa shape is formed in a direction parallel to the array direction in which the plurality of light emitting portions are arranged, and a normal mesa shape is formed from a light emitting surface of each light emitting portion to the pn junction surface in a direction perpendicular to the adjacent array direction. A semiconductor light emitting device characterized by comprising a step of forming an inverted mesa-shaped groove in a portion deeper than the pn junction surface to separate each light emitting portion, and a step of providing an electrode in each light emitting portion. Method.
JP34162692A 1992-08-27 1992-11-27 Emiconductor light-emitting device and manufacture thereof Pending JPH06169104A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP34162692A JPH06169104A (en) 1992-11-27 1992-11-27 Emiconductor light-emitting device and manufacture thereof
US08/112,669 US5406095A (en) 1992-08-27 1993-08-26 Light emitting diode array and production method of the light emitting diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34162692A JPH06169104A (en) 1992-11-27 1992-11-27 Emiconductor light-emitting device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH06169104A true JPH06169104A (en) 1994-06-14

Family

ID=18347549

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34162692A Pending JPH06169104A (en) 1992-08-27 1992-11-27 Emiconductor light-emitting device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH06169104A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6236065B1 (en) 1994-08-25 2001-05-22 Sharp Kabushiki Kaisha Light-emitting diode array and method for fabricating the same
EP1141990A1 (en) * 1998-10-21 2001-10-10 Sarnoff Corporation Apparatus for performing wavelength-conversion using phosphors with light emitting diodes
CN101863452A (en) * 2010-06-10 2010-10-20 中国科学院苏州纳米技术与纳米仿生研究所 Production method of part for improving nanometer array structure on insulating substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6236065B1 (en) 1994-08-25 2001-05-22 Sharp Kabushiki Kaisha Light-emitting diode array and method for fabricating the same
EP1141990A1 (en) * 1998-10-21 2001-10-10 Sarnoff Corporation Apparatus for performing wavelength-conversion using phosphors with light emitting diodes
EP1141990A4 (en) * 1998-10-21 2005-02-09 Sarnoff Corp Apparatus for performing wavelength-conversion using phosphors with light emitting diodes
CN101863452A (en) * 2010-06-10 2010-10-20 中国科学院苏州纳米技术与纳米仿生研究所 Production method of part for improving nanometer array structure on insulating substrate

Similar Documents

Publication Publication Date Title
US6222208B1 (en) Light-emitting diode and light-emitting diode array
JPH07176788A (en) Light emitting diode
US6881978B2 (en) Semiconductor epitaxial structure and semiconductor light-emitting device
JPH06169104A (en) Emiconductor light-emitting device and manufacture thereof
US4989050A (en) Self aligned, substrate emitting LED
JP3652134B2 (en) Light emitting element array
JP3311946B2 (en) Light emitting diode array
KR910006707B1 (en) Light emitted diode and its method of manufacturing
JPH06196752A (en) Semiconductor light emitting device
JP3662832B2 (en) Light emitting device and manufacturing method thereof
JPH07254731A (en) Light emitting element
JPH0682862B2 (en) Light emitting diode
JP3638413B2 (en) Semiconductor light emitting device and manufacturing method thereof
JPH05110135A (en) Multilayer epitaxial crystalline structure
JPH03190287A (en) Light-emitting diode array
JPH0685315A (en) Semiconductor light emitting device and manufacture thereof
JP3426834B2 (en) Method for manufacturing light emitting diode array
JP3261032B2 (en) Light emitting diode array
JP3219463B2 (en) Light emitting diode array
JPH0363830B2 (en)
JP2001135853A (en) Light-emitting element and manufacturing method for it
JPH06177422A (en) Semiconductor light emitting device and its manufacture
JP3998414B2 (en) Semiconductor light emitting device
JP2005223100A (en) Light-emitting diode and manufacturing method therefor
JP3420417B2 (en) Light emitting diode array