JPS63285004A - Power amplifier circuit - Google Patents

Abstract

PURPOSE:To widen the dynamic range of an output even in the use with a low voltage power supply by outputting a collector-emitter voltage through a current mirror circuit. CONSTITUTION:A differential amplifier comprising transistors (TRs) Q1, Q2 is an input amplifier circuit of a power amplifier circuit using a base of the TR Q1 as its input terminal and a base of the TR Q2 as a feedback terminal. The circuit of the current mirror constitution comprising TRs Q3, Q4 is an active load of an input amplifier circuit, resistors R1, R2 decide the DC operating point of the input amplifier circuit and decides the DC operating point of the output stage comprising TRs Q17, Q16 via a resistor R3 being a feedback resistor. Moreover, the resistor R4 decides the AC voltage gain by the ratio of the resistor R3. The TRs Q5, Q8 and Q9 and TRs to extract the output of the input amplifier circuit as the current output and the current output is sent to the output stage by the current mirror.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to power amplifier circuits, and in particular to power tanks used in low voltage power supplies.

[Conventional technology]

FIG. 2 shows a typical conventional power amplifier circuit.

This circuit consists of a differential amplifier made up of transistors Q1 and Q2 as an input amplifier circuit, a transistor Q20 as a driver stage, and transistors Q23 and Q24 as an output stage.

The output stage bias circuit consists of transistors Q21 and Q22 used as diodes. As the load rL of the te input amplifier circuit, an active load is used as a resistor. Furthermore, the resistors R1 and R2 are used to determine the DC operating point of the input amplifier circuit, and the feedback resistor R3 is used to determine the DC operating point of the output stage. Furthermore, the resistor R4 is used to determine the voltage gain of current transformation depending on the ratio with the resistor R3. To explain the operation in FIG. 2, the signal input to the input terminal l is amplified by the input amplifier circuit, and is output from the input amplifier circuit as a single-ended output. given on the basis of. The current is then output as a current output from transistors Q23 and Q24 forming an output stage via transistor Q20.

[Problem that the invention seeks to solve]

However, the conventional power amplifier circuit described above has the following drawbacks. That is, the dynamic range of the output of this power amplifier circuit is shown in the following equations (1) and (2).

Here, V is the voltage value of constant current source 1 that determines the idle link current of the output stage, and the dynamic range of the output when the signal is positive: (1) Signal Dynamic range of output when is negative: Therefore, as an example of operating this power amplifier -W& with a low voltage power supply, Vcc = 3V, R11:R12゜v in equation (1).
: Substitute the values of 0.7V, V -0,2V BgQ23 01Q! 6- And ■. □+=0.6V. In this case, the ideal value of the output dynamic range is 1.5■ from the following equation (3).

Ideal value of output dynamic range: ■ oM = These values? : Equation (4
), it becomes 40% due to the low voltage power supply (4) It has the disadvantages of poor utilization, limited capacity, and narrow dynamic range.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a power M-width circuit that has a wide output dynamic range even when used with a low voltage power supply.

[Problem t-Elaborate means to solve it]

The power amplifier circuit of the present invention has a first
and a second transistor, a constant 1 connected in common and connected to the emitters of the first and second transistors as a light source, and a constant 1 connected as an active load to the respective collectors of the first and second transistors. , third and fourth transistors forming a current mirror circuit, and a fifth transistor for taking out the output from the input amplifier circuit as a current output.
゜' JJIJ8 and the ninth transistor, and the sixth and seventh transistors, the tenth transistor, which transmit the current output to the output stage constituted by the sixteenth and seventeenth transistors, and each constitute a current mirror circuit NI.
and an 11th transistor, a 12th and 17th transistor, a 13th and 14th transistor, a 15th and 16th transistor, and an output current from the commonly connected collectors of the 16th and 17th transistors. and an output stage to obtain the output.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

In FIG. 1, a differential amplifier consisting of transistors Ql and Q2 is an input layer width circuit of a power amplifier circuit in which the base terminal of transistor Q1 is an input terminal and the base terminal of transistor Q2 is a return terminal. The current mirror configuration circuit formed by transistors Q3 and Q4 is the active load of the input amplifier circuit, and the resistors kLl and 几2 determine the DC operating point of the input amplifier circuit, and the resistor kLl and 几2 determine the DC operating point of the input amplifier circuit. 1liit! of the output stage consisting of transistors Q17 and Q16! is used to determine the operating point t''.

The resistor R4 is used to determine the voltage gain of current transformation depending on the ratio with the resistor R3. Also, transistor Q
s e Q s and Q9 are transistors for taking out the output t- of the input layer width circuit as an output, and this current output is transferred to transistors Q6 and Q7, transistors QiO and Qll, and transistors Q12 and Q17.
, is transmitted to an output stage consisting of transistors q162 and Q17 by a current mirror circuit consisting of transistors Q13 and Q14 and transistors Q15 and Q16.

Next, the operation shown in FIG. 1 will be explained. In order to simplify the explanation of the operation, it is assumed that all the transistors in FIG. 1 have the same emitter noise. The first flaw is that when there is no signal, the transistors Q12 and Q2 that make up the input amplifier circuit have -
A current equal to 1.2 flows, and a current equal to 1.0 cm also flows through transistors Q3 and Q4 forming the active load tm, respectively.

Next, a uniform current flows through the transistor Q5 which has a current mirror configuration with the transistor Q4, this current flows into the transistor Q6, and also flows into the transistor Q7 which has a current mirror configuration with the transistor Q6.
・Flow a current ft. The current of this transistor Q7 is pulled from the transistor Q8 and the transistor Q13 whose base and collector terminals are short-circuited, respectively. ←A current also flows through the transistor Q9 whose base is connected to the transistor Q8. Then, a current R of 7Ie is applied to the transistor Q14 which forms a current mirror configuration with the transistor Q13, and the current flowing through the transistor Q9 flows into the transistor QIO, which connects the transistors QIO and Qll and the transistors Q12 and QIT which form the current mirror. 7 to the collector of transistor Q17 through
A current of I flows through.

7t, ) 1 which flows to transistor Q14. The current flows into the transistor Q15 and the current flows into the transistor Q15.
The collector of the transistor Q16, which has a current mirror configuration, also has a current tg of 7d. ) When there is no signal, the output stage consisting of transistors Q16 and Q17 has 7I・6
1! The current flows, and this serves as an idle link current that suppresses the west over distortion.

Next, when a signal is input to the input terminal 1, this input signal is amplified by the input amplifier circuit, and the output is taken out as a 1i output from the transistors Qs a Qs and Q9, and the current mirror configuration is taken out from the transistor Q6.
Workmanship Q7, transistor QIO and Q11 m
Transistors Q13 and Q14, transistor Q1
2 and Q17% and transistors Q15 and Q
Output stage transistors Q17 and Q16 through 16e
is driven, and a current output is obtained from the output terminal 3.

FIG. 3 is a circuit diagram of another embodiment of the invention.

In this example of Nrld in FIG.
Resistors it5 and R6 are gold connected to the emitters of the resistors it and R6, respectively. The operation of the circuit in FIG. 3 is basically the same as that in FIG. 1, but it has the advantage of improving the current amplification ability of transistors Q12 and Q17 and transistors Qz5 and Q16, which have a current mirror configuration. ing.

〔Effect of the invention〕

As explained above, according to the circuit configuration of the present invention, the only parameter that adversely affects the output dynamic range is the collector-emitter open voltage of transistors Q17 and Q16, and the output dynamic range is determined by the following equations: 6).

Dynamic range of the output when the signal is positive: Dynamic range of the output when the signal is negative: Therefore, the power amplification circuit i6 of the present invention is used with a low voltage power supply, and as an example, formula (5) is obtained. Vcc=3V, f41=R2゜■0IQ17=
By substituting 0.2VO1it-, vom+=L3v. The ideal value of the output dynamic range in this case is
The voltage utilization rate for the 11E source voltage is 86.7% as shown in equation (3), which is 86.7% compared to the conventional example. It has more than doubled under the conditions. It has the effect of widening the range of 1 dynamic pv 2.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a conventional power amplifier circuit diagram, and FIG. 3 is a circuit diagram of another embodiment of the present invention. 1...Input terminal, 2...Feedback terminal, 3
...Output terminal, Ql, Q2, Q3, Q4
, Q5 , Q6 , Q7 , Q8 . Q9. Q10. Qll, Q12. Q13. Q14. Q1
5゜Q16. Q17. Q20. Q21. Q22. Q23
．． Q24...Transistor, 1.几2. R3
, 几4. R5゜B6...Resistance, CI...
・Capacitor, IO *Engineer 1... Constant current source. Agent: Susumu Uchihara, patent attorney,・′−・′・・・
, 4) Multiply 2 times

Claims (1)

[Claims] first and second transistors constituting an input amplifier circuit, a constant current source connected to the commonly connected emitters of the first and second transistors, and each of the first and second transistors. third and fourth transistors that are connected to the collector as active loads and constitute a current mirror circuit; fifth, eighth, and ninth transistors that take out the output from the input amplifier circuit as a current output; and the current output are transmitted to an output stage constituted by a 16th and 17th transistor, and each constitutes a current mirror circuit: a 6th and 7th transistor, a 10th and 11th transistor, a 12th and 17th transistor, A power amplifier circuit characterized by having a thirteenth and fourteenth transistor, a fifteenth and sixteenth transistor, and an output stage that obtains an output current from commonly connected collectors of the sixteenth and seventeenth transistors. .