JPS63284837A - Cooling structure of semiconductor element - Google Patents
Cooling structure of semiconductor elementInfo
- Publication number
- JPS63284837A JPS63284837A JP11881187A JP11881187A JPS63284837A JP S63284837 A JPS63284837 A JP S63284837A JP 11881187 A JP11881187 A JP 11881187A JP 11881187 A JP11881187 A JP 11881187A JP S63284837 A JPS63284837 A JP S63284837A
- Authority
- JP
- Japan
- Prior art keywords
- package
- coolant
- boiling point
- sealed
- cap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001816 cooling Methods 0.000 title claims abstract description 13
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 238000009835 boiling Methods 0.000 claims abstract description 18
- 239000000463 material Substances 0.000 claims abstract description 13
- 238000005219 brazing Methods 0.000 claims abstract description 12
- 239000003507 refrigerant Substances 0.000 claims description 26
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 7
- 229910052731 fluorine Inorganic materials 0.000 claims description 7
- 239000011737 fluorine Substances 0.000 claims description 7
- 239000000155 melt Substances 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 230000008018 melting Effects 0.000 claims 1
- 238000007789 sealing Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 4
- 239000002826 coolant Substances 0.000 abstract 7
- 125000001153 fluoro group Chemical group F* 0.000 abstract 3
- 238000001704 evaporation Methods 0.000 abstract 1
- 230000008020 evaporation Effects 0.000 abstract 1
- 230000020169 heat generation Effects 0.000 abstract 1
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009429 electrical wiring Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000009834 vaporization Methods 0.000 description 2
- 230000008016 vaporization Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、パッケージとキャップを気密に結合してなる
構造体内に収納された半導体素子の冷却構造に関するも
のでおる。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a cooling structure for a semiconductor element housed in a structure formed by airtightly coupling a package and a cap.
従来、多数の集積回路素子を実装するマルチチップ・七
ジ纂−ルの冷却構造に関しては、例えば特開昭61−1
31553号公報に記載のものが提案されている。該提
案では、集積回路素子を冷却するために1沸点が50−
60℃の冷媒が使用されている。Conventionally, regarding the cooling structure of a multi-chip/seven-chip assembly that mounts a large number of integrated circuit elements, for example, Japanese Patent Laid-Open No. 61-1
The method described in Japanese Patent No. 31553 has been proposed. The proposal proposes that one boiling point of 50-
A 60°C refrigerant is used.
上記従来例では、沸点が50−60℃の冷媒を使用する
ので、該冷1ilfCを容器に封入する工程及び該容器
を密閉する工程の二つの工程が必要である。このため製
造工程が複雑化するばかりでなく、多大の時間と労力を
要して能率の低下を招くという問題が6つ友。In the conventional example described above, since a refrigerant with a boiling point of 50 to 60° C. is used, two steps are required: a step of sealing the cold 1ilfC in a container and a step of sealing the container. This not only complicates the manufacturing process, but also requires a great deal of time and effort, leading to a decrease in efficiency.
本発明は、容器内への冷媒の封入と容器の密封を同時に
行い、該冷媒により有効な冷却を実現することができる
半導体素子の冷却構造を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a cooling structure for a semiconductor device that can simultaneously seal a refrigerant in a container and seal the container, and achieve effective cooling using the refrigerant.
上記問題点は、102〜253℃の比較的に高沸点を有
するフッ素系冷媒を、減圧状態のもとて谷器内に封入す
ると同時に、前記沸点で溶融するろう材にエフ容器を密
封するととく工り解決される。The above problem is solved when a fluorine-based refrigerant having a relatively high boiling point of 102 to 253°C is sealed in the valley container under reduced pressure, and at the same time, the F container is sealed with a brazing material that melts at the boiling point. It will be solved by engineering.
沸点102〜253℃の冷媒を該沸点で容器に封入する
と、この封入された冷媒は、密封後に室温で、過冷却の
状態になるため、容器内の圧力が低下する。When a refrigerant with a boiling point of 102 to 253° C. is sealed in a container at the same boiling point, the sealed refrigerant becomes supercooled at room temperature after being sealed, so that the pressure inside the container decreases.
したがって、冷媒の沸点も低下するため、集積回路素子
の発熱により該冷媒は容易に気化するから、該気化熱に
よって有効な冷却が行われる。Therefore, since the boiling point of the refrigerant is also lowered, the refrigerant is easily vaporized by the heat generated by the integrated circuit element, and effective cooling is performed by the heat of vaporization.
以下、本発明の一実施例を図面について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図において、集積回路素子(半導体素子)1は、パ
ッケージ5の内室3A内に収納された配線IE極(図示
せず)にろう材2を介して接続されている。該パッケー
ジ3とキャップ5とは、ろう材6ft介して気密に結合
し一体に形成されている。In FIG. 1, an integrated circuit element (semiconductor element) 1 is connected to a wiring IE pole (not shown) housed in an inner chamber 3A of a package 5 via a brazing material 2. The package 3 and the cap 5 are integrally and airtightly connected through 6 feet of brazing material.
該キャップ5には、放熱器7が取付けられている。A heat radiator 7 is attached to the cap 5.
上記パッケージ5の内室3AKは、減圧状態において1
02〜256℃の比較的に高沸点のフッ素系冷媒4が封
入されている。前記内室3A内の冷媒4上の空間には、
冷媒蒸気8が充満きれている。The inner chamber 3AK of the package 5 is 1 in a reduced pressure state.
A fluorine-based refrigerant 4 having a relatively high boiling point of 02 to 256° C. is sealed. In the space above the refrigerant 4 in the inner chamber 3A,
It is full of refrigerant vapor 8.
又、前記ろう材6は、フッ素系冷媒4の沸点で溶融する
材質により構成されている。Further, the brazing filler metal 6 is made of a material that melts at the boiling point of the fluorine-based refrigerant 4.
前記半導体素子1に直接接触する冷媒4は、該素子1の
電気配線部にも接触するので、高絶縁性が要求式れる。Since the refrigerant 4 that comes into direct contact with the semiconductor element 1 also comes into contact with the electrical wiring of the element 1, high insulation is required.
ところで、前記沸点のフッ素系冷媒4は、体積抵抗が1
0 ohPom以上、絶縁耐力が25℃、 154r
r1m (ギャップ)で55KV以上であるから、該要
求を満足することができる。By the way, the fluorine-based refrigerant 4 having the boiling point has a volume resistance of 1
0 ohPom or more, dielectric strength is 25℃, 154r
Since r1m (gap) is 55 KV or more, this requirement can be satisfied.
又、半導体素子1の電気配線部には電気信号が流れるた
め、高周波域でも誘電率を小さくし、かつ伝播時間に影
響を及ぼさないことが要求される。Furthermore, since electrical signals flow through the electrical wiring section of the semiconductor element 1, it is required that the dielectric constant be small even in a high frequency range and that the propagation time should not be affected.
ところで、前記フッ素系冷媒は、25℃、I GH2で
も誘電率が2以下であるから、該要求を十分に満足する
ことができる。By the way, since the fluorine-based refrigerant has a dielectric constant of 2 or less even at 25° C. and IGH2, it can fully satisfy this requirement.
上述した偶成からなる本実施例では、半導体素子1で発
生した熱は、該素子1の周囲に接する7ツ索系冷謀4に
伝導される。この際、パッケージ5の内室5A内は減圧
されているため、前記冷媒4は容易に気化する。この気
化熱により、半導体素子1は冷却されると共に、気化し
た冷媒蒸気8は、キャップ5及び放熱器7で冷却されて
液化する。In the above-described embodiment, the heat generated in the semiconductor element 1 is conducted to the seven-wire cooling system 4 in contact with the periphery of the element 1. At this time, since the pressure inside the inner chamber 5A of the package 5 is reduced, the refrigerant 4 is easily vaporized. The semiconductor element 1 is cooled by this heat of vaporization, and the vaporized refrigerant vapor 8 is cooled and liquefied by the cap 5 and the radiator 7.
第2図はパッケージ3にキャップ5を気密に取付ける場
合の中間過程の状態を示す断面図である。FIG. 2 is a cross-sectional view showing an intermediate process when attaching the cap 5 to the package 3 in an airtight manner.
同図の符号で第1図と同一符号は同一部分を示すものと
する。The same reference numerals in the figure as in FIG. 1 indicate the same parts.
第2図において、半導体素子1はろう材2を介してパッ
ケージ3の配線部[(図示せず)に接続されており、か
つ該パッケージ3上には放熱器7を備えるキャップ5が
搭載されている。In FIG. 2, a semiconductor element 1 is connected to a wiring section [(not shown) of a package 3 via a brazing material 2, and a cap 5 equipped with a heat sink 7 is mounted on the package 3. There is.
上記のような状MMt−保って室温より沸とうしている
冷媒蒸気中に装入すると、パッケージ5、キャップ5及
び放熱器7などの熱容量により、パッケージ3内に封入
された冷媒蒸気8は凝縮し、冷媒4となってパッケージ
5内にたまる。この状態をさらに維持すると、ろう材6
が溶融するため、パッケージ5はキャップ5により気密
に封鎖式れる。そこで、パッケージ3及びキャップ5を
冷媒蒸気中から取出せば、第1図に示す本実施例に係わ
る構造体がえられる。When the refrigerant vapor 8 sealed in the package 3 is charged into the refrigerant vapor boiling from room temperature while maintaining the state MMt as described above, the refrigerant vapor 8 sealed in the package 3 is condensed due to the heat capacity of the package 5, cap 5, radiator 7, etc. Then, it becomes a refrigerant 4 and accumulates inside the package 5. If this state is maintained further, the brazing material 6
As a result, the package 5 is hermetically sealed by the cap 5. Therefore, by removing the package 3 and cap 5 from the refrigerant vapor, the structure according to this embodiment shown in FIG. 1 is obtained.
以上説明し良ように、本発明によれば、所定の比較的に
高沸点を有する7ツ累糸冷it−パッケージ内に封入す
ると同時に、該パッケージを気密に封鎖することにより
、製造工程の簡略化をはかると共に、有効なる冷却を能
率良く実現することができる。As explained above, according to the present invention, the manufacturing process can be simplified by enclosing it in a predetermined 7-layer cold package having a relatively high boiling point and at the same time sealing the package airtight. At the same time, effective cooling can be realized efficiently.
第11は本発明の半導体素子の冷却構造の一実施例を示
す断面図、第2図は本実施例におけるパッケージの気密
封鎖の中間過程の状態を示す断面図である。
符号の説明
1・・・・・・集積回路素子、2.6・・・・・・ろう
材、5・・・・・・パッケージ、4・・・・・・7ツ素
糸冷謀、5・・・・・・キャップ、11 is a cross-sectional view showing an embodiment of the cooling structure for a semiconductor element of the present invention, and FIG. 2 is a cross-sectional view showing an intermediate state of airtight sealing of the package in this embodiment. Explanation of symbols 1...Integrated circuit element, 2.6...Brazing material, 5...Package, 4...7-thread cold construction, 5 ······cap,
Claims (1)
パッケージに、ろう材を介してキャップを気密に取付け
てなる構造体において、該構造体の内部に減圧状態で所
定の比較的に高沸点を有するフッ素系冷媒を密封したこ
とを特徴とする半導体素子の冷却構造。 2、上記ろう材を上記フッ素系冷媒の沸点で溶融する材
質により構成し、該ろう材の溶融と該冷媒の封入を同時
に行うようにしたことを特徴とする特許請求の範囲第1
項記載の半導体素子の冷却構造。[Claims] 1. In a structure in which a cap is airtightly attached to a package containing a wiring board on which a large number of integrated circuit elements are mounted, a cap is airtightly attached via a brazing material. A cooling structure for a semiconductor device, characterized in that a fluorine-based refrigerant having a relatively high boiling point is sealed therein. 2. The brazing material is made of a material that melts at the boiling point of the fluorine-based refrigerant, and the melting of the brazing material and the encapsulation of the refrigerant are performed simultaneously.
A cooling structure for a semiconductor device as described in Section 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11881187A JPS63284837A (en) | 1987-05-18 | 1987-05-18 | Cooling structure of semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11881187A JPS63284837A (en) | 1987-05-18 | 1987-05-18 | Cooling structure of semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63284837A true JPS63284837A (en) | 1988-11-22 |
Family
ID=14745717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11881187A Pending JPS63284837A (en) | 1987-05-18 | 1987-05-18 | Cooling structure of semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63284837A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0644592A1 (en) * | 1993-09-13 | 1995-03-22 | Motorola, Inc. | Microelectronic device package containing a liquid and method |
JP2013243199A (en) * | 2012-05-18 | 2013-12-05 | Panasonic Corp | Cooling device and electric vehicle mounted with the same |
-
1987
- 1987-05-18 JP JP11881187A patent/JPS63284837A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0644592A1 (en) * | 1993-09-13 | 1995-03-22 | Motorola, Inc. | Microelectronic device package containing a liquid and method |
CN1034702C (en) * | 1993-09-13 | 1997-04-23 | 摩托罗拉公司 | Microelectronic device package containing a liquid and method |
EP0952610A2 (en) * | 1993-09-13 | 1999-10-27 | Motorola, Inc. | Microelectronic device package containing a liquid and method |
EP0952610A3 (en) * | 1993-09-13 | 2000-05-17 | Motorola, Inc. | Microelectronic device package containing a liquid and method |
JP2013243199A (en) * | 2012-05-18 | 2013-12-05 | Panasonic Corp | Cooling device and electric vehicle mounted with the same |
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