JPS63282785A - Display data return test system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] The display pattern data formed based on the test pattern data read out from the display frame memory is folded back and compared with the expected value of the display pattern data to display the display device. In a display data loop test method for testing the normality of a frame, a specific bit pattern with a simple bit configuration is used as a test pattern, and this specific bit pattern is repeatedly written on a frame memory. Thereby, a display data folding test can be performed without providing a special display data folding processing means constituted by hardware. Furthermore, even when configured using hardware, the configuration can be significantly simplified.

[Industrial application field]

The present invention provides display data for testing the normality of a display device by folding display pattern data formed based on test pattern data read from a display frame memory and comparing it with an expected value of the display pattern data. Regarding the return test method.

[Conventional technology]

In a display device equipped with a frame memory for display,
If there is a defect in the frame memory, normal display will not occur even if there are no abnormalities in other circuit parts.

Therefore, in a display device equipped with a frame memory,
In order to detect normality or abnormality of a display-related portion including a frame memory, a display data folding test method is used in which display pattern data is folded back and compared with an expected value of display pattern data prepared in advance.

FIG. 5 is a block diagram showing the configuration of a conventional display data folding test method.

In FIG. 5, a frame memory 21 stores image data for one display screen, that is, one frame.

Reference numeral 22 denotes display data creation means that creates display pattern data at a predetermined rate from the data read out from the frame memory 21.

23 is a lookup table (LUT; 1oo
The kuptable ) section includes an LUT in which color information of each pixel is stored using each pixel value of the frame memory 21 as an index, and adds color information to the display pattern data manually input by the display data creation means 22.

24 is a D/A converter which converts the digital color display pattern data inputted by the upper three members of the LUT section 2 into analog color display pattern data and displays the data on the display 25.
send to

Reference numeral 26 denotes a return processing means for detecting errors in return display pattern data. In the return processing means 26, 261A and 261B are return data storage units,
The return data storage section 261A includes display data creation means 2.
The display pattern data entered manually from 2 is stored, and the color display pattern data input from the top 3 of the LUT section 2 is stored in the return data storage section 261B.

Reference numeral 262 denotes an expected value storage section in which the expected value for the display thumb turn data output from the display data creation means 22 (or the LUT section 2) is calculated and stored in advance.

Reference numeral 263 denotes a comparison unit that stores the display pattern data of the return data storage unit 261A (or 261B) and the expected value storage unit 262.
Error detection is performed by comparing the expected value of .

264 is an error register in which an error signal output from the comparator 263 is set.

Reference numeral 27 denotes a display processing device, which includes an internal processor and memory (none of which are shown), and controls the operations of the above-mentioned parts and means as well as the operation of the entire system.

A common bus 28 transfers data and control signals between the display processing device 27 and each section and means.

Next, the operation shown in FIG. 5 will be explained by taking as an example the case where display pattern data outputted from the display data creation means 22 is used as folded display pattern data.

When testing a display device, a specific test pattern formed on one frame of the display screen is used.

Test pattern data is transferred from the display processing device 27 to the frame memory 21 via the common bus 28 and stored therein.

The display data creation means 22 converts the rate of the test pattern data read out from the frame memory 21 to create display pattern data, and stores the data in the LUT section 2 and also in the return data storage section 261A.

The LUT section 2 converts the input display pattern data into color display pattern data and sends it to the D/A-1'/bar 924. The D/A converter 24 converts the digital color display pattern data input into the LUT section 2 into analog display pattern data and sends it to the display 25 for display.

On the other hand, in the expected value storage section 262, the expected value for the display pattern data at the time of the test is calculated and stored in advance. The display processing device 27 controls the expected value storage section 262, retrieves the corresponding expected value from the expected value storage section 262 in synchronization with the display pattern data output from the return data storage section 261A, and manually inputs it to the comparison section 263. do.

The comparison section 263 is a manually generated return data section 261A.
The display pattern data and the expected value in the expected value storage section 262 are compared dot by dot, and if an error is detected, an error signal is output and set in the error register 264. The contents of the error register 264 are sent to the display processing means 27 via the common bus 28.

The display processing means 27 sequentially receives error information of the display pattern data from the error register 264, analyzes the error situation in one frame, and determines whether the display device is normal or abnormal.

The display data folding test can be performed in the same manner as in the above case by using the color display pattern data that is output from the top three of the LUT sections 2 and stored in the folded data storage section 161B.

In that case, the expected value storage unit 262 stores the expected value for the color display pattern data.

[Problem that the invention seeks to solve]

As mentioned above, the conventional display data wrapping test method
A folding processing means made up of hardware was specially provided to compare the folded display pattern data with the corresponding expected value.

This return processing means requires a large-capacity expected value storage section, and also requires a return data storage section for writing and reading, which has the disadvantage of increasing the amount of hardware and space, and increasing costs. . In particular, these problems have been a major obstacle in the implementation of small terminals such as so-called personal convenience computers, which require small size and low cost.

The present invention makes it possible to test the normality of a display device without requiring special hardware means such as a loopback processing means, or with a loopback processing means that is significantly simpler than conventional methods. The purpose of this invention is to provide an improved display data aliasing test method.

[Means for solving the problem] In the conventional display data loop test method, display pattern data is checked dot by dot, but display data is different from program data, and if a failure of about one dot occurs, the display pattern data is checked dot by dot. disorders are not consciously recognized by humans. Therefore, in the case of display pattern data, as long as it is possible to detect a fault that causes a large display disturbance that can be recognized on the display screen, it is practically sufficient as a display data aliasing test method.

In view of this, the present invention realizes a display data folding test method with a simple configuration by performing a rough check to a degree sufficient for practical use.

Hereinafter, the solution taken by the present invention will be explained with reference to a diagram illustrating the principle of the present invention shown in FIG.

In FIG. 1, a frame memory 11 stores image data corresponding to one frame of display screen.

12 is a display control means, and FRAY! A process is performed in which a specific bit pattern that can be repeatedly written into the memory 11 is used as a test pattern, and this specific bit pattern is sequentially written into a predetermined area on the frame memory 11.

The specific bit pattern is basically a folding unit of frame memory data (for example, a 4-bit unit if folding is performed in 4-bit parallel fashion).

Reference numeral 13 denotes display data creation means, which has a function of returning each display bit pattern data formed based on each specific bit pattern data read out from the frame memory 11 as test display pattern data.

Reference numeral 14 denotes an error detection means that compares each display bit pattern data input from the display data creation means 13 with an expected value of the display bit pattern data to detect the presence or absence of an error.

Reference numeral 15 denotes a look-up table (L, UT section), which includes an LUT in which color information of each pixel is stored using each pixel value of the frame memory 11 as an index, and which stores the color information of each pixel using each pixel value of the frame memory 11 as an index. Add color information.

The color display bit pattern data output from this LUT section 15 can also be used as folded display bit pattern data for testing.

[For production]

The operation of the present invention will be explained with reference to FIG. 2, taking as an example the case where the specific bit pattern is 4 bits OOO1'. FIG. 2 shows an example of a method for writing a specific bit pattern into a frame memory.

The display control means 12 displays a specific bit pattern “0001”.
are repeatedly generated and sequentially written into the frame memory 11 as illustrated in FIG.

The display data creation means 13 returns each display bit pattern data formed based on each specific bit pattern read from the frame memory 11 as test display pattern data.

When the display device is normal, the display bit pattern is a specific bit pattern "OOO1' when extracted from the output of the display data creation means 13, and the LUT section 15
When extracted from , it is a specific bit pattern with color information added.

The error detection means 14 compares each display bit pattern data manually input by the display data creation means 13 with the expected value of the display bit pattern data to detect the presence or absence of an error.

As described above, a specific pit pattern with a simple bit configuration is repeatedly written to the frame memory, and a display data wrapping test is performed using a display bit pattern formed based on the specific bit pattern read from the frame memory. Therefore, a display data folding test can be performed without providing a special display data folding processing means constituted by hardware. Further, even if the display data folding processing means is configured with hardware, the configuration can be significantly simplified compared to the conventional system.

Note that the display control means 12 and the error detection means 14 may be provided separately as shown in the figure, or may be configured using one display processor as explained in the next embodiment section. You can do it like this.

〔Example〕

Embodiments of the present invention will be described with reference to FIGS. 2 to 4. FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 4 is an operational waveform diagram thereof. In this embodiment, the display bit pattern would be retrieved from frame memory.

(A) Configuration of Embodiment In FIG. 3, frame memory 119 display data creation means 13. The LUT section 15 is as described in FIG.

In the display data creation means 13, 131 is a data rate conversion unit that converts data read out by accessing the frame memory at low speed into a display bit pattern having a bit rate at the time of display.

132 is a P/S conversion unit that converts the parallel display bit pattern data into a serial display bit pattern signal and outputs it to the LUT.
Part 1 Part 5.

In this embodiment, the display bit pattern data output from the data rate converter 131 is used as display bit pattern data for testing.

16 is a display processing device, which includes a processor (MPU) 161;
ROMI 62. It is equipped with a RAMI 63 and performs processing for both the display control means 12 and the error detection means 140 in FIG.

The MPU 161 has a control unit 16 similar to a normal processor.
1a, an arithmetic unit 16 lb, and a control register unit 161C.

A control program for the MPU 161 is stored in the ROM 162, and data and programs being processed are set in the RAM 163. In RAM163,
163a is a specific bit pattern storage section in which a specific bit pattern is stored, and 163b is an expected value storage section in which an expected value of display bit pattern data is stored.

17 is a D/A converter which converts the digital color display bit pattern signal inputted on the LUT section 1 into an analog color display bit pattern signal and sends it to the display 18.

A common bus 19 transfers data and control signals between the display control means 16, the frame memory 11, the display bit pattern data extraction means 13, and the like.

(B) Operation of the Embodiment The operation shown in FIG. 3 will be explained with reference to FIGS. 2 and 4, taking as an example the case where the specific bit pattern is "0001".

Prior to the start of operation, a specific bit pattern “0001°
is set in the specific bit pattern storage section 163a, and the expected value of the display bit pattern data is set in the expected value storage section 163a.
b is set. In this example, the expected value is equal to the specific bit pattern 0001'.

The MPU 161 reads a specific bit pattern "0001" from the specific bit pattern storage section 163a of the RAM 163, and writes it onto the frame memory 11 in accordance with the horizontal and vertical scanning order at the time of display. As a result, as shown in FIG. 2, a specific bit pattern "0001" is repeatedly written on each rask of the frame memory 11.

The frame memory 11 is read in units of one raster, with the horizontal direction as the main scanning direction and the vertical direction as the sub-scanning direction, and sent to the data rate converter 131, as in the conventional method.

The data rate conversion unit 131 reads display data for one raster at different data rates, and outputs display bit pattern data in units of 4 bits, which is equal to the number of pits of a specific bit pattern.

The display bit pattern data output from the data rate converter 131 is sent to the P/S converter 132, and is also sent to the memory card as display bit pattern data for testing.
Return to U161.

The P/S conversion unit 132 converts the 4-bit parallel display bit pattern into a serial display bit pattern signal and outputs the signal to the LUT unit 1.

Color information is added to the serially displayed bit pattern signal input to the top 5 of the LUT section 1 and sent to the D/A converter 17.

The D/A converter 17 converts the digital color display bit pattern signal input into the LUT section 1 into an analog color display bit pattern signal and sends it to the display 18. As a result, the specific bit pattern of the frame memory 11 shown in FIG. 2 is displayed in color on the display.

On the other hand, the MPU 161 reads the display bit pattern output from the data rate converter 131 in the program cycle.

Since the horizontal and vertical synchronization signals and the program cycle are generally asynchronous, the display bit pattern data output from the data rate converter 131 is read into the MPU 161 asynchronously with the horizontal synchronization signal, as shown in FIG. .

The display bit pattern data in the horizontal blanking section is all "0", that is, "o", as shown in FIG.
o o o', and the display bit pattern data in the display section corresponds to specific bit pattern data.
It is “0001”.

The MPU 161 has display bit pattern data “00”.
The time when the value changes from a value other than 00° to "0000" is the start point of horizontal blanking, and the time when "0001' is read is recognized as the end of the blanking section. When the blanking section ends, the display period begins. Even if the blanking period ends, the data is not stable for the first few cycles, so stable display bit pattern data read several cycles after the end of the blanking period is used as display bit pattern data for testing.

Note that in order to be able to reliably detect the start and end points of the horizontal blanking interval, the program cycles are selected such that several cycles of reading are performed within the horizontal blanking interval. If several cycles of reading are performed within the horizontal blanking interval, MP tJ 16
A horizontal blanking interval can be reliably detected in one normal program cycle.

The MPU 161 compares the stable display bit pattern data read in the display period with the expected value in the expected value storage section 163b, and detects the presence or absence of an error in the display bit pattern.

By performing the above-described error detection on all specific bit patterns written in the frame memory 11, it is possible to grasp the error status of the entire frame memory 11 and display-related portions.

Although one embodiment of the present invention has been described above, the present invention can be implemented as follows.

Rough error checking is possible even if a specific bit pattern is fixed, but even if a certain display bit turn is 0001' corresponding to a specific bit pattern, it will always be "1" due to a failure in the first bit, for example. There is a possibility that it is.

This problem can be solved by changing the contents of a specific bit pattern each time a test is completed.

In other words, after reading the frame memory 11 once or several times and displaying and testing, the contents of the specific bit pattern are changed and the same display data wrapping test as the previous one is performed. Test the wrapping display data by changing the contents of .

In this case, each specific bit pattern to be changed is selected such that error detection for each bit is possible.

For example, in the case of 4 bits, 'o o o oo to "111
How to change bit by bit up to 1', "oooo"→
'0001 → "0010" → '0100° → "1000
This can be done using various methods, such as a method of cyclically changing the angle.

By doing so, it is possible to reliably detect the presence or absence of a fault in all bits constituting the frame memory 11.

Furthermore, when testing only a specific area of the frame memory 11, the display data folding test can be performed by writing and reading specific bit patterns only in that specific area.

The above is a description of each embodiment in which a test display bit pattern is taken out from the frame memory 11. However, the present invention also provides a method for taking out a test display bit pattern from the LUT section 15 and performing a display data folding test. As already mentioned, it is possible to do the following.

Also, instead of one display processing device 16, display control means 12
As already mentioned, the error detection means 14 may be provided separately and the specific bit pattern is not limited to 4 bits.

〔Effect of the invention〕

As explained above, according to the present invention, the following effects can be obtained.

(b) A specific bit pattern with a simple bit configuration is repeatedly written to the frame memory, and a display data wrapping test is performed using a display bit pattern formed based on the specific bit pattern read from the frame memory. Therefore, a display data folding test can be performed without providing a special display data folding processing means constituted by hardware.

(b) Even when the display data folding processing means is configured with hardware, the configuration can be significantly simplified compared to conventional systems.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the basic configuration of the present invention. FIG. 2 is an explanatory diagram of a specific bit pattern writing method to a frame memory in the present invention and embodiments. FIG. 3 is an explanatory diagram of the configuration of an embodiment of the present invention. 4 is an operational waveform diagram of the same embodiment, and FIG. 5 is an explanatory diagram of a conventional display data folding test method. In FIG. 1 and FIG. 3, 11... frame memory, 12... display control means,
13... Display data creation means, 14... Error detection means, 15... Lookup table section (LUT section)
, 16...Display processing device.

Claims (3)

[Claims] (1) Test the normality of the display device by returning the display pattern data formed based on the test pattern data read from the display frame memory (11) and comparing it with the expected value of the display pattern data. In the display data wrapping test method, (a) a specific bit pattern having a configuration that can be repeatedly written into the frame memory (11) is used as a test pattern, and this specific bit pattern is sequentially written to a predetermined area on the frame memory (11). (b) display data for folding each display bit pattern data formed based on each specific bit pattern data read from the frame memory (11) as test display pattern data; (c) error detection means (14) for detecting the presence or absence of an error by comparing each display bit pattern data input from the display data creation means (13) with an expected value of the display bit pattern data; A display data loop test method characterized by having the following. (2) The display data folding test method according to claim 1, wherein the predetermined area of the frame memory (11) in which the specific bit pattern is written is the entire area of the frame memory (11). (3) Claims 1 or 2 characterized in that the content of the specific bit pattern changes each time a test is completed.
Display data loop test method described in section.