JPS63282535A - Signal processor - Google Patents

Signal processor

Info

Publication number
JPS63282535A
JPS63282535A JP62117830A JP11783087A JPS63282535A JP S63282535 A JPS63282535 A JP S63282535A JP 62117830 A JP62117830 A JP 62117830A JP 11783087 A JP11783087 A JP 11783087A JP S63282535 A JPS63282535 A JP S63282535A
Authority
JP
Japan
Prior art keywords
program
data
signal processing
test program
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62117830A
Other languages
Japanese (ja)
Inventor
Masao Chatani
茶谷　雅夫
Masao Sato
佐藤　政夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62117830A priority Critical patent/JPS63282535A/en
Publication of JPS63282535A publication Critical patent/JPS63282535A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To efficiently perform fault detection by detecting the free time of a processor which does not perform signal processing for input data at the time of a communication and executing a test program at every free time. CONSTITUTION:This processor has the test program in addition to a signal processing program which performs the original signal processing program regarding input data and is equipped with a data detector 2 which detects whether or not data is inputted, a program counter 3 which outputs the address of the original signal processing program when the data is inputted and outputs the address of the test program when not, and alarm register 4 which outputs an alarm signal when the test program detects a fault, and an external output terminal. A signal process is therefore tested by using the test program in the free time when the data is not inputted. Consequently, the fault detection is performed efficiently without increases in size, power consumption, and fault rate.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はシグナルプロセッサに関し、特に内部で故障が
発生し九時にアラーム信号を発生する機能を付加しｔス
トアドブログラム制御万式のシグナルプロセッサに関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal processor, and more particularly to a signal processor that has a function of generating an alarm signal at 9 o'clock in the event of an internal failure and is capable of controlling a stored program. .

〔従来の技術〕[Conventional technology]

ストアドブログラム制御刀式のシグナルプロセッサにお
いて故障発生時にアラーム信号を発生させる方式として
、従来二重化し之シグナルプロセップの出力信号上比較
する比較チェック方式が用いられている。すなわち、同
一のシグナルプロセッサを二つ設けて両者に同一の入力
信号を与えて得られる二つの出力信号を互いに比較し、
岡山力信号が相違しておれば故障発生とみなしてアラー
ム信号を発生する方式である。Conventionally, as a method for generating an alarm signal when a failure occurs in a stored program control type signal processor, a comparison check method is used in which the output signals of the redundant signal processors are compared. In other words, by providing two identical signal processors and applying the same input signal to both, the two output signals obtained are compared with each other.
If the Okayama force signals are different, it is assumed that a failure has occurred and an alarm signal is generated.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述しｔ従来のアラーム発生機能付きのシグナルプロセ
ッサは、回路の二憲化により大形化し、且つ消費電力が
増大すると共にシグナルプロセッサが一つだけの場合に
比べて故障発生の確率が増大するという問題点を有する
。As mentioned above, conventional signal processors with an alarm generation function have become larger due to dual circuits, consume more power, and have a higher probability of failure than when there is only one signal processor. There are problems.

本発明の目的は、上述の問題点を解決し、従米のような
大形化、消費電力の増大、および故障率の増大を伴わず
にアラーム発生械炬を付加したシグナルプロセッサを提
供することにある。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a signal processor equipped with an alarm generator without increasing the size, power consumption, or failure rate as in the conventional case. be.

〔問題点全解決するｔめの手段〕[The tth method to solve all problems]

本発明のシグナルプロセッサは、本来の入力データに対
する信号処理を行う信号処理プログラムの他にテストプ
ログラムを有し、データが入力しているか否かを検出す
るデータ検出器と、データが入力している時は本来の信
号処理プログラムのアドレスを出力し、データが入力さ
れていない時はテストプログラムのアドレスを出力する
プログラム力ワンタと、テストプログラムにより故障が
検出され友場合アラーム信号を出力するアラームレジス
タと、外部出力癩子と愛育する。The signal processor of the present invention has a test program in addition to a signal processing program that performs signal processing on original input data, a data detector that detects whether data is input, and a data detector that detects whether data is input. A program register that outputs the address of the original signal processing program at the time, and outputs the address of the test program when no data is input, and an alarm register that outputs an alarm signal if a failure is detected by the test program. , external output leprosy and love-nurturing.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

図は本発明の一実施例の概略図である。The figure is a schematic diagram of an embodiment of the invention.

図において、インストラク７ｗンＲＯＭ　（ＲｅａｄＯ
ｎｌｙＭｅｍｏｒｙ）　　ｌに入力データの信号処理に
必要な１百号処理プログラムの他にシグナルプロセッサ
の谷ブロックの機能金テストするテストプログラム金付
加している。ま友データの入力がなく信号処理を行わな
い７グナルプロセツプの空き時間を検出する几めのデー
タ慎出器２を有する。データ検出器２は一例として絶対
値演算回路２０．ローパｘ７４ルｆｉ　（ｌｏｗ　Ｐａ
５ｓ　　Ｆｉｌｔｅｒ：ＬＰＦ）２１、レベル検出器２
２により構成され、レベル検出器２２は入力信号がある
基準より低くければデータの入力がないと判定し、デー
タ入力が所定の期間ない場合にプログラム力ワンタ３に
テストプログラムを選択する信号Ｄ１ｔ−出力する。デ
ータ検出器２２の出力信号Ｄ１は、プログラムカワンタ
３のアドレスを強制的にテストプログラムの先頭のアド
レスに設定する役割を果す。ま九人力信号にデータ信号
がある場合は、Ｄｌ信号によりプログラムカワンタ３に
リセットをかけ信号処理プログラムを使用する。また、
テストプログラム実行中でもデータ信号が入力され九場
合はＤｌ信号によりプログラムカクンタ３にリセットを
かけ信号処理プログラムを選択し、テストプログラムの
進行ｔ−強制的に中止させる。In the figure, the instruction 7wn ROM (ReadO
nlyMemory) In addition to the No. 100 processing program necessary for signal processing of input data, a test program for testing the functionality of the valley block of the signal processor is added. It has a precise data extractor 2 that detects the idle time of the 7-signal processor where no friend data is input and no signal processing is performed. The data detector 2 includes, for example, an absolute value calculation circuit 20. Low Pa x74 le fi (low Pa
5s Filter: LPF) 21, level detector 2
2, the level detector 22 determines that there is no data input if the input signal is lower than a certain standard, and sends a signal D1t- to the program power wanta 3 to select a test program if no data is input for a predetermined period. Output. The output signal D1 of the data detector 22 serves to forcibly set the address of the program counter 3 to the start address of the test program. If there is a data signal in the human power signal, the program counter 3 is reset by the Dl signal and the signal processing program is used. Also,
If a data signal is input even during execution of the test program, the program converter 3 is reset by the Dl signal, a signal processing program is selected, and the progress of the test program is forcibly stopped.

テストプログラムがセレクトされると、プログラムに−
１１き込まれているデータ金使用して谷ブロックのテス
トヲ行い、プログラムに′４ｉ＊込まれている期待値と
照合し、テスト結果と期待値が相違しておれば故障発生
とみなしてアラーム信号上発生して、アラームレジスタ
４、外部出力湖子５を通じてアラーム信号を外部へ出力
する。When a test program is selected, the program -
11 Test the valley block using the data stored in the program, compare it with the expected value stored in the program, and if there is a difference between the test result and the expected value, it is assumed that a failure has occurred and an alarm signal is sent. The alarm signal is output to the outside through the alarm register 4 and the external output terminal 5.

〔発明の効果〕〔Effect of the invention〕

以上説明し友様に本発明は、データが入力されていない
空き時間にテストプログラム（使用シてシグナルプロセ
ッサをテストでき、を友テストを用いて故障を検出して
アラーム信号の発生を可能としｔ九め、回路の二重化を
必要とせず、大形化。As explained above, the present invention enables the signal processor to be tested by using a test program (in idle time when no data is being input), and the fault can be detected by using the test program to generate an alarm signal. Ninth, it does not require duplication of circuits and can be made larger.

消費電力の増大、故障率の増大を伴わずに効率よく故障
検出できる効果がある。This has the effect of efficiently detecting failures without increasing power consumption or failure rate.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明のアラーム＠能ヲ持つ７グナルプロセツサの
一実施例を示すブロック図である。 （−レ′The figure is a block diagram showing an embodiment of a seven-signal processor having an alarm function according to the present invention. (−Le′

Claims (1)

【特許請求の範囲】[Claims] 通信用シグナルプロセッサにおいて、入力データに対す
る信号処理に使用する信号処理プログラムの他に前記シ
グナルプロセッサの各ブロックの機能をテストするテス
トプログラムを有し、通信時前記入力データに対する信
号処理を行わない前記プロセッサの空き時間を検出し、
この空き時間ごとに前記テストプログラムへ実行を移し
、テスト実行結果と期待値を照合することにより故障を
検出し、アラーラを出す機能を有することを特徴とする
シグナルプロセッサ。In the communication signal processor, the processor has a test program for testing the function of each block of the signal processor in addition to a signal processing program used for signal processing on input data, and does not perform signal processing on the input data during communication. Detects the free time of
A signal processor having a function of detecting a failure by executing the test program every free time, comparing the test execution result with an expected value, and issuing an alarm.
JP62117830A 1987-05-13 1987-05-13 Signal processor Pending JPS63282535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62117830A JPS63282535A (en) 1987-05-13 1987-05-13 Signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62117830A JPS63282535A (en) 1987-05-13 1987-05-13 Signal processor

Publications (1)

Publication Number Publication Date
JPS63282535A true JPS63282535A (en) 1988-11-18

Family

ID=14721303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62117830A Pending JPS63282535A (en) 1987-05-13 1987-05-13 Signal processor

Country Status (1)

Country Link
JP (1) JPS63282535A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6449515B2 (en) 1996-11-29 2002-09-10 Omron Corporation Controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6449515B2 (en) 1996-11-29 2002-09-10 Omron Corporation Controller

Similar Documents

Publication Publication Date Title
JPH0869391A (en) Data processor and its method
JPS63282535A (en) Signal processor
JP2007011639A (en) Input/output control apparatus, information control apparatus, input/output control method, and information control method
JP2508305B2 (en) Initial value determination device
JP2924392B2 (en) Microcomputer system
JPH06175888A (en) Abnormal access detection circuit
JPS61134846A (en) Electronic computer system
JPS6213153Y2 (en)
JPS6260035A (en) Artificial trouble generation system
JPS5983438A (en) Program failure detecting system
JPH1020968A (en) Selective hardware resetting circuit
JPH01169642A (en) Runaway detecting circuit
JPH01123329A (en) Interrupting circuit
JPS62109156A (en) Interruption control system
JPS62151943A (en) Test system for microcomputer
JPH0263248A (en) Infinite loop fault detection system for task program
JPS5872228A (en) Fault processing system for data processing system
JPH05324407A (en) Cpu monitor system
JPS5843053A (en) Microprocessor
JPS59178536A (en) System for judging zero value of plural data
JPS60239839A (en) False fault generator
JPS60173647A (en) Detecting system of error generating part of information processing unit
JPS6320540A (en) Information processor
JPS61241848A (en) Fault detecting circuit for electronic computer
JPS62105242A (en) Information processor