JPS63278326A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable forming the grooves doped in high precision and at low concentration on their inner walls, by performing ion implantation in the channel ing direction on regions where the grooves are aimed to be formed and next by forming the grooves on these doped regions. CONSTITUTION:Ion implantation of p-type impurities is performed in the channel ing direction perpendicularly to a surface of an epitaxial layer 3, and next heat treatment is performed to form p-type regions 6 on element isolation regions. After a CVD silicon dioxide film is formed, a reactive ion etching method is used to remove this film so that the film remains only inside edge parts of a first mask 4 to serve as a second mask. This second mask 7 is used to perform reactive ion etching and to form grooves 8 in the p-type regions 6. Hence the deep grooves, where impurities are introduced in high precision and at low concentration on their inner walls, can be formed.

Description

[Detailed Description of the Invention] [Summary] By utilizing the ion channeling phenomenon (the property that when ions are implanted in the channeling direction of a semiconductor, the ions are implanted deeply and with well-controlled concentration), impurities are added to the inner wall. This is a method for manufacturing a semiconductor device that includes a step of forming relatively deep grooves introduced with high precision and low concentration.

Covering areas other than the region where the trench is to be formed on the semiconductor layer with a first mask, impurity ions are implanted in the channeling direction of the semiconductor layer, and heat treatment is performed to activate the implanted impurity ions. After forming the impurity-doped region and forming a mask material film, this mask material film is etched so that it remains only in the region contacting the edge of the first mask. The second mask is used to perform anisotropic etching to form a groove in the impurity-containing region.

[Industrial application field]

The present invention relates to an improvement in a method for manufacturing a semiconductor device. especially,
The present invention relates to an improvement in a method for manufacturing a semiconductor device, which includes a step of forming a trench and introducing impurities into the inner wall of the trench.

(Prior Art) In a method of manufacturing a semiconductor device, there are cases where it is necessary to form a relatively deep trench and introduce impurities into the inner wall of the trench.

This is the case when forming a buried type element isolation or a vertical type buried type capacitor.

Conventionally, in such a process, a relatively deep groove is formed using an anisotropic etching method, and then the wall surface is doped using a vapor phase transport method using a mask. Ta.

[Problem that the invention seeks to solve]

The method according to the conventional technology mentioned above (method of forming a relatively deep groove using an anisotropic etching method, and then doping the wall surface using a vapor phase transport method using a mask). When used, the impurity concentration on the wall surface becomes high, and it is impossible to form a high-precision, low-concentration layer on the wall surface, which is required when forming a relatively deep groove as shown in the above example.

An object of the present invention is to eliminate this drawback, and to provide a method for manufacturing a semiconductor device that includes a step of forming a relatively deep groove into which impurities are introduced with high accuracy and low concentration into the inner wall. be.

[Means for solving problems]

The means taken by the present invention to achieve the above object is to cover the area other than the groove formation area (5) on the semiconductor layer (3) with a first mask (4), and ion-implanting impurity ions in the channeling direction, and performing heat treatment to activate the implanted impurity ions to form a region (6) doped with the impurity;
After forming a film of the mask material, etching the film of the mask material so that it remains only in the region contacting the edge of the first mask (4) and serves as a second mask (7); This second mask (7) is used to perform anisotropic etching to form a trench (8) in the impurity-containing region (6).

[Effect]

When ions are implanted in the channeling direction of a semiconductor, the ions can be implanted deeply and with well-controlled concentration (
ion channeling phenomenon) is known. C1
Traditionally, ion implantation in this direction has not been put into practice, as the implantation is deep and inappropriate for normal applications.
It is done in a direction shifted by about .

The present invention utilizes the above-mentioned property (the property that ions are implanted deeply when ions are implanted in the channeling direction of a semiconductor). First, in the region where a groove is to be formed, ions are implanted in the channeling direction. A deep, lightly doped region is formed by implantation, and a groove is formed in this doped region, and a highly precise and lightly doped groove is formed on the inner wall. can do.

〔Example〕

Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be further described with reference to the drawings.

After forming an n+ type buried layer 2 on the <Zoo> plane of a p-type silicon substrate, as shown in FIG. 2, an n-type silicon 7 layer 3 is epitaxially grown. The upper surface of this n-type silicon epitaxial layer 3 also becomes a <100> plane.

The surface is oxidized to form a silicon dioxide film.

The silicon dioxide film is removed from the element isolation region 5 to form a first mask 4 made of a silicon dioxide film.

Refer to Figure 1a. Since the direction (<100> direction) perpendicular to the plane of the epitaxial layer 3 (<lO0 plane>) is the channeling direction, heat treatment is performed after ion-implanting the p-type impurity in this channeling direction. p-type region 6 in element isolation region 5.
form. Since ions are implanted in the channeling direction, the depth of this p-type region 6 can be made sufficiently deep. In other words, it can be done in about 5 ru.

After the CVD silicon dioxide film has been formed (see FIG. 1b), it is removed using a reactive ion etching method, leaving it only within the edges of the first mask 4 to form the second mask.

Referring to FIG. 1c, this second mask 7 is used to form a trench 8 in the p-type region 6 by reactive ion etching. This groove 8
The impurity concentration around is low, and the shape accuracy of its diffusion region is high.

Referring to FIG. 3, an arbitrary functional element such as a bipolar transistor is formed using a conventional method. First, the opening 8 in the element isolation region is filled with a silicon dioxide film 9, a p-type impurity is introduced into the base region to form a base IO, an n-type impurity is introduced into the emitter region to form an emitter 11, and then a silicon dioxide film is formed. After providing an opening in the silicon film 4, an aluminum film is formed and patterned to form the collector electrode 12,
A base electrode 13 and an emitter electrode 14 are formed.

〔Effect of the invention〕

As explained above, in the semiconductor device according to the present invention, an area other than the region where the groove is to be formed is covered with a first mask, impurity ions are implanted in the channeling direction of the semiconductor layer, and the ion channeling phenomenon ( Taking advantage of the property that ion implantation is deep when ion implanted in the channeling direction of a semiconductor, the impurity is introduced with high precision and low concentration, and the region where the impurity is introduced with high precision and low concentration is created. forming a second mask in a region adjacent to an edge of the first mask, and using the second mask to anisotropically etch a groove in the impurity-containing region; Therefore, a relatively deep groove into which impurities are introduced with high precision and low concentration can be formed on the inner wall.

[Brief explanation of drawings]

FIGS. 1(a) to 1(c) are cross-sectional views of the substrate after completion of the process according to the gist of the present invention. FIG. 2.3 is a cross-sectional view of a substrate after completion of the main steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention. l...'p-type silicon substrate, 2...n+ type buried layer. 3 fists/IIn type silicon layer (collector), 4φ...1st
mask (silicon dioxide film), 51/opening. 6...p layer region, 7... second mask (silicon dioxide M), 8...
Opening, 9φ・0 silicon dioxide film, 10...Fist base, 11---Emitter. 12--Collector electrode, 13--Base electrode, 14-e fist emitter electrode. Construction loss σ Figure 2 Present invention Figure 1q Present invention Figure 1b Present invention Figure 1C Process diagram Figure 3

Claims (1)

[Claims] The first mask (
4), implanting impurity ions in the channeling direction of the semiconductor layer (3), and performing heat treatment to activate the implanted impurities to form a region (6) containing the impurity. After forming a film of the mask material, the film of the mask material is etched so that it remains only in the region contacting the edge of the first mask (4) to form a second mask (7). and forming a groove (8) in the impurity-containing region (6) by anisotropic etching using the second mask (7). manufacturing method.