JPS63276307A - Amplifier circuit - Google Patents

Amplifier circuit

Info

Publication number
JPS63276307A
JPS63276307A JP62111844A JP11184487A JPS63276307A JP S63276307 A JPS63276307 A JP S63276307A JP 62111844 A JP62111844 A JP 62111844A JP 11184487 A JP11184487 A JP 11184487A JP S63276307 A JPS63276307 A JP S63276307A
Authority
JP
Japan
Prior art keywords
emitter
equation
common
transistor
mutual conductance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62111844A
Other languages
Japanese (ja)
Inventor
Yoshihiko Mizukami
義彦 水上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP62111844A priority Critical patent/JPS63276307A/en
Publication of JPS63276307A publication Critical patent/JPS63276307A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the deterioration in the AC characteristic and the production of an error by adopting a common emitter or common source connection to a complementary transistor (TR) to an emitter or source of a TR of common base or common gate connection so as to decrease number of components and reduce the power current. CONSTITUTION:Differential pair TRs 17, 18 driven by a current source 7 amplify the signal given from input terminals 3, 4 together with active loads 5, 6 and the amplified output is given to an emitter of a TR 10 and a base of a TR 11 via an emitter follower comprising a TR 8. A common base input resistance R1 is expressed in equation I, where alpha10 is a common base current amplification factor of the TR 10 and gm10 is the mutual conductance. Then equation II is established, where gm11 is the mutual conductance of a TR 11 itself and Gm is the overall mutual conductance of the resistor Ri and the TR 11. Then equation III is established, and equation V is given under the assumption of the establishment of equation IV, and the mutual conductance is a half the conventional circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は増幅回路に関し、特に唯一の入力でシンクとソ
ースとの二種類の出力を有する増幅回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplifier circuit, and more particularly to an amplifier circuit having a single input and two types of outputs, a sink and a source.

〔従来の技術〕[Conventional technology]

従来、この種の増幅回路は、第2図に一例を示す様に、
マルチコレクタのトランジスタ14のひとつのコレクタ
をソース出力13とし、もうひとつのコレクタをトラン
ジスタ15と16とで構成されるカレントミラー回路で
折り返し、シンク出力12を発生させていた。
Conventionally, this type of amplifier circuit, as shown in FIG.
One collector of the multi-collector transistor 14 was used as the source output 13, and the other collector was turned back by a current mirror circuit composed of transistors 15 and 16 to generate the sink output 12.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の増幅回路は、カレントミラー回路等で折
り返し出力を発生しているので、素子数が増加し、それ
に伴い電源電流の増加やAC特性の悪化、誤差の発生等
をもたらすという欠点がある。
The above-mentioned conventional amplifier circuit generates a folded output using a current mirror circuit, etc., which increases the number of elements, which has the disadvantage of increasing power supply current, deteriorating AC characteristics, and generating errors. .

特に、誤差の発生については誤差補償用の回路素子がさ
らに必要となり、またAC特性についても二つの出力の
周波数特性、位相特性に差があるのは、回路設計上大幅
な制約となっている。
In particular, when an error occurs, an additional circuit element for error compensation is required, and in terms of AC characteristics, the difference in the frequency characteristics and phase characteristics of the two outputs is a significant constraint in circuit design.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の増幅回路は、ベースまたはゲートを接地した第
1のトランジスタと、この第1のトランジスタとは相補
型でありエミッタまたはソースを前記第1のトランジス
タのエミッタまたはソースに接続した第2のトランジス
タとを有し、この第2のトランジスタのベースまたはゲ
ートに信号を入力し、前記第1および第2のトランジス
タのコレクタまたはドレインから信号を出力するように
構成される。
The amplifier circuit of the present invention includes a first transistor whose base or gate is grounded, and a second transistor which is complementary to the first transistor and whose emitter or source is connected to the emitter or source of the first transistor. and is configured to input a signal to the base or gate of the second transistor and output the signal from the collector or drain of the first and second transistors.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の回路図である。FIG. 1 is a circuit diagram of an embodiment of the present invention.

1は電源端子であり、2は最低電位の端子である。電流
源7で駆動される差動ペアトランジスタ17.18は入
力端子3.4から入力される信号を能動負荷5,6と共
に増幅し、その増幅出力は、トランジスタ8のエミッタ
ホロワを介した後、ベース接地されたトランジスタ10
のエミッタとエミッタ接地されたトランジスタ11のベ
ースとに入力されており、ここで出力が分岐される。
1 is a power supply terminal, and 2 is a terminal with the lowest potential. Differential pair transistors 17 and 18 driven by current source 7 amplify the signal input from input terminal 3.4 together with active loads 5 and 6, and the amplified output is passed through the emitter follower of transistor 8 and then connected to the base. grounded transistor 10
and the base of the transistor 11 whose emitter is grounded, and the output is branched here.

ここで、トランジスタ11は、トランジスタ10のベー
ス接地入力抵抗Riをエミッタジェネレーション抵抗と
するエミッタ接地になっている。
Here, the transistor 11 has a grounded emitter with the grounded base input resistance Ri of the transistor 10 serving as an emitter generation resistance.

トランジスタ10のベース接地電流増幅率をα10゜相
互コンダクタンスをg m IQとすると、Ri = 
a 10/ g m 1o   −−(1)であるから
、トランジスタ11単体の相互コンダクタンスをgml
tとし、エミッタジェネレーション抵抗Riとトランジ
スタ11との総合の相互コンダクタンスをGmとすると
、 Gm’=gm+t/  (1士 gm  llRi  
)    −・”t2)となる。従って G  m ′ g  m  11/  (1± gml
l α to/  g  m  to)・・・・・・(
3) となり、 (210= l 、 g m 10= g 
m 11と仮定すれば、 G m = g m t 1/ 2 −− G41とな
り、従来の増幅器における相互コンダクタンスの約半分
の相互コンダクタンスか得られる。
If the common base current amplification factor of the transistor 10 is α10° and the mutual conductance is g m IQ, then Ri =
a 10 / g m 1o --(1), so the mutual conductance of transistor 11 alone is gml
t, and the total mutual conductance of the emitter generation resistor Ri and the transistor 11 is Gm, then Gm'=gm+t/ (1st gm llRi
) −・”t2). Therefore, G m ′ g m 11/ (1± gml
l α to/ g m to)・・・・・・(
3) becomes (210= l, g m 10= g
Assuming m 11, G m = g m t 1/2 -- G41, and a transconductance that is about half of that in a conventional amplifier is obtained.

第1図に示す実施例はバイポーラトランジスタで構成さ
れているが、トランジスタ10.11を互に相補型であ
る二つの電界効果トランジスタでおきかえても以下に述
べる効果が同様に得られる。
Although the embodiment shown in FIG. 1 is composed of bipolar transistors, the same effect described below can be obtained even if the transistors 10 and 11 are replaced with two mutually complementary field effect transistors.

〔発明の効果〕〔Effect of the invention〕

以上説明した様に本発明によれば、ベース接地(または
ゲート接地)されたトランジスタのエミッタ(またはソ
ース)に相補型のトランジスタをエミッタ接地(または
ソース接地)することにより、素子数が少なく、それに
伴い電源電流が小さく:、AC特性に差が少なく誤差も
少ないシンクおよびソースの2種類の良好な出力を得る
事ができる増幅回路を容易に実現できるという効果が有
る。
As explained above, according to the present invention, by grounding the emitter (or source) of a complementary transistor to the emitter (or source) of a transistor whose base is grounded (or gate grounded), the number of elements is small. Accordingly, the power supply current is small, and there is an effect that it is possible to easily realize an amplifier circuit that can obtain two types of good outputs, sink and source, with little difference in AC characteristics and little error.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図、第2図は従来
の増幅回路の一例を示す回路図である。 1・・・電源端子、2・・・最低電位端子、3,4・・
・入力端子、5,6・・・能動負荷、7・・・電流源、
8・・・エミッタホロワトランジスタ、9・・・抵抗、
10・・・トランジスタ、11・・・トランジスタ、1
2.13出イシ 茅 1 関 茅 215!J
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional amplifier circuit. 1... Power supply terminal, 2... Lowest potential terminal, 3, 4...
・Input terminal, 5, 6...active load, 7...current source,
8... Emitter follower transistor, 9... Resistor,
10...Transistor, 11...Transistor, 1
2.13 Ishimo 1 Sekimo 215! J

Claims (1)

【特許請求の範囲】[Claims] ベースまたはゲートを接地した第1のトランジスタと、
この第1のトランジスタとは相補型でありエミッタまた
はソースを前記第1のトランジスタのエミッタまたはソ
ースに接続した第2のトランジスタとを有し、この第2
のトランジスタのベースまたはゲートに信号を入力し、
前記第1および第2のトランジスタのコレクタまたはド
レインから信号を出力することを特徴とする増幅回路。
a first transistor whose base or gate is grounded;
The first transistor has a complementary second transistor whose emitter or source is connected to the emitter or source of the first transistor.
Input a signal to the base or gate of the transistor,
An amplifier circuit characterized in that a signal is output from the collectors or drains of the first and second transistors.
JP62111844A 1987-05-07 1987-05-07 Amplifier circuit Pending JPS63276307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62111844A JPS63276307A (en) 1987-05-07 1987-05-07 Amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62111844A JPS63276307A (en) 1987-05-07 1987-05-07 Amplifier circuit

Publications (1)

Publication Number Publication Date
JPS63276307A true JPS63276307A (en) 1988-11-14

Family

ID=14571580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62111844A Pending JPS63276307A (en) 1987-05-07 1987-05-07 Amplifier circuit

Country Status (1)

Country Link
JP (1) JPS63276307A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199851A (en) * 2013-03-19 2013-07-10 苏州朗宽电子技术有限公司 Mixing common-source common-base circuit of metallic oxide field-effect tubes and bipolar transistors

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57155814A (en) * 1981-03-20 1982-09-27 Nec Corp Error amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57155814A (en) * 1981-03-20 1982-09-27 Nec Corp Error amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103199851A (en) * 2013-03-19 2013-07-10 苏州朗宽电子技术有限公司 Mixing common-source common-base circuit of metallic oxide field-effect tubes and bipolar transistors

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