JPS63274932A - Liquid crystal driving circuit - Google Patents

Liquid crystal driving circuit

Info

Publication number
JPS63274932A
JPS63274932A JP10997287A JP10997287A JPS63274932A JP S63274932 A JPS63274932 A JP S63274932A JP 10997287 A JP10997287 A JP 10997287A JP 10997287 A JP10997287 A JP 10997287A JP S63274932 A JPS63274932 A JP S63274932A
Authority
JP
Japan
Prior art keywords
signal
liquid crystal
frame
timing signal
exclusive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10997287A
Other languages
Japanese (ja)
Inventor
Fujio Matsu
松 不二雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP10997287A priority Critical patent/JPS63274932A/en
Publication of JPS63274932A publication Critical patent/JPS63274932A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To improve the display quality by driving a liquid crystal by an AC converting signal of exclusive OR of a signal which has brought a line sequential timing signal to a frequency division, and a signal which has brought to a timing signal of a frame to a frequency division. CONSTITUTION:A liquid crystal is driven by an AC converting signal M' outputted from exclusive OR 3 of both frequency dividing signals of an A frequency dividing counter 1 of a line sequential timing signal CL1, and a B frequency dividing counter 2 of a timing signal FLM of a frame. In such a way, a polarity inversion of a driving signal at the time of switching of the frame can be eliminated, and by eliminating an abnormal state of variable density of a first common line, the display quality can be raised.

Description

【発明の詳細な説明】 (産業上の利用分野〕 本発明は、特に高デユーテイの時分割駆動による液晶駆
動回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention particularly relates to a liquid crystal drive circuit using high duty time division driving.

〔発明の概要〕[Summary of the invention]

本発明は、時分割駆動による液晶駆動方式において、線
順次のタイミング信号を分周した信号とフレームのタイ
ミング信号を分周した信号との排他的論理和である交流
化信号を用いて液晶を駆動することにより、表示品質の
向上を計ったものである。
The present invention drives a liquid crystal using an AC signal that is the exclusive OR of a signal obtained by dividing a line-sequential timing signal and a signal obtained by dividing a frame timing signal, in a liquid crystal driving method using time division driving. This is intended to improve display quality.

〔従来の技術〕[Conventional technology]

液晶を駆動する際、駆動信号に直流成分が残留すると液
晶の特性が劣化するため、液晶は交流化した信号で駆動
しなければならない。一般にデユーティが比較的低い場
合(1/64デユーテイ以下)は、1フレームごとに駆
動信号の極性を反転させて交流化を行なうが、この方法
ではデユーティが高くなるにつれて表示品質の劣化が目
立って来る。これは、表示パターンの差による駆動波形
の周波数成分の差が著しくなって来るためで、表示ムラ
として液晶画面上に現れる。
When driving a liquid crystal, if a direct current component remains in the drive signal, the characteristics of the liquid crystal deteriorate, so the liquid crystal must be driven with an alternating current signal. Generally, when the duty is relatively low (1/64 duty or less), the polarity of the drive signal is reversed every frame to convert it to AC, but with this method, the deterioration in display quality becomes more noticeable as the duty increases. . This is because the difference in frequency components of the drive waveform due to the difference in display patterns becomes significant, which appears as display unevenness on the liquid crystal screen.

そこで、高デユーテイの時分割駆動の場合、交流化の周
波数をくしで表示パターンの差による駆動波形の周波数
成分の差をできるだけ低減させるような工夫がなされて
いる。具体的には、線順次のタイミング信号を分周した
信号と、フレームごとに反転する信号との排他的論理和
を交流化信号とする。分周比は表示ムラが少なくなる値
を実際の液晶パネルの表示を見ながら選択する。線順次
のタイミング信号を分周しただけの信号では、一般的に
直流成分が残留してしまうので、フレームごとに反転す
る信号との排他的論理和を交流化信号とする。このよう
な信号で液晶を駆動することにより、表示ムラはかなり
低減されることが知られている。
Therefore, in the case of high-duty time-division driving, measures have been taken to reduce the difference in frequency components of drive waveforms due to differences in display patterns by combing the frequency of alternating current as much as possible. Specifically, the exclusive OR of a signal obtained by frequency-dividing the line-sequential timing signal and a signal that is inverted for each frame is used as the alternating current signal. The frequency division ratio is selected to reduce display unevenness while looking at the actual display on the liquid crystal panel. Since a signal obtained by simply frequency-dividing a line-sequential timing signal generally has a residual DC component, the exclusive OR with a signal that is inverted every frame is used as an AC signal. It is known that display unevenness can be considerably reduced by driving the liquid crystal with such a signal.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、従来の交流化方法には、次のような欠点があっ
た。すなわち、フレームごとに極性の反転する信号との
排他的論理和をとるという回路構成上、交流化信号の極
性の反転はフレームの切り替え時と一致する率が高い。
However, the conventional AC conversion method has the following drawbacks. That is, because of the circuit configuration that performs an exclusive OR with a signal whose polarity is inverted for each frame, there is a high probability that the inversion of the polarity of the alternating current signal will coincide with the frame switching time.

例えば、1/200デユーテイで、分周比を35とした
ときの交流化信号は、第2図に示すようになり、フレー
ムの切り替え時に極性の反転が多いことは明らかである
For example, when the duty is 1/200 and the frequency division ratio is 35, the AC signal is as shown in FIG. 2, and it is clear that the polarity is often reversed when switching frames.

さて、この極性反転時には、駆動信号が通常の極性一定
時とは違った変化をするので、実際に液晶に印加される
電圧の実効値に乱れが出る。このため、極性反転直後に
選択されるコモンラインの表示の濃淡が他のコモンライ
ンと異なってしまう。
Now, at the time of this polarity reversal, the drive signal changes differently than when the polarity is normally constant, so that the effective value of the voltage actually applied to the liquid crystal is disturbed. For this reason, the display shading of the common line selected immediately after the polarity inversion is different from that of other common lines.

この印加電圧の実効値の乱れは、駆eICの能力や、液
晶の特性、パネルの透明電極の抵抗値などの多くの要因
に影響され、完全に除去することは不可能である。
This disturbance in the effective value of the applied voltage is affected by many factors such as the ability of the eIC, the characteristics of the liquid crystal, and the resistance value of the transparent electrode of the panel, and cannot be completely eliminated.

したがって、従来の交流化方法では、フレームの切り替
え直後の第1コモンラインの表示の濃淡が他と異なると
いう現象が発生する。これは、特に表示画面を上下に2
分割して駆動する場合、画面の中央のコモンラインが1
本だけ濃淡が違うということになり、表示パターンによ
っては非常に目ざわりで表示品質を劣化させていた。
Therefore, in the conventional alternating current method, a phenomenon occurs in which the display shading of the first common line immediately after frame switching is different from that of the others. This is particularly important when moving the display screen up and down.
When driving separately, the common line in the center of the screen is 1
Only the books had different shading, which was very noticeable depending on the display pattern and degraded the display quality.

(問題点を解決するための手段) 上記問題点を解決するために、交流化の方法を改良し、
極性反転がフレームの切り替え時に集中しないようにし
て、第1コモンラインの濃淡異常を除去した。すなわち
、従来は線順次にタイミング信号を分周した信号の交流
化のため、フレームごとに極性反転する信号との排他的
論理和をとっていたが、本発明による方法では、フレー
ムのタイミング信号を分周した信号との排他的論理和を
とる。その分周比は、線順次のタイミング信号の分周比
との関係から、駆動信号に直流成分が残らないように、
また、フレームの切り替え時に極性反転が集中しないよ
うに設定する。例えば、デユーティが1/200で、線
順次のタイミング信号の分周比を35とした場合、第3
図に示すようにフレームのタイミング信号の分周比を7
とする。
(Means for solving the problem) In order to solve the above problem, we improved the method of exchange,
The polarity reversal is prevented from concentrating at the time of frame switching, and the density abnormality of the first common line is removed. In other words, in the past, in order to convert the line-sequential frequency-divided timing signal into AC, an exclusive OR with a signal whose polarity is inverted for each frame was performed, but in the method according to the present invention, the timing signal of the frame is Perform exclusive OR with the frequency-divided signal. The frequency division ratio is determined based on the relationship with the frequency division ratio of the line-sequential timing signal, so that no DC component remains in the drive signal.
In addition, settings are made so that polarity reversals do not concentrate when switching frames. For example, if the duty is 1/200 and the division ratio of the line sequential timing signal is 35, the third
As shown in the figure, the frequency division ratio of the frame timing signal is set to 7.
shall be.

一般的には、デユーティを1/D、線順次のタイミング
信号の分周比をA、フレームのタイミング信号の分周比
を8としたとき、DとAの最小公倍数がCならば、B−
C/Dとすれば、駆動信号に直流成分は残留せず、また
、フレームの切り替え時に極性反転は起こらない。
Generally, when the duty is 1/D, the frequency division ratio of the line sequential timing signal is A, and the frequency division ratio of the frame timing signal is 8, if the least common multiple of D and A is C, then B-
If C/D is used, no DC component remains in the drive signal, and polarity reversal does not occur when switching frames.

〔作用〕[Effect]

上記のような交流化方法により、第3図に示すように、
極性反転がフレームの切り替え時に集中することはなく
なるので、第1コモンラインの濃淡異常は完全に除去さ
れる。
As shown in Figure 3, by the above-mentioned alternating current method,
Since the polarity reversal is no longer concentrated at the time of frame switching, the shading abnormality of the first common line is completely eliminated.

〔実施例〕〔Example〕

以下、本発明の一実施例について説明する。 An embodiment of the present invention will be described below.

第1図に本発明の交流化方法を実現するための回路シス
テムのブロック図を示す。線順次のタイミング信@(C
LI)のA分周カウンタ1.フレームのタイミング信号
(FLM)のB分周カウンタ2および排他的論理和3で
構成される。交流化信号M′が出力される。
FIG. 1 shows a block diagram of a circuit system for realizing the AC conversion method of the present invention. Line sequential timing signal @(C
LI) A frequency division counter 1. It consists of a frame timing signal (FLM) B frequency division counter 2 and an exclusive OR 3. An alternating current signal M' is output.

第4図に、具体的な回路例を示す。CLlの分周比A、
FLMの分周比Bは、SW1〜5W16のスイッチの切
替えで選択することができる。
FIG. 4 shows a specific circuit example. Frequency division ratio A of CLl,
The frequency division ratio B of the FLM can be selected by switching switches SW1 to SW16.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明においては、線順次のタイ
ミング信号を分周した信号とフレームのタイミング信号
を分周した信号との排他的論理和である交流化信号を用
いて液晶を駆動するようにしたので、フレームの切り替
え時の駆動信号の極性反転をなくすことができ、第1コ
モンラインの濃淡異常を除去して、表示品質を高めるこ
とができる。
As explained above, in the present invention, the liquid crystal is driven using an AC signal that is the exclusive OR of a signal obtained by dividing a line-sequential timing signal and a signal obtained by dividing a frame timing signal. Therefore, it is possible to eliminate the polarity reversal of the drive signal at the time of frame switching, and it is possible to eliminate the shading abnormality of the first common line and improve the display quality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の交流化信号発生回路のブロック図、
第2図は従来例の交流化信号のタイミングを示す図、第
3図は本発明実施例の交流化信号のタイミングを示す図
、第4図は本発明実施例の交流化信号発生回路を示す回
路図である。 CLI・・・線順次のタイミング信号 FLY・・・フレームのタイミング信号M・・・フレー
ムごとに極性が反転する信号M′・・・交流化信号 C10・・・CLlを35分周した信号CL4・・・F
LMを7分周した信号 1・・・A分周カウンタ 2・・・B分周カウンタ 3.10・・・排他的論理和ゲート 4.5,7.8・・・プログラマブルカウンタ6.9・
・・Dタイプフリップ70ツブーー〇−
FIG. 1 is a block diagram of an AC signal generation circuit of the present invention;
FIG. 2 is a diagram showing the timing of the AC conversion signal in the conventional example, FIG. 3 is a diagram showing the timing of the AC conversion signal in the embodiment of the present invention, and FIG. 4 is a diagram showing the AC conversion signal generation circuit in the embodiment of the present invention. It is a circuit diagram. CLI...Line sequential timing signal FLY...Frame timing signal M...Signal M' whose polarity is inverted every frame...AC conversion signal C10...Signal CL4 obtained by dividing CLl by 35.・・F
LM divided by 7 signal 1...A frequency division counter 2...B frequency division counter 3.10...Exclusive OR gate 4.5, 7.8...Programmable counter 6.9.
・・D type flip 70 two boots 〇-

Claims (1)

【特許請求の範囲】[Claims] 時分割駆動による液晶駆動回路において、線順次のタイ
ミング信号を分周した信号と、フレームのタイミング信
号を分周した信号との排他的論理和である交流化信号を
用いて液晶を駆動する液晶駆動回路。
In a liquid crystal drive circuit using time-division driving, a liquid crystal drive that drives the liquid crystal using an AC signal that is the exclusive OR of a signal obtained by dividing a line-sequential timing signal and a signal obtained by dividing a frame timing signal. circuit.
JP10997287A 1987-05-06 1987-05-06 Liquid crystal driving circuit Pending JPS63274932A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10997287A JPS63274932A (en) 1987-05-06 1987-05-06 Liquid crystal driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10997287A JPS63274932A (en) 1987-05-06 1987-05-06 Liquid crystal driving circuit

Publications (1)

Publication Number Publication Date
JPS63274932A true JPS63274932A (en) 1988-11-11

Family

ID=14523821

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10997287A Pending JPS63274932A (en) 1987-05-06 1987-05-06 Liquid crystal driving circuit

Country Status (1)

Country Link
JP (1) JPS63274932A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126191U (en) * 1989-03-28 1990-10-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126191U (en) * 1989-03-28 1990-10-17

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