JPS63274202A - Field effect transistor - Google Patents

Field effect transistor

Info

Publication number
JPS63274202A
JPS63274202A JP10830387A JP10830387A JPS63274202A JP S63274202 A JPS63274202 A JP S63274202A JP 10830387 A JP10830387 A JP 10830387A JP 10830387 A JP10830387 A JP 10830387A JP S63274202 A JPS63274202 A JP S63274202A
Authority
JP
Japan
Prior art keywords
gate
electrode
matching
drain
matching circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10830387A
Other languages
Japanese (ja)
Other versions
JP2594558B2 (en
Inventor
Isamu Nagameguri
長廻 勇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP10830387A priority Critical patent/JP2594558B2/en
Publication of JPS63274202A publication Critical patent/JPS63274202A/en
Application granted granted Critical
Publication of JP2594558B2 publication Critical patent/JP2594558B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)
  • Microwave Amplifiers (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To eliminate the variance in the matching characteristic by forming a matching circuit comprising a low pass filter between each electrode and an insulation layer so as to eliminate the need for a metallic thin wire between a matching capacitor and a substrate for matching. CONSTITUTION:A source lead-out electrode 4 formed onto a substrate, an insulation layer 5 coated onto the electrode 4, a gate lead-out electrode 2 on the insulation layer 5, a drain lead-out electrode 3 and a connection conductor 6 connecting the electrode 3 and a gate 1 of a function part are provided. Then a matching circuit comprising a low pass filter is formed between the electrodes and the insulation layer 6. That is, the matching circuit comprising the low pass filter consisting of the inductance by the external lead metallic thin wire and the capacitance formed through the insulation film 5 is formed. Thus, even with the variance in the external leads, the overall impedance is made close to the characteristic impedance of an external circuit by means of the matching circuit in the inside of the component at a prescribed size.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電界効果型トランジスタ(以下FETと略す
)に関し、特にX帯以上の高周波数領域で使用されるG
aAsを用いたFETの構造に関する。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a field effect transistor (hereinafter abbreviated as FET), and in particular to a field effect transistor (FET) used in a high frequency region of
The present invention relates to the structure of an FET using aAs.

〔従来の技術〕[Conventional technology]

一般に、FETを用いて増幅器を構成する場合、ソース
接地型が安定性がよく広帯域化が容易であるために使用
されている。この増幅器のうち電力増幅器のように並列
運転される素子数が増えてくると、その入出力インピー
ダンスが低下し、外部線路の特性インピーダンスとの整
合が困難になり、このため素子近傍に整合回路を設けて
半導体装置外部での整合化を容易にしている。
Generally, when configuring an amplifier using FETs, a common source type is used because it is stable and easy to widen the band. As the number of elements in this amplifier that are operated in parallel increases, such as in a power amplifier, its input/output impedance decreases, making it difficult to match the characteristic impedance of the external line. Therefore, a matching circuit is installed near the elements. This facilitates matching outside the semiconductor device.

第6図は従来のGaAs  FETを用いた内部整合回
路付半導体装置の一例の平面図を示す。図のように、半
導体素子8は、入出力インピーダンスが外部特性インピ
ーダンスより低いので、内部整合用コンデンサ9を介し
て整合用基板10の間に設けてインピーダンス整合をと
っている。これらは、金属細線11でお互いに接続され
ている。
FIG. 6 shows a plan view of an example of a semiconductor device with an internal matching circuit using a conventional GaAs FET. As shown in the figure, since the input/output impedance of the semiconductor element 8 is lower than the external characteristic impedance, the semiconductor element 8 is provided between the matching substrate 10 via the internal matching capacitor 9 for impedance matching. These are connected to each other by thin metal wires 11.

この内部整合用コンデンサ9は低域通過型フィルタとし
て動作するものである。
This internal matching capacitor 9 operates as a low-pass filter.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の整合回路付半導体装置では、整合回路(
9) f!:金属細線11を用いて接続して構成するた
め、その金属細線11の長さのバラツキ等で整合回路の
特性にバラツキを生じ、特性が十分に得られたいという
欠点がある。
In the conventional semiconductor device with a matching circuit described above, the matching circuit (
9) f! : Since the connection is made using thin metal wires 11, the characteristics of the matching circuit vary due to variations in the length of the thin metal wires 11, etc., and there is a drawback that it is difficult to obtain sufficient characteristics.

本発明の目的は、このような欠点を除き、素子内に整合
回路を設けて、金属細線をなくし、整合特性のバラツキ
をなくして外部回路との接合を容易にした電界効果型ト
ランジスタを提供することにある。
An object of the present invention is to eliminate such drawbacks, provide a field-effect transistor in which a matching circuit is provided within the element, eliminate thin metal wires, eliminate variations in matching characteristics, and facilitate connection with an external circuit. There is a particular thing.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の電界効果型トランジスタの構成は、基板上に形
成されたソース引出し電極と、このソース引出し電極上
に被着された絶縁層と、この絶縁層上にゲート引出し電
極、ドレイン引出し電極、または各々離間して形成され
たゲート・ドレイン電極と、このゲート・ドレインの引
出し電極、またはゲート・ドレイン電極と、このゲート
・ドレインの引出し電極、またはゲート・ドレイン電極
および機能部を接続する接続導体部とを備え、前記各電
極と前記絶縁層との間で低域通過型フィルタからなる整
合回路が形成されるようにしたことを特徴とする。
The field effect transistor of the present invention has a structure including a source lead electrode formed on a substrate, an insulating layer deposited on the source lead electrode, and a gate lead electrode, a drain lead electrode, or a drain lead electrode formed on the insulating layer. A connection conductor portion that connects the gate/drain electrodes formed apart from each other and the gate/drain lead electrode, or the gate/drain electrode, the gate/drain lead electrode, or the gate/drain electrode and the functional part. A matching circuit including a low-pass filter is formed between each of the electrodes and the insulating layer.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図(a)、(b)は本発明の一実施例の平面図およ
びそのA−A’間でみた時の樅断面図である0図中、1
はゲート機能部、2はゲート引出し電極、3はドレイン
引出し電極、4はソース引出し電極、5は絶縁膜、6は
ゲート機能部1とゲート引出し電極2とを接続する接続
導体、7はGaAs基板を示す。
1(a) and 1(b) are a plan view of an embodiment of the present invention and a cross-sectional view of a fir tree taken along line A-A'.
2 is a gate function part, 2 is a gate extraction electrode, 3 is a drain extraction electrode, 4 is a source extraction electrode, 5 is an insulating film, 6 is a connecting conductor that connects the gate function part 1 and the gate extraction electrode 2, and 7 is a GaAs substrate. shows.

このFETをソース接地で使用する場合の等価回路は、
第2図のようになる。すなわち、インダクタンスL、〜
L3はそれぞれ外部引出し用金属細線によるものであり
、破線内は、本発明による導体部6と、ソース電極4−
ゲート電極2の間に挿入される絶縁体5で形成されるキ
ャパシタC1を示す。この場合、ゲート導体部1から機
能部側をみた時のインピーダンスが付加キャパシタC1
により整合させることが出来る。第3図はこの様子を示
したスミス図で、機能部インピーダンスAに導体部Bと
付加キャパシタCを設けた状態を示す。
The equivalent circuit when using this FET with a common source is:
It will look like Figure 2. That is, the inductance L, ~
L3 is a thin metal wire for external extraction, and inside the broken line is the conductor part 6 according to the present invention and the source electrode 4-
A capacitor C1 formed of an insulator 5 inserted between gate electrodes 2 is shown. In this case, the impedance when looking from the gate conductor section 1 to the functional section side is that of the additional capacitor C1.
It is possible to achieve consistency by FIG. 3 is a Smith diagram showing this state, and shows a state in which a conductor part B and an additional capacitor C are provided to the functional part impedance A.

このような構成をとれば、外部引出しリードのバラツキ
があっても、素子内部に所定寸法で形成した整合回路に
より、外部回路の特性インピーダンスに近づけられて整
合されるので、外部回路の影響が少ない。
With this configuration, even if there are variations in the external lead, the matching circuit formed with a predetermined size inside the element will match the characteristic impedance of the external circuit close to the characteristic impedance of the external circuit, so the influence of the external circuit will be reduced. .

第4図は本発明の第2の実施例の平面図、第5図はこの
第4図の等価回路図を示す。この実施例では、絶縁[1
5を介してドレイン引出し電極3′もソース電極(4)
上に配置されたものである。この場合も、素子内に整合
回路をもっているため、外部回路の影響が少なく、外部
回路との接続が容易にできる。
FIG. 4 is a plan view of a second embodiment of the present invention, and FIG. 5 is an equivalent circuit diagram of FIG. In this example, the insulation [1
The drain extraction electrode 3' is also connected to the source electrode (4) through 5.
It is placed above. In this case as well, since a matching circuit is provided within the element, there is little influence from external circuits, and connection with external circuits can be made easily.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、素子近傍にインダクタ
ンスと絶縁膜を介して形成されるキャパシタンスにより
、その整合回路を形成しているので、特にX帯以上の周
波数帯の増幅器を構成する際には外部回路による影響が
少い回路を構成できるという効果がある。
As explained above, the present invention forms a matching circuit using inductance and capacitance formed near the element via an insulating film. This has the effect that it is possible to configure a circuit that is less affected by external circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a>、(b)は本発明の一実施例のFETの平
面図およびその縦断面図、第2図は第1図の等価回路図
、第3図は第1図の入力側の状態を示すスミス図、第4
図は本発明の第2の実施例の平面図、第5図は第4図の
等価回路図、第6図は従来のFETの一例の平面図であ
る。 1・・・機能部ゲート、2・・・ゲート引出し電極、3
.3′・・・ドレイン引出し電極、4・・・ソース引出
し電極、5・・・絶縁体、6・・・接続導体、7・・・
GaAs基板、8・・・半導体素子、9・・・整合用コ
ンデンサ、10・・・整合用基板、11・・・金属細線
。 、−゛
Figure 1 (a>, (b) is a plan view and longitudinal cross-sectional view of an FET according to an embodiment of the present invention, Figure 2 is an equivalent circuit diagram of Figure 1, and Figure 3 is the input side of Figure 1. Smith diagram showing the state of
5 is a plan view of a second embodiment of the present invention, FIG. 5 is an equivalent circuit diagram of FIG. 4, and FIG. 6 is a plan view of an example of a conventional FET. 1... Functional part gate, 2... Gate extraction electrode, 3
.. 3'...Drain extraction electrode, 4...Source extraction electrode, 5...Insulator, 6...Connection conductor, 7...
GaAs substrate, 8... Semiconductor element, 9... Matching capacitor, 10... Matching substrate, 11... Metal thin wire. ,−゛

Claims (2)

【特許請求の範囲】[Claims] (1)基板上に形成されたソース引出し電極と、このソ
ース引出し電極上に被着された絶縁層と、この絶縁層上
にゲート引出し電極、ドレイン引出し電極、または各々
離間して形成されたゲート・ドレイン電極と、このゲー
ト・ドレインの引出し電極、またはゲート・ドレイン電
極と、このゲート・ドレインの引出し電極、またはゲー
ト・ドレイン電極および機能部を接続する接続導体部と
を備え、前記各電極と前記絶縁層との間で低域通過型フ
ィルタからなる整合回路が形成されるようにしたことを
特徴とする電界効果型トランジスタ。
(1) A source extraction electrode formed on a substrate, an insulating layer deposited on this source extraction electrode, and a gate extraction electrode, a drain extraction electrode, or a gate formed separately on this insulating layer.・Equipped with a drain electrode, an extraction electrode of the gate/drain, or a gate/drain electrode, a connection conductor portion connecting the extraction electrode of the gate/drain, or the gate/drain electrode, and the functional part; A field effect transistor characterized in that a matching circuit including a low-pass filter is formed between the insulating layer and the insulating layer.
(2)接続導体部の長さは、使用周波数帯でこの導体端
部から機能部をみたインピーダンスの虚数部がインダク
テイブを呈する長さである特許請求の範囲第1項記載の
電界効果型トランジスタ。
(2) The field effect transistor according to claim 1, wherein the length of the connecting conductor is such that the imaginary part of the impedance when looking at the functional part from the end of the conductor exhibits inductivity in the operating frequency band.
JP10830387A 1987-04-30 1987-04-30 Field-effect transistor Expired - Lifetime JP2594558B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10830387A JP2594558B2 (en) 1987-04-30 1987-04-30 Field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10830387A JP2594558B2 (en) 1987-04-30 1987-04-30 Field-effect transistor

Publications (2)

Publication Number Publication Date
JPS63274202A true JPS63274202A (en) 1988-11-11
JP2594558B2 JP2594558B2 (en) 1997-03-26

Family

ID=14481275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10830387A Expired - Lifetime JP2594558B2 (en) 1987-04-30 1987-04-30 Field-effect transistor

Country Status (1)

Country Link
JP (1) JP2594558B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1251563A2 (en) * 2001-04-18 2002-10-23 Tyco Electronics Corporation FET structures having symmetric and/or distributed feedforward capacitor connections
JP2012512556A (en) * 2008-12-16 2012-05-31 フリースケール セミコンダクター インコーポレイテッド High power semiconductor device for wireless application and method of manufacturing high power semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005006031A (en) * 2003-06-11 2005-01-06 Sony Corp Amplifier and receiving circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1251563A2 (en) * 2001-04-18 2002-10-23 Tyco Electronics Corporation FET structures having symmetric and/or distributed feedforward capacitor connections
EP1251563A3 (en) * 2001-04-18 2007-01-03 Tyco Electronics Corporation FET structures having symmetric and/or distributed feedforward capacitor connections
JP2012512556A (en) * 2008-12-16 2012-05-31 フリースケール セミコンダクター インコーポレイテッド High power semiconductor device for wireless application and method of manufacturing high power semiconductor device
US8669638B2 (en) 2008-12-16 2014-03-11 Freescale Semiconductor, Inc. High power semiconductor device for wireless applications and method of forming a high power semiconductor device

Also Published As

Publication number Publication date
JP2594558B2 (en) 1997-03-26

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