JPS63262473A - Plasma cvd device - Google Patents
Plasma cvd deviceInfo
- Publication number
- JPS63262473A JPS63262473A JP9902087A JP9902087A JPS63262473A JP S63262473 A JPS63262473 A JP S63262473A JP 9902087 A JP9902087 A JP 9902087A JP 9902087 A JP9902087 A JP 9902087A JP S63262473 A JPS63262473 A JP S63262473A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- plasma
- chamber
- plasma cvd
- cvd apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 65
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 9
- 239000010408 film Substances 0.000 claims description 30
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 19
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 5
- 239000007789 gas Substances 0.000 abstract description 10
- 239000012535 impurity Substances 0.000 abstract description 10
- 230000005684 electric field Effects 0.000 abstract description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- 239000001257 hydrogen Substances 0.000 abstract description 2
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 2
- 239000011261 inert gas Substances 0.000 abstract description 2
- 238000010849 ion bombardment Methods 0.000 abstract description 2
- 230000007935 neutral effect Effects 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 239000002245 particle Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000000746 purification Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000002747 voluntary effect Effects 0.000 description 1
Landscapes
- Chemical Vapour Deposition (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
この発明は、プラズマCVD装置に係り、特に成膜の対
象となる基板の清浄化技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a plasma CVD apparatus, and particularly to a cleaning technique for a substrate to be subjected to film formation.
従来のプラズマCVD装置の代表的な例を第5図に従っ
て説明する。A typical example of a conventional plasma CVD apparatus will be explained with reference to FIG.
第5図は従来のプラズマCVD装置の一例を説明するた
めの模式図である。この図において、1は基板表面が洗
浄される予備室、2は基板表面に所望の薄膜を形成する
成膜室、3a、3bは前記予備室1および成膜室2にそ
れぞれ設けらた基板加熱用ヒータ、4aは前記予備室1
のゲートバルブ、4bは前記予備室1と成膜室2の間に
設けられたゲートバルブ、5は前記成膜室2に載置され
た基板、6は高周波電極、7は基板側電極で、高周波電
極6と対向して配置されている。8は高周波電源、9は
マツチングネットワークである。FIG. 5 is a schematic diagram for explaining an example of a conventional plasma CVD apparatus. In this figure, 1 is a preliminary chamber where the substrate surface is cleaned, 2 is a film forming chamber where a desired thin film is formed on the substrate surface, and 3a and 3b are substrate heating units provided in the preliminary chamber 1 and the film forming chamber 2, respectively. 4a is the heater for the preliminary chamber 1.
4b is a gate valve provided between the preliminary chamber 1 and the film forming chamber 2, 5 is a substrate placed in the film forming chamber 2, 6 is a high frequency electrode, 7 is a substrate side electrode, It is arranged opposite to the high frequency electrode 6. 8 is a high frequency power supply, and 9 is a matching network.
成膜室2に基板5を図示の状態に装着するためには、先
ず、ゲートバルブ4bを閉とし、ゲートバルブ4aを開
け、′予備室1を大気圧としてここに基板5を装着し、
ゲートバルブ4aを閉め、予備室1を真空に排気する。In order to mount the substrate 5 in the film forming chamber 2 in the illustrated state, first close the gate valve 4b, open the gate valve 4a, set the preliminary chamber 1 to atmospheric pressure, and mount the substrate 5 there.
The gate valve 4a is closed and the preliminary chamber 1 is evacuated to vacuum.
十分に予備室1を真空に引いた後、加熱ヒータ3aによ
って基板5を予備加熱する。その後、ゲートバルブ4b
を開け、基板輸送手段(図示せず)で基板5を成膜室2
の基板側電極7上に移動し、ゲートバルブ4bを閉める
。図には基板5が成膜室2に装着された後の状態を示す
。以上の手順を経ることによって、成膜室2を大気にさ
らすことなく、基板5を成膜室2に装着することが可能
である。さらに、予備室1において予備加熱を行うこと
により、大気中において基板5の表面に吸着した不純物
を離脱させることができる。After the preliminary chamber 1 is sufficiently evacuated, the substrate 5 is preheated by the heater 3a. After that, the gate valve 4b
, and transfer the substrate 5 to the film forming chamber 2 using a substrate transport means (not shown).
, and close the gate valve 4b. The figure shows the state after the substrate 5 is installed in the film forming chamber 2. By going through the above steps, it is possible to mount the substrate 5 in the film forming chamber 2 without exposing the film forming chamber 2 to the atmosphere. Further, by performing preheating in the preparatory chamber 1, impurities adsorbed on the surface of the substrate 5 in the atmosphere can be removed.
次に、高周波電源8からの高周波電力を高周波電極6に
印加し放電を行わせて原料ガスを分解し、基板5上に所
望の膜を堆積させる。Next, high-frequency power from the high-frequency power source 8 is applied to the high-frequency electrode 6 to cause discharge, decomposing the raw material gas, and depositing a desired film on the substrate 5.
(発明が解決しようとする問題点)
従来のプラズマCVD装置は以上のように構成されてい
るので、予備室1では、基板5の予備加熱しかできず、
大気中で基板5に吸着した不純物を除去するために長い
時間を要し、また、不純物を完全には除去し得ないなど
の問題点があった。(Problems to be Solved by the Invention) Since the conventional plasma CVD apparatus is configured as described above, the preliminary chamber 1 can only preheat the substrate 5;
There are problems in that it takes a long time to remove impurities adsorbed on the substrate 5 in the atmosphere, and impurities cannot be completely removed.
この発明は、上記のような問題点を解消するためになさ
れたもので、予備室において不純物の除去を短時間に、
確実に行うことのできるプラズマCVD装置を得ること
を目的とする。This invention was made to solve the above-mentioned problems, and allows impurities to be removed in a short time in a preliminary chamber.
The object of the present invention is to obtain a plasma CVD apparatus that can perform reliably.
(問題点を解決するための手段)
この発明に係るプラズマCVD装置は、プラズマ放電に
より基板表面に所望の薄膜を形成する成膜室と、この成
膜室とは独立に真空排気され、成膜室に移動される基板
表面の洗浄処理を行う予備室とを備えたプラズマCVD
装置において、予備室に、成膜に影響を与えないガスを
導入し、このガスのプラズマを生ぜしめて、基板表面の
洗浄を行うプラズマ発生手段を備、えたものである。(Means for Solving the Problems) The plasma CVD apparatus according to the present invention has a film forming chamber for forming a desired thin film on the surface of a substrate by plasma discharge, and a film forming chamber that is independently evacuated to form a film. Plasma CVD equipped with a preliminary chamber for cleaning the surface of the substrate transferred to the chamber
The apparatus is equipped with plasma generating means for introducing a gas that does not affect film formation into a preliminary chamber and generating plasma from this gas to clean the substrate surface.
〔作用)
この発明におけるプラズマCVD装置は、予備室にプラ
ズマ発生手段を備えたことから、この予備室に成膜に影
響を及ぼさないガスを導入して放電を行わせることによ
り、基板表面にイオン衝撃を与え、不純物を基板表面よ
り除去する。[Function] Since the plasma CVD apparatus according to the present invention is equipped with a plasma generation means in the preparatory chamber, a gas that does not affect film formation is introduced into the preparatory chamber and discharge is performed, thereby generating ions on the substrate surface. Impact is applied to remove impurities from the substrate surface.
以下、この発明の一実施例を図面について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図はこの発明の一実施例を示すプラズマCVD装置
の概略図である。この図において、第5図と同一符号は
同じものを示すが、以下では予備室1側に相当する符号
にaを、成膜室2側に相当する符号にbをそれぞれ必要
により付して表示することにする。FIG. 1 is a schematic diagram of a plasma CVD apparatus showing an embodiment of the present invention. In this figure, the same numerals as in Fig. 5 indicate the same things, but in the following, the numerals corresponding to the preliminary chamber 1 side will be affixed a, and the numerals corresponding to the film forming chamber 2 side will be affixed b as necessary. I decided to do it.
第1図のように基板5を成膜室2に装着するためには、
先ず、ゲートバルブ4bを閉とし、ゲートバルブ4aを
開け、予備室1を大気圧としてここに基板5を装着し、
ゲートバルブ4aを閉める。予備室1を十分に真空に引
いた後、加熱ヒータ3aにより基板5を加熱するととも
に、水素あるいは不活性ガス等の成膜に悪影響を及ぼさ
ないガスを導入し、高周波電源7aからの高周波電力を
高周波電極6aに供給し放電を起こす。このとき、基板
5は接地電位とする。放電によって生じたプラズマ中の
イオンや電子は高周波電界およびシース内の電界によっ
て加速されエネルギーを得て基板5に衝突する。また、
プラズマ中の中性粒子の一部も高速のイオンとの衝突に
よってエネルギーを得、基板5に衝突する。これらのプ
ラズマ中の粒子が基板5に衝突することにより基板5表
面に吸着している不純物を飛沫せしめ基板表面を浄化す
る。このようにプラズマ中の粒子の衝突の効果により、
加熱するだけでは除去し得ない離脱エネルギーの大きな
不純物をも取り除くことが可能である。In order to attach the substrate 5 to the film forming chamber 2 as shown in FIG.
First, the gate valve 4b is closed, the gate valve 4a is opened, the preliminary chamber 1 is set to atmospheric pressure, and the substrate 5 is mounted therein.
Close the gate valve 4a. After the preliminary chamber 1 is sufficiently evacuated, the substrate 5 is heated by the heater 3a, a gas such as hydrogen or an inert gas that does not adversely affect the film formation is introduced, and high-frequency power from the high-frequency power source 7a is applied. It is supplied to the high frequency electrode 6a to cause discharge. At this time, the substrate 5 is at ground potential. Ions and electrons in the plasma generated by the discharge are accelerated by the high frequency electric field and the electric field within the sheath, gain energy, and collide with the substrate 5. Also,
Some of the neutral particles in the plasma also gain energy through collision with high-speed ions and collide with the substrate 5. When these particles in the plasma collide with the substrate 5, impurities adsorbed on the surface of the substrate 5 are splashed, thereby purifying the surface of the substrate. In this way, due to the effect of particle collisions in the plasma,
It is also possible to remove impurities with large separation energy that cannot be removed by heating alone.
このとき、導入するガスとしては、アルゴン等の原子番
号が大きく質量の大きな元素を用いると、基板5に衝突
した際に与えるエネルギーが大きく、浄化効果も大きい
。さらに、高周波電極6aと基板5のプラズマに接する
領域の面積比を、基板5側、すなわち接地電極側の方が
小さくなる構造とすれば、シース電圧は基板5側で大き
くなり、ここでイオンが加速されたときに得るエネルギ
ーが大きくなり、これによる浄化効果も大きくなる。At this time, if an element having a large atomic number and mass, such as argon, is used as the introduced gas, it will give a large amount of energy when it collides with the substrate 5, and the purifying effect will be large. Furthermore, if the area ratio of the high-frequency electrode 6a and the area of the substrate 5 in contact with the plasma is made smaller on the substrate 5 side, that is, on the ground electrode side, the sheath voltage will be larger on the substrate 5 side, and the ions will be The energy obtained when accelerated increases, and the purification effect thereby increases.
以上のようにして基板5表面を浄化した後、ゲートバル
ブ4bを開は基板5を基板搬送手段(図示せず)により
、成膜室2に輸送しく図示の状態)、ゲートバルブ4b
を閉め、成膜を行う。After cleaning the surface of the substrate 5 as described above, the gate valve 4b is opened and the substrate 5 is transported to the film forming chamber 2 by a substrate transport means (not shown).
Close the door and perform film formation.
なお、上記実施例では予備室1に高周波電力を供給する
方法として、基板5側を接地電位とし、これに対向して
高周波電極6aを備えた構造について示したが、第2図
に示すように、高周波電力を基板5側に供給し、対向す
る電極7aを接地電位とした構造でもよい。この構造の
場合、基板5と、これに対向する電極7aとのプラズマ
に接する面積比を、基板5側の方が小さく構成とするこ
とが容易である。また、第3図に示すように、基板5に
直流電源10により直流バイアス電圧を加え接地電位か
らは負の電位となるようにすれば、基板5表面のシース
電位が大きくなりイオン衝撃が強くなり、洗浄効果が増
大する。さらに、第4図に示すように、予備室にプラズ
マを生ぜしめるプラズマ発生手段として磁場コイル11
とマイクロ波電源12による磁場とマイクロ波による電
子サイクロトロン共鳴を利用しても同様の効果を奏する
。In the above embodiment, as a method of supplying high-frequency power to the preliminary chamber 1, a structure was shown in which the substrate 5 side was set to the ground potential and the high-frequency electrode 6a was provided opposite to this, but as shown in FIG. , a structure in which high-frequency power is supplied to the substrate 5 side and the opposing electrode 7a is set to the ground potential may be used. In the case of this structure, it is easy to configure the ratio of the areas in contact with plasma between the substrate 5 and the electrode 7a facing thereto to be smaller on the substrate 5 side. Furthermore, as shown in FIG. 3, if a DC bias voltage is applied to the substrate 5 by the DC power supply 10 so that the potential becomes negative from the ground potential, the sheath potential on the surface of the substrate 5 increases and the ion bombardment becomes stronger. , the cleaning effect is increased. Furthermore, as shown in FIG. 4, a magnetic field coil 11 is used as a plasma generating means for generating plasma in the preliminary chamber.
A similar effect can be obtained by using the magnetic field from the microwave power source 12 and electron cyclotron resonance caused by microwaves.
以上説明したように、この発明は、プラズマ放電により
基板表面に所望の薄膜を形成する成膜室と、この成膜室
とは独立に真空排気され、成膜室に移動される基板の表
面の洗浄処理を行う予備室とを備えたプラズマCVD装
置において、予備室に、成膜に影響を与えないガスを導
入し、このガスのプラズマを生ぜしめて基板の表面の洗
浄を行うプラズマ発生手段を備えたので、予備室におい
て基板を放電洗浄することができる。したがって、加熱
だけでは除去し得ない離脱エネルギーの大きな不純物を
も短時間で効率よく取り除くことができる効果がある。As explained above, the present invention includes a film forming chamber in which a desired thin film is formed on the surface of a substrate by plasma discharge, and a film forming chamber that is independently evacuated to form a thin film on the surface of a substrate that is moved to the film forming chamber. A plasma CVD apparatus equipped with a preliminary chamber for performing a cleaning process, which includes plasma generating means for introducing a gas that does not affect film formation into the preliminary chamber and generating plasma of this gas to clean the surface of a substrate. Therefore, the substrate can be discharge cleaned in the preliminary chamber. Therefore, it is possible to efficiently remove impurities with large separation energy that cannot be removed by heating alone in a short time.
第1図はこの発明のプラズマCVD装置の一実施例の概
略構成を示す模式図、第2図〜第4図はこの発明の他の
実施例をそれぞれ示す模式図、第5図は従来のプラズマ
CVD装置の一例を示す模式図である。
図において、1は予備室、2は成膜室、3a。
3bは基板加熱用ヒータ、4a、4bはゲートバルブ、
5は基板、6a、、6bは高周波電極、7a、7bは高
周波電源、8a、8bはマツチングネットワーク、10
は直流電源、11は磁場コイル、12はマイクロ波電源
である。
なお、各図中の同一符号は同一または相当部分を示す。
代理人 大 岩 増 雄 (外2名)のぐ Φ
第3図
第4図
第5図
手続補正書(自発)FIG. 1 is a schematic diagram showing a schematic configuration of one embodiment of a plasma CVD apparatus of the present invention, FIGS. 2 to 4 are schematic diagrams showing other embodiments of the invention, and FIG. FIG. 1 is a schematic diagram showing an example of a CVD apparatus. In the figure, 1 is a preliminary chamber, 2 is a film forming chamber, and 3a. 3b is a heater for heating the substrate, 4a and 4b are gate valves,
5 is a substrate, 6a, 6b are high frequency electrodes, 7a, 7b are high frequency power supplies, 8a, 8b are matching networks, 10
1 is a DC power source, 11 is a magnetic field coil, and 12 is a microwave power source. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Nogu Φ Figure 3 Figure 4 Figure 5 Procedure amendment (voluntary)
Claims (6)
する成膜室と、この成膜室とは独立に真空排気され、前
記成膜室に移動される前記基板の表面の洗浄処理を行う
予備室とを備えたプラズマCVD装置において、前記予
備室に、成膜に影響を与えないガスを導入し、プラズマ
を生ぜしめて、前記基板表面の洗浄を行うプラズマ発生
手段を備えたことを特徴とするプラズマCVD装置。(1) A film forming chamber that forms a desired thin film on the surface of a substrate by plasma discharge, and a reserve that is independently evacuated from this film forming chamber and performs a cleaning process on the surface of the substrate transferred to the film forming chamber. A plasma CVD apparatus comprising a plasma CVD chamber, characterized in that the plasma CVD apparatus includes a plasma generating means for introducing a gas that does not affect film formation into the preparatory chamber to generate plasma and cleaning the substrate surface. Plasma CVD equipment.
配置された高周波電極に高周波電力を印加した高周波放
電によるものである特許請求の範囲第(1)項記載のプ
ラズマCVD装置。(2) The plasma CVD apparatus according to claim (1), wherein the plasma generation means in the preparatory chamber is based on high-frequency discharge by applying high-frequency power to a high-frequency electrode placed opposite to the substrate.
波電力を印加した高周波放電によるものである特許請求
の範囲第(1)項記載のプラズマCVD装置。(3) The plasma CVD apparatus according to claim (1), wherein the plasma generating means in the preparatory chamber is based on high-frequency discharge by applying high-frequency power to the substrate.
したことを特徴とする特許請求の範囲第(1)項記載の
プラズマCVD置。(4) The plasma CVD apparatus according to claim (1), wherein a DC bias voltage is applied to the substrate in the preliminary chamber.
に対向配置された高周波電極がプラズマに接する面積よ
りも小さくした電極構造としたことを特徴とする特許請
求の範囲第(1)項乃至第(4)項のいずれかに記載の
プラズマCVD装置。(5) An electrode structure in which the area of the substrate-side electrode in contact with the plasma is smaller than the area of the high-frequency electrode placed opposite to the substrate in contact with the plasma. The plasma CVD apparatus according to any one of item (4).
用いたものである特許請求の範囲第(1)項プラズマC
VD装置。(6) The plasma generating means is a plasma C according to claim (1), which uses electron cyclotron resonance.
VD device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9902087A JPS63262473A (en) | 1987-04-21 | 1987-04-21 | Plasma cvd device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9902087A JPS63262473A (en) | 1987-04-21 | 1987-04-21 | Plasma cvd device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63262473A true JPS63262473A (en) | 1988-10-28 |
Family
ID=14235513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9902087A Pending JPS63262473A (en) | 1987-04-21 | 1987-04-21 | Plasma cvd device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63262473A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0849779A2 (en) * | 1996-12-20 | 1998-06-24 | Texas Instruments Incorporated | Process for forming a semiconductor structure comprising ion cleaning and depositing steps and integrated cluster tool for performiong the process |
US6589865B2 (en) | 1995-12-12 | 2003-07-08 | Texas Instruments Incorporated | Low pressure, low temperature, semiconductor gap filling process |
-
1987
- 1987-04-21 JP JP9902087A patent/JPS63262473A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6589865B2 (en) | 1995-12-12 | 2003-07-08 | Texas Instruments Incorporated | Low pressure, low temperature, semiconductor gap filling process |
EP0849779A2 (en) * | 1996-12-20 | 1998-06-24 | Texas Instruments Incorporated | Process for forming a semiconductor structure comprising ion cleaning and depositing steps and integrated cluster tool for performiong the process |
EP0849779A3 (en) * | 1996-12-20 | 1998-07-22 | Texas Instruments Incorporated | Process for forming a semiconductor structure comprising ion cleaning and depositing steps and integrated cluster tool for performiong the process |
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