JPS6326106A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To stabilize the transient state at application of power by providing a circuit attenuating an input signal and a circuit increasing the gain at an operational amplifier circuit and using a time constant circuit to operate said two circuits at the transient state of power application. CONSTITUTION:In applying a power voltage to a power terminal 3, a time constant circuit 10 is operated to activate a 1st variable resistance circuit 8 connected between input terminals 1, 2 for a prescribed time decided by the time constant circuit from the application of power supply and a 2nd variable resistance circuit 11 changing the gain of an amplifier circuit 9. The 1st variable resistance circuit 8 consitutes an attenuation circuit together with resistors R11, R12 to attenuate the signal amplitude and the 2nd variable resistance circuit 11 acts like to increase the gain of the amplifier circuit 9. Thus, the instable operation of the circuit at the transient state of power application is made stable without deteriorating the quality of the signal at the normal operation.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an amplifier circuit constituting a receiver for AMI code signals, and particularly relates to an amplifier circuit for a wired communication device that improves the in-phase human input signal rejection ratio at power-on. It is something.

[Conventional technology]

Fig. 3 is a circuit diagram showing an example of a conventional balanced input type amplifier circuit. . The input signal is input to terminal 1.2, and an amplified output corresponding to the difference is obtained at terminal 5.6.

Further, Qs and Qa are transistors that constitute a constant current circuit, and a resistor Re that constitutes a bias generation circuit.
+ Rq + Current generated by transistors Qt, Ql, Ql diode-connected to R+o is supplied to gain transistors Q+, Qa.

Further, Q,,Q, are transistors forming a buffer circuit, and supply the voltage generated by the bias generating circuit described above as the base bias voltage of the gain transistors Q,,Qt via the resistors R,,Rg. .

Next, the operation will be explained. In the figure, the signal applied to terminal 1.2 is amplified by transistors Q+ and Qz, which are supplied with a bias voltage via resistors R+ and Rz, and is amplified across resistors R3 and R, which are connected to their collectors. obtained as output.

Since the emitters of the transistors Q+ and Qt are connected through the resistor R3, the difference in voltage applied to their bases is amplified and appears as a voltage drop across the resistors R3 and R4. In-phase components of the signals applied to terminals 1.2 are canceled by the emitters of transistors Qt and Qz and do not appear in the output.

[Problem that the invention seeks to solve]

By the way, the in-phase components of the input signal applied to terminals 1.2 cancel each other out at the emitters of transistors Qt and Qt when transistors Q, , Q, are biased in the active region. When both transistors are in the saturation or cut-off region, they cannot cancel each other out and appear at the output.

This occurs especially when the amplitude of the input signal exceeds the power supply voltage of the amplifier circuit, i.e., during the power-on transition of the amplifier circuit, and appears at the output as an unnecessary common-mode signal output, causing system malfunction. It is the cause.

In the conventional circuit shown in Figure 3, the common mode signal rejection ratio is
．． When the amplitude of the signal applied to the amplifier circuit 2 is smaller than the power supply voltage j of the amplifier circuit, it is maintained, but when it exceeds the power supply voltage, it becomes unstable. To solve this problem, a signal attenuation circuit can be installed at the input to reduce the signal and apply it to the input, and the circuit configuration can be configured to increase the gain. In order to obtain the amplitude value, it is necessary to increase both the attenuation ratio and the gain, which reduces the quality of the signal (signal-to-noise ratio) during normal operation.

The present invention has been made to solve the above-mentioned problems, and at the same time removes unnecessary common-mode signals, it also prevents a decrease in the gain of the differential signal, and also prevents the signal quality from decreasing even during normal operation. The aim is to obtain an amplifier circuit that does not cause

[Means for solving problems]

The amplifier circuit according to the present invention includes a circuit that attenuates an input signal and a circuit that increases the gain of the operational amplifier circuit, and also includes a time constant circuit so that these circuits operate only during a power-on transition. It is something that

[Effect]

In this invention, when the power is turned on, the time constant circuit operates, and a circuit that attenuates the human input signal for a time determined by the time constant circuit and a circuit that increases the gain of the differential amplifier circuit are operated, thereby eliminating unnecessary common-mode signals. At the same time, the gain of the differential signal is prevented from decreasing.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a block diagram showing the operation of an amplifier circuit according to an embodiment of the present invention. In the figure, 1°2 is an input terminal, 3 is a power supply terminal, and 8 is a resistor RI6+R1? 9 is an amplifier circuit, 10 is a time constant circuit, and 11 is a second variable resistance circuit that changes the gain of the amplifier circuit 9.
This is a variable resistance circuit.

Further, FIG. 2 is a circuit diagram showing a detailed circuit configuration of the amplifier circuit of the above embodiment, and in the figure, Ql. , Ql.

are transistors forming the first variable resistance circuit 8; Q;
, ,Q, is a second variable resistance circuit 11 whose emitters are connected to the emitters of gain transistors Q1 and Qz.
4R54 is a resistor, D is a diode, R13 is a resistor, and C3 is a capacitor, and these constitute an integrating circuit 10.

Next, the operation will be explained.

First, in FIG. 1, when a power supply voltage is applied to the power supply terminal 3, the time constant circuit 10 operates, and the first voltage connected between the input terminals 1 and 2 is activated for a time determined by this time constant circuit from the time the power is turned on. The variable resistance circuit 8 and the second variable resistance circuit 11 that changes the gain of the amplifier circuit 9 are operated. The first variable resistance circuit 8 forms an attenuation circuit together with the resistors R11+R12 and works to attenuate the signal amplitude, and the second variable resistance circuit 11 works to increase the gain of the amplifier circuit 9.

The operation will be explained in more detail with reference to FIG. Time constant circuit 11
When the power is turned on, the charging current of the capacitor CI turns on the transistors Ql□, Q, and outputs a current. Transistor q+o, Qll connected to input terminal 1.2
is transistor Q,! When more base current is supplied,
The collector-emitter resistance value is RI.

R, and since no current flows through the resistors R+ and Rg, they are in a saturated state, and the transistors Q,...,Q
The value is proportional to the emitter resistance value r of , , , and when the base current is large, the resistance is low, and conversely, when the base current is small, the resistance is high. Therefore, during the period when the transistor Qlt is conductive, the transistors Q, , Q,.

operates as a resistor, and the output resistance value of the buffer circuit transistors Q, , Q, of the bias generation circuit is considered to be sufficiently small. Therefore, the signal applied to the input terminal 1.2 is transmitted through the resistor R++, the transistor QIO, and the resistor R1. ! , QI+, and the respective signals are attenuated regardless of whether they are in phase or not. Transistor Q16. Q
lff is also a transistor Q1°.

Like Q, it operates as a variable resistor, but since it is connected in parallel to resistor R2, the bias current of transistors Q, , Qt decreases by the output current of transistor QIff. By selecting an appropriate value, variable gain characteristics can be obtained. Also, at this time, the emitters of transistors Q, , Q, are still connected to each other, so the common mode signal rejection ratio is maintained.

As described above, in this embodiment, the first variable resistance circuit that constitutes the input signal attenuation circuit and the second variable resistance circuit that increases the gain of the amplifier circuit are provided, and a time constant circuit is provided. Since the above-mentioned two variable resistance circuits are configured to operate during a transition, there is an effect of stabilizing the unstable operation of the circuit during a power-on transition without deteriorating the signal quality during normal operation.

In this embodiment, a capacitor C9 is connected to the terminal 7 as shown in FIG.
Although a time constant circuit which operates transiently when the power is turned on is provided by connecting the terminal 7, it goes without saying that the same effect can be obtained even if the terminal 7 is driven externally.

〔Effect of the invention〕

As described above, according to the present invention, in the amplifier circuit,
A circuit for attenuating the input signal and a circuit for increasing the gain of the operational amplifier circuit are provided, and a time constant circuit is used to operate the above two circuits only during the power-on transition, making it suitable for monolithic integration. With the circuit configuration,
This has the effect of stabilizing the transient unstable state of operation when the power is turned on.

[Brief Description of the Drawings] Fig. 1 is a configuration diagram showing an amplifier circuit according to an embodiment of the present invention, Fig. 2 is a specific circuit connection diagram showing the amplifier circuit of the above embodiment, and Fig. 3 is a conventional example. FIG. 2 is a circuit diagram showing an amplifier circuit of FIG. 8 is a first variable resistance circuit, 9 is an amplifier circuit, 10 is a time constant circuit, and 11 is a second variable resistance circuit.

Claims (1)

[Claims] (1) In an amplifier circuit equipped with differential input terminals, the differential amplifier circuit is configured with a first variable resistance circuit that constitutes a circuit that attenuates an input signal together with a resistor provided at each of the differential input terminals. a second variable resistance circuit provided between the emitters of a pair of gain transistors to increase the gain of the differential amplifier circuit; 1. An amplifier circuit characterized by comprising a time constant circuit for operating a second variable resistance circuit.