JPS63260062A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS63260062A JPS63260062A JP62093028A JP9302887A JPS63260062A JP S63260062 A JPS63260062 A JP S63260062A JP 62093028 A JP62093028 A JP 62093028A JP 9302887 A JP9302887 A JP 9302887A JP S63260062 A JPS63260062 A JP S63260062A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- semiconductor
- wiring
- circuit element
- superconductive material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000000463 material Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 abstract description 18
- 238000000034 method Methods 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 239000013078 crystal Substances 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000010409 thin film Substances 0.000 abstract description 3
- 239000010408 film Substances 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- KTUFCUMIWABKDW-UHFFFAOYSA-N oxo(oxolanthaniooxy)lanthanum Chemical compound O=[La]O[La]=O KTUFCUMIWABKDW-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910021521 yttrium barium copper oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Containers, Films, And Cooling For Superconductive Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、半導体装置に係り、特に消費電力が小さく、
高速電子計算機に用いて好適な半導体装置に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and particularly a semiconductor device with low power consumption and
The present invention relates to a semiconductor device suitable for use in high-speed electronic computers.
［従来の技術］
最近、日本のみならず外国において、臨界温度が極めて
高い超電導材料が発明された。最初の発表は昨年４月の
ＩＢＭチューリッヒのＭｕｌｌｅｒらのグループで、Ｂ
ａを含むＬ ａ ２ Ｃｕ Ｏ４で高い臨界温度をｌｌ
１ｔ測した。その後、東京大学田中昭二氏らのグループ
により発表が行われた。これらの発表を大別すると、Ｌ
ａｌ−ｘＭ ｘＣｏＯ３（Ｍ＝Ｓｒ。[Prior Art] Recently, superconducting materials with extremely high critical temperatures have been invented not only in Japan but also in foreign countries. The first announcement was made in April last year by a group led by IBM Zurich's Muller et al.
High critical temperature in L a 2 Cu O4 containing a ll
1 ton was measured. Afterwards, a group including Shoji Tanaka of the University of Tokyo gave a presentation. Broadly speaking, these presentations can be divided into L.
al-xMxCoO3 (M=Sr.
Ｂａ）の組成を有する低温超電導材料（臨界温度約４０
Ｋ）とＲＢａ２Ｃｕ３０７ （Ｒ＝Ｙ、Ｇｄ、Ｌｎ。Low-temperature superconducting material (critical temperature approximately 40
K) and RBa2Cu307 (R=Y, Gd, Ln.
Ｅｕ）の組成を有する高温超電導材料（臨界温度約９０
Ｋ）に分類される。特に、後者の材料の臨界温度は液体
窒素温度より高く極めて実用価値の高い材料である。High-temperature superconducting material with a composition of Eu) (critical temperature approximately 90
K). In particular, the critical temperature of the latter material is higher than that of liquid nitrogen, making it a material of extremely high practical value.
一方、最近の５ｉＶＬＳＩを始めとする高密度集積回路
素子の進歩は極めて著しい、加工の微細化と共に回路間
や素子間を接続する配線のＣＲ時定数が大きな問題とな
っている。もし、抵抗Ｒが極めて小さくなれば配線抵抗
に寄因する信号の遅延時間は小さくなり超高速素子が実
現できる。On the other hand, the recent progress in high-density integrated circuit elements such as 5iVLSI has been extremely remarkable, and with the miniaturization of processing, the CR time constant of wiring connecting circuits and elements has become a major problem. If the resistance R becomes extremely small, the signal delay time due to wiring resistance becomes small, and an ultra-high-speed device can be realized.
［発明が解決しようとする問題点］
ところが、超電導材料を直接半導体素子上に被着しＡＱ
配線を置換する場合、超電導材料がＢａ。[Problems to be solved by the invention] However, when superconducting materials are directly deposited on semiconductor elements, AQ
When replacing wiring, the superconducting material is Ba.
Ｃｕなどの金争元素を含むため素子が汚染される可能性
がある。Since it contains metallurgical elements such as Cu, there is a possibility that the element will be contaminated.
本発明の目的はかかる汚染が防止された超電導配線を有
する半導体装置を提供することにある。An object of the present invention is to provide a semiconductor device having superconducting wiring in which such contamination is prevented.
［問題点を解決するための手段］
上記目的は、超電導材料から成る配線回路素子を別途作
製し、半導体回路素子と接続することにより達成される
。[Means for Solving the Problems] The above object is achieved by separately manufacturing a wiring circuit element made of a superconducting material and connecting it to a semiconductor circuit element.
［作用］
本発明に係る半導体装置は、超電導材料からなる配線回
路が半導体素子の形成された部分とは別に形成されるた
め、半導体素子上に直接超電導材料を被着する必要がな
く、半導体素子が超電導材料により汚染されるおそれが
著しく低減される。[Function] In the semiconductor device according to the present invention, since the wiring circuit made of the superconducting material is formed separately from the part where the semiconductor element is formed, there is no need to directly deposit the superconducting material on the semiconductor element, and the semiconductor element The risk of contamination by superconducting materials is significantly reduced.
［実施例コ 以下、本発明の実施例について説明する。[Example code] Examples of the present invention will be described below.
（実施例１）
本実施例は超電導材料から成る回路素子基板と半導体回
路素子基板から構成された素子であり、第１図を用いて
以下説明する。(Example 1) This example is an element composed of a circuit element substrate made of a superconducting material and a semiconductor circuit element substrate, and will be described below with reference to FIG.
回路素子１は絶縁基板２上に公知の委トリソグラフィ技
術により作られる。この絶縁基板は通常のＩＣ用セラミ
ック基板でも良いが酸化したシリコン結晶基板の方が微
細な配線回路を作製したり回路素子と半導体素子の合わ
せには適している。The circuit element 1 is manufactured on an insulating substrate 2 by a known lithography technique. This insulating substrate may be an ordinary ceramic substrate for IC, but an oxidized silicon crystal substrate is more suitable for producing fine wiring circuits and for assembling circuit elements and semiconductor elements.
超電導材料として１例えばＹＢａ２Ｃｕ３Ｏ７を使う。For example, YBa2Cu3O7 is used as a superconducting material.
この場合、基板を加熱し、電子ビーム蒸着又はスパッタ
蒸看法により超電導薄膜を形成する。この後、Ｓｉ０ｇ
絶縁膜などとの組合せにより多層配線回路素子１をホト
リソグラフィ技術などに加工する。このような配線回路
により信号遅延時間が事実上ゼロとなる。一方、公知の
微細加工技術によりシリコン結晶基板３に形成された半
導体回路４を含む素子を接続バンプ５を観してこれに接
続する。In this case, the substrate is heated and a superconducting thin film is formed by electron beam evaporation or sputter evaporation. After this, Si0g
In combination with an insulating film, the multilayer wiring circuit element 1 is processed using photolithography technology or the like. With such a wiring circuit, the signal delay time becomes virtually zero. On the other hand, an element including a semiconductor circuit 4 formed on a silicon crystal substrate 3 by a known microfabrication technique is connected to the connection bump 5 while looking at the connection bump 5.
（実施例２）
本実施例は超電導材料から成る回路素子基板上に半導体
回路素子チップを載置した素子であり、第２図を用いて
以下説明する。(Example 2) This example is an element in which a semiconductor circuit element chip is placed on a circuit element substrate made of a superconducting material, and will be described below using FIG. 2.
超電導材料から成る回路素子１を絶縁基板２上に形成す
る。超電導材料の形成は蒸着でも低コストの印刷法でも
良い、ここでは後者について説明する。アルミナセラミ
ック基板上にＬａ２Ｏ３゜Ｃｕ Ｏと５ｒＯ３粉末とバ
インダーを混合してペーストを作製し印刷法でパターン
を形成する。その後、１１００℃で１０ｈｒ０２叶で焼
成する。他方、公知の微細加工技術によりシリコン結晶
基板３に半導体回路４を形成し、金属ワイヤ６で相互に
接続する。A circuit element 1 made of a superconducting material is formed on an insulating substrate 2. The superconducting material can be formed by vapor deposition or by a low-cost printing method, the latter of which will be described here. A paste is prepared by mixing La2O3°CuO, 5rO3 powder, and a binder on an alumina ceramic substrate, and a pattern is formed by a printing method. Then, it is fired at 1100℃ for 10 hours. On the other hand, a semiconductor circuit 4 is formed on a silicon crystal substrate 3 using a known microfabrication technique and interconnected with metal wires 6.
［発明の効果］
本発明によれば、極めて抵抗の小さい回路配線を超電導
材料により形成することができ、かっこの超電導材料に
よって半導体素子が汚染されるおそれが小さく、信頼性
の高い超高速素子を実現することが可能となる。[Effects of the Invention] According to the present invention, circuit wiring with extremely low resistance can be formed using a superconducting material, and there is little risk that semiconductor devices will be contaminated by the superconducting material in the parentheses, and highly reliable ultra-high-speed devices can be produced. It becomes possible to realize this.
第１図及び第２図は本発明の実施例の素子断面図である
。
１・・・回路素子、２・・・絶縁基板、３・・・半導体
基板、４・・・半導体回路、５・・・接続バンプ、６・
・・ワイヤ。FIGS. 1 and 2 are cross-sectional views of elements according to embodiments of the present invention. DESCRIPTION OF SYMBOLS 1... Circuit element, 2... Insulating substrate, 3... Semiconductor substrate, 4... Semiconductor circuit, 5... Connection bump, 6...
...Wire.
Claims (1)
体回路を有する素子と、上記配線回路を有する素子と上
記半導体回路を有する素子とを接続する部分から成るこ
とを特徴とする半導体装置。1. A semiconductor device comprising an element having a wiring circuit made of a superconducting material, an element having a semiconductor circuit, and a portion connecting the element having the wiring circuit and the element having the semiconductor circuit.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62093028A JPS63260062A (en) | 1987-04-17 | 1987-04-17 | Semiconductor device |
| KR1019880004259A KR880013253A (en) | 1987-04-17 | 1988-04-14 | Semiconductor devices |
| DE3812662A DE3812662A1 (en) | 1987-04-17 | 1988-04-15 | Semiconductor component with superconducting connections |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62093028A JPS63260062A (en) | 1987-04-17 | 1987-04-17 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63260062A true JPS63260062A (en) | 1988-10-27 |
Family
ID=14071038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62093028A Pending JPS63260062A (en) | 1987-04-17 | 1987-04-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63260062A (en) |
-
1987
- 1987-04-17 JP JP62093028A patent/JPS63260062A/en active Pending
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