JPS63258083A - Manufacture of superconductive material - Google Patents

Manufacture of superconductive material

Info

Publication number
JPS63258083A
JPS63258083A JP62093733A JP9373387A JPS63258083A JP S63258083 A JPS63258083 A JP S63258083A JP 62093733 A JP62093733 A JP 62093733A JP 9373387 A JP9373387 A JP 9373387A JP S63258083 A JPS63258083 A JP S63258083A
Authority
JP
Japan
Prior art keywords
region
superconducting
doped
impurity
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62093733A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP62093733A priority Critical patent/JPS63258083A/en
Priority to AU14573/88A priority patent/AU599223B2/en
Priority to CN88102320A priority patent/CN1018115B/en
Priority to EP88303404A priority patent/EP0287383B2/en
Priority to KR1019880004307A priority patent/KR910004994B1/en
Priority to DE3879536T priority patent/DE3879536T3/en
Publication of JPS63258083A publication Critical patent/JPS63258083A/en
Priority to US07/488,252 priority patent/US5098884A/en
Priority to US08/443,170 priority patent/US5877124A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/80Constructional details
    • H10N60/85Superconducting active materials
    • H10N60/855Ceramic superconductors
    • H10N60/857Ceramic superconductors comprising copper oxide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0296Processes for depositing or forming copper oxide superconductor layers
    • H10N60/0408Processes for depositing or forming copper oxide superconductor layers by sputtering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0661Processes performed after copper oxide formation, e.g. patterning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0884Treatment of superconductor layers by irradiation, e.g. ion-beam, electron-beam, laser beam or X-rays

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Abstract

PURPOSE:To be able to form an active region or a resistor of an active element out of an identical main component material by a method wherein a superconductive material or a basic material thereof formed on a substrate is selectively doped with impurity and the doped region is rendered to be a resistive or an active region. CONSTITUTION:A superconductive material or a basic material 2 thereof formed on a substrate 1 is selectively doped with impurity and the doped region 5 is rendered to be a resistive region 11 or an active region. For example, a material, which is turned into (YBa2)Cu3O6-8 after being formed into film, is provided on an insulating substrate 1 formed of single crystal SrTiO3 through sputtering for the formation of a basic material for a superconductive material and annealed at temperature of 800-1000 deg.C in oxygen so as to be regenerated into a single-crystal superconductive material 2. Photoresist 3 is selectively coated onto the upper face of the superconductive material 2 and a region 5 not coated with resist is doped with silicon by means of ion-implantation 4. Thereafter calcination is performed at temperature of 700-1000 deg.C in oxidizing atmosphere so as to transfer Tco of an ion-implanted region 11 to lower temperature side, and the impurity doped region 11 is used as a resistive region.

Description

【発明の詳細な説明】 「発明の利用分野」 本発明は、超電導セラミックスを用いて機能素子を作製
するため、選択的に不純物を添加し、この添加領域を抵
抗領域または活性領域として作製する方法に関する。
Detailed Description of the Invention "Field of Application of the Invention" The present invention provides a method of selectively adding impurities to fabricate a functional element using superconducting ceramics, and fabricating this doped region as a resistance region or an active region. Regarding.

本発明は超電導セラミックスを用いた機能素子を同一基
板上に集積化せしめんとするに際し、1つの素子におけ
る活性領域または抵抗素子を選択的に有せしめんとする
ものである。
The present invention is intended to selectively provide an active region or a resistive element in one element when functional elements using superconducting ceramics are integrated on the same substrate.

「従来の技術」 従来、超電導材料はNb、Ge等の金属材料が用いられ
てきた。しかしこれらのTco(抵抗が零となる温度)
は23にと低く、実用化には高価な維持費用が必要であ
った。
"Prior Art" Conventionally, metal materials such as Nb and Ge have been used as superconducting materials. However, these Tco (temperature at which resistance becomes zero)
was as low as 23, and high maintenance costs were required for practical use.

これに対し、近年セラミック系の超電導材料が注目され
ている。この材料は最初IBMのチューリッヒ研究所よ
りBa−La−Cu−0(バラク式)系酸化物超電導体
として報告されている。
In contrast, ceramic-based superconducting materials have attracted attention in recent years. This material was first reported by IBM's Zurich Research Institute as a Ba-La-Cu-0 (barak type) oxide superconductor.

しかし、これらの酸化物セラミック超電導体はバルクの
タブレフトを構成せしめたのみであった。
However, these oxide ceramic superconductors only constituted a bulk table left.

また従来より知られていた金属超電導体に関しては、金
属材料であるため、たとえ基板上に薄膜構成せしめ得て
も、ジョセフソン素子等の機能素子を複数ケ作らんとし
た時、その機能素子の活性領域または抵抗素子等のシス
テム全体を一定温度(例えば液体窒素温度)で動作させ
る際に、それぞれの素子にもっとも必要なTcoまたは
Tcオンセントを人為的に制御せんとする試みはまった
くなかった。
Furthermore, since conventionally known metal superconductors are metal materials, even if they can be formed into thin films on a substrate, when trying to fabricate multiple functional elements such as Josephson elements, it is difficult to When operating the entire system, such as the active region or resistive elements, at a constant temperature (e.g., liquid nitrogen temperature), there was no attempt to artificially control the most desired Tco or Tc onset for each element.

「従来の問題点」 かかる従来技術においては、基板上に薄膜形成をさせ、
所定の動作温度で抵抗零となる超電導体をリードとして
用いるに加えて、系全体としては抵抗、アクティブ素子
を作らなければならない。
"Conventional Problems" In such conventional technology, a thin film is formed on a substrate,
In addition to using a superconductor that has zero resistance at a given operating temperature as a lead, resistors and active elements must be made for the entire system.

しかしこれまでは単にTcoを高くさせればそれだけで
すべてが解決されるかの如き研究のみがなされている。
However, until now, only research has been conducted that seems to solve everything by simply increasing Tco.

本発明人は特に酸化物超電導材料にあっては、従来より
知られた金属超電導材料とはまったく異なる方式をさせ
る可能性を見出した。
The inventors of the present invention have discovered the possibility of using oxide superconducting materials in a manner completely different from that of conventionally known metal superconducting materials.

本発明はかかる目的を満たすものである。The present invention satisfies these objectives.

「問題を解決すべき手段」 本発明は酸化物超電導材料(単結晶または多結晶)に対
して、特に有効である。この酸化物は酸化せしめること
により超電導を呈する条件を有するもので、さらにこの
酸化物条件下において、Tc。
"Means to Solve the Problem" The present invention is particularly effective for oxide superconducting materials (single crystal or polycrystal). This oxide has conditions that exhibit superconductivity when oxidized, and furthermore, under this oxide condition, Tc.

を変化(−最にはTcオンセットはあまり変わらず、T
coは下がる傾向を有する)せしめ得ることを実験的に
見出した。このTcoの変化量は超電導材料またはその
出発材料に対し、不純物を選択的に添加することにより
この添加された領域のみのTc。
(−At the end, Tc onset does not change much, and T
It has been experimentally found that the co. The amount of change in Tco can be determined by selectively adding impurities to the superconducting material or its starting material, thereby increasing the Tc only in the added region.

を下げることができることを見出した。We found that it is possible to lower the

この領域はTcオンセットとTcoとの間の温度範囲を
もつ、いわゆる有限の抵抗を持つ超電導領域(遷移領域
ともいう)を多くさせることができる。
This region can have many superconducting regions (also called transition regions) with so-called finite resistance, which have a temperature range between Tc onset and Tco.

さらにTcオンセントよりも高い温度領域である非超電
導領域をも人為的に制御し得た。
Furthermore, it was also possible to artificially control the non-superconducting region, which is a temperature region higher than Tc oncent.

本発明は、単結晶または多結晶(セラミックス)の超電
導材料であって、その分子式は、例えば、(AI−X 
Bx)ycuzow  x = O〜1+ y = 2
〜4好ましくは2.5〜3.5.2 =1.0〜4.0
好ましくは1.5〜3,5゜w=4.0〜10.0好ま
しくは6〜8の式で一般に示し得るものを用いた。この
式において、Aは元素周期表のma族における1種類ま
たは複数種類の元素であり、例えばイットリューム(Y
)またはランタノイドである。Bは元素周期表ma族の
1種類または複数種類の元素よりなり、例えばバリュー
ム(Ba)である。
The present invention relates to a single-crystal or polycrystalline (ceramic) superconducting material, the molecular formula of which is, for example, (AI-X
Bx) ycuzow x = O~1+ y = 2
~4 preferably 2.5~3.5.2 = 1.0~4.0
Preferably 1.5 to 3.5 degrees w = 4.0 to 10.0, preferably those that can be generally represented by the formula 6 to 8 were used. In this formula, A is one or more elements in the ma group of the periodic table of elements, such as yttrium (Y
) or lanthanoids. B is composed of one or more elements of the Ma group of the periodic table of elements, and is, for example, barium (Ba).

そして本発明に用いる超電導セラミックスは添加される
不純物はすべて1100PP好ましくはIOPPM以下
になるように出発材料、製造プロセスを注意した。
In the superconducting ceramic used in the present invention, the starting materials and manufacturing process were carefully selected so that all impurities added were 1100 PP, preferably IOPPM or less.

本発明はかかる一般式で示される単結晶または多結晶の
薄膜(一般的には0.1〜30μ…の厚さを有する)を
絶縁表面を有する基板上に形成する。
In the present invention, a single crystal or polycrystalline thin film (generally having a thickness of 0.1 to 30 .mu.m.) represented by the general formula is formed on a substrate having an insulating surface.

そしてジョセフソン素子等の能動(アクティブ)素子、
抵抗等の受動(パッシブ)素子とするところ以外の不要
部分を公知のフォトリソグラフィ法により除去した。さ
らにこの残された超電導材料またはその出発材料のうち
の電極・リードとなる部分に対してはそのままマスクを
残し、または新たなマスクを配設し、有限抵抗とすべき
領域のみに対し、マスクを除去した。そしてこのマスク
のない領域のみイオン注入法により不純物を添加した。
and active elements such as Josephson elements,
Unnecessary parts other than passive elements such as resistors were removed by a known photolithography method. Furthermore, for the parts of the remaining superconducting material or its starting material that will become electrodes and leads, leave the mask as it is, or place a new mask, and apply the mask only to the area that should have finite resistance. Removed. Then, impurities were added to only the region without this mask by ion implantation.

このイオン注入法により結晶構造に損傷を受けるため、
この後熱処理を施した。不純物としてはアルミニューム
(AI)、マグネシューム(Mg) 、ガリューム(G
a)、珪素(Si)、ゲルマニューム(Ge) 。
Because this ion implantation method damages the crystal structure,
After this, heat treatment was performed. Impurities include aluminum (AI), magnesium (Mg), and gallium (G).
a), silicon (Si), germanium (Ge).

チタン(Ti)、  ジルコニューム(Zr)、鉄(F
e)−ニッケル(Ni)、コバルト(Co) 、ホウ素
(B)、リン(P)をその代表例とし、うち1種類また
は複数種類を用いている。
Titanium (Ti), zirconium (Zr), iron (F
e) -Nickel (Ni), cobalt (Co), boron (B), and phosphorus (P) are representative examples, and one or more of these are used.

またこの不純物は5 Xl0IS〜I XIO”ケ/c
m’の量を注入添加した。この添加量は予め形成されて
いる超電導材料またはその出発材料中に不本意に混入し
てしまっている不純物よりも多い量、または異なる種類
の不純物を添加する。
Moreover, this impurity is 5 Xl0IS~I XIO”ke/c
An amount of m' was added by injection. This addition amount is greater than or a different type of impurity than the impurity that has been inadvertently mixed into the preformed superconducting material or its starting material.

さらにこの後マスク材料を除去した後、700〜100
0℃の温度で酸化せしめ、この不純物の酸化物を添加領
域でアニールにより構成せしめ、Tcoの可変制御を行
った。その結果、かかる不純物が添加されていない領域
は、電極、リードとし、添加された領域を活性領域また
は抵抗領域とすることが可能となった。
Furthermore, after removing the mask material, 700 to 100
Oxidation was carried out at a temperature of 0° C., and an oxide of this impurity was formed in the added region by annealing to perform variable control of Tco. As a result, it has become possible to use the regions to which such impurities are not added as electrodes and leads, and the regions to which such impurities are added to serve as active regions or resistance regions.

特にこのイオン注入後の熱アニール(好ましくは酸化性
又は不活性雰囲気での熱アニール)は、添加された不純
物の酸化により理論的に超電導特性の妨害をし、不純物
添加による超電導抵抗の有限領域および非超電導領域と
を形成させた。
In particular, thermal annealing after this ion implantation (preferably thermal annealing in an oxidizing or inert atmosphere) can theoretically disturb superconducting properties due to oxidation of the added impurities, and reduce the finite region of superconducting resistance due to the addition of impurities. A non-superconducting region was formed.

「作用」 かくして絶縁性表面を有する基板上に設けられた単結晶
または多結晶の酸化物超電導体の上面と概略同一の高さ
を有する有限抵抗領域をこの抵抗零の超電導領域に隣接
して設けることが可能となった。
"Operation" Thus, a finite resistance region having approximately the same height as the top surface of a single crystal or polycrystalline oxide superconductor provided on a substrate having an insulating surface is provided adjacent to this zero resistance superconducting region. It became possible.

またこの基板を絶縁表面を有するシリコン半導体とした
場合、その相互配線用のリード、電極を超電導材料で行
い、それに連結して抵抗を作ることが可能となった。
Furthermore, when this substrate is made of a silicon semiconductor with an insulating surface, it has become possible to make the interconnection leads and electrodes of a superconducting material and connect them to create a resistor.

以下に実施例に従い本発明を説明する。The present invention will be described below with reference to Examples.

「実施例1」 本発明の実施例として、単結晶の酸化物超ft導体を用
いた。即ち、絶縁性単結晶基板例えばチタン酸ストロン
チューム(SrTi(h)上にスパッタ法による成膜方
法を利用して単結晶111iを形成した。
"Example 1" As an example of the present invention, a single crystal oxide super-ft conductor was used. That is, a single crystal 111i was formed on an insulating single crystal substrate such as strontium titanate (SrTi(h)) using a film forming method using a sputtering method.

低周波のスパッタ装置のターゲットに成膜後で例えば(
YBaz)CulI06〜Bとした。そして後工程で添
加される不純物が少なくとも1100PP以下の量しが
添加されていない出発材料を用いた。この基板上を70
0〜1000℃例えば850℃に加熱した。そしてこの
ターゲットをスパッタして基板上に酸化物セラミックス
を成長させた。雰囲気はアルゴン−酸素の混合ガスを用
いた。
For example, after forming a film on the target of a low-frequency sputtering device (
YBaz)CulI06-B. Then, a starting material was used in which no impurities added in a subsequent step were at least 1100 PP or less. 70 on this board
It was heated to 0 to 1000°C, for example 850°C. This target was then sputtered to grow oxide ceramics on the substrate. The atmosphere used was a mixed gas of argon and oxygen.

かくして基板上に0.1〜1μmの膜厚の酸化物材料を
作製した。かくして超電導材料の出発材料を形成せしめ
た。
In this way, an oxide material having a thickness of 0.1 to 1 μm was formed on the substrate. The starting material for the superconducting material was thus formed.

これを酸素中に800〜1000’Cにて5〜50時間
アニールした。するとこの薄膜を単結晶の超電導材料と
して変成することができた。
This was annealed in oxygen at 800-1000'C for 5-50 hours. They were then able to transform this thin film into a single-crystal superconducting material.

第3図における曲線(2o)はかがるセラミックスの温
度−比抵抗特性である。図面において、Tc。
Curve (2o) in FIG. 3 is the temperature-resistivity characteristic of the ceramic. In the drawings, Tc.

(22)、Tcオンセソ) (21)、遷移領域(超電
導をしつつも有限抵抗をもつ領域)(23)よりなる。
(22), Tc ONCESO) (21), and a transition region (a region that is superconducting but has finite resistance) (23).

かくして第1図(A)に示すように、基板(1)上に酸
化物超電導材料(2)を作製した。この後この上面にフ
ォトレジスト(3)を選択的にコーティングをした。
Thus, as shown in FIG. 1(A), an oxide superconducting material (2) was produced on the substrate (1). Thereafter, a photoresist (3) was selectively coated on the upper surface.

第1図(B)に示す如く、このレジストの形成されてい
ない領域(5)に対し、珪素を5X10”〜lX10”
ケ/cm3、例えば5X10′9ケ/cm3の濃度でイ
オン注入法(4)により添加した。
As shown in FIG. 1(B), a silicon layer of 5×10” to 1×10” is applied to the region (5) where no resist is formed.
It was added by ion implantation method (4) at a concentration of, for example, 5×10'9 cells/cm3.

この後これら全体を再び酸化性雰囲気で700〜100
0℃の温度で加熱焼成した。するとレジスト(3)も炭
酸ガス、水等となり気化して除去させてしまうに加えて
、イオン注入をした領域(11)では注入された珪素が
酸化物(S10□またはその変成物)の約0.1χ添加
され、その主成分(この場合は99%程度)を抵抗零の
超電導を呈する領域(10) (特性は第3図(24)
)  と同一とさせることができた。
After this, the whole was heated again to 700 to 100 in an oxidizing atmosphere.
It was heated and baked at a temperature of 0°C. Then, the resist (3) also becomes carbon dioxide gas, water, etc. and is vaporized and removed. In addition, in the ion-implanted region (11), the implanted silicon becomes about 0% of the oxide (S10□ or its modified product). .1χ is added, and its main component (approximately 99% in this case) exhibits zero resistance superconductivity (10) (Characteristics are shown in Figure 3 (24)
) could be made to be the same as

この不純物が添加された酸化物セラミックスの温度−比
抵抗の特性は第3図(20’)となっている。
The temperature-resistivity characteristic of the oxide ceramic to which this impurity has been added is shown in FIG. 3 (20').

即ち不純物の添加によりTco (22)はTco’ 
(22°)へ変化し、遷移領域(23)は(23”)と
大きくなり、移動温度ここては液体窒素温度(25)に
て有限の抵抗(26)を有することがわかる。さらにこ
の低温側への移動はイオン注入法により添加された不純
物の量により制御し得る。
That is, due to the addition of impurities, Tco (22) becomes Tco'
(22°), the transition region (23) becomes large (23"), and it can be seen that it has a finite resistance (26) at the moving temperature, which is the liquid nitrogen temperature (25). Furthermore, at this low temperature The lateral movement can be controlled by the amount of impurities added by ion implantation.

この不純物添加領域(11)は以後の700〜1000
”Cの高温処理工程等においても初期の超電導セラミッ
クスのTcoに比べて引き続き低いTco”を保持して
いた。
This impurity doped region (11) is
Even in the high-temperature treatment process of C, it continued to maintain a lower Tco than that of early superconducting ceramics.

「実施例2」 第2図に本発明の実施例を示す。"Example 2" FIG. 2 shows an embodiment of the present invention.

図面において、基板(1)はトランジスタ等が設けられ
、半導体基板である。その一部表面は電極用の開穴(7
)を有し、他の表面は絶縁膜、例えば窒化珪素(9)を
その上表面に有する絶縁膜(6)である。半導体(1)
と窒化珪素(9)との間の絶縁膜(8)は酸化珪素であ
る。
In the drawings, a substrate (1) is provided with transistors and the like and is a semiconductor substrate. Part of its surface has holes for electrodes (7
), and the other surface is an insulating film (6) having an insulating film, for example silicon nitride (9), on its upper surface. Semiconductor (1)
The insulating film (8) between the and silicon nitride (9) is silicon oxide.

これらの上面に実施例1と同様のスパッタ法により酸化
物超電導材料を形成した。公知のフォトリソグラフィ技
術により電極、リードおよび抵抗とする部分のパターニ
ングを行った。さらに選択的に不純物をイオン添加、注
入し、有限の抵抗領域(11)を実施例1に従って作製
した。これに連結した抵抗零の超電導領域(10) 、
 (10’)によりこの領域−は電気的に他と連結され
ている。かくして液体窒素温度(77K)において抵抗
が零のリード、電極領域(10)と、有限の抵抗を有す
る領域(11)とを構成させた。
An oxide superconducting material was formed on these upper surfaces by the same sputtering method as in Example 1. Patterning of electrodes, leads, and portions to be resistors was performed using a known photolithography technique. Furthermore, impurity ions were selectively added and implanted to produce a finite resistance region (11) according to Example 1. A superconducting region (10) with zero resistance connected to this,
(10') electrically connects this region to others. In this way, a lead/electrode region (10) with zero resistance at liquid nitrogen temperature (77 K) and a region (11) with finite resistance were constructed.

この酸化物超電導材料は多結晶(セラミックス)であっ
た。
This oxide superconducting material was polycrystalline (ceramic).

この実施例は、さらにこの上面に第2の絶縁膜(9″)
を窒化珪素により形成し、凹部を他の絶縁物(12)で
埋置した。そして開穴(7゛)を形成した後、再び実施
例1と同様に超電導材料を形成し、フォトリソグラフィ
技術を用いてパターニングをし、電極、リード(13)
を構成せしめた。
This embodiment further includes a second insulating film (9″) on this upper surface.
was formed of silicon nitride, and the recess was filled with another insulator (12). After forming an opening (7゛), a superconducting material is formed again in the same manner as in Example 1, and patterned using photolithography to form electrodes and leads (13).
was constructed.

かくして多層配線を半導体集積回路基板上に形成するこ
とができた。
In this way, multilayer wiring could be formed on the semiconductor integrated circuit board.

「効果」 本発明は、これまで超電導材料を単に抵抗が零のリード
としてのみ用いられていたことに対し、かかる強電導材
料に対し不純物を添加し、Tcoを初期状態より移し、
所望の動作温度(例えば液体窒素温度)にて所望のを限
の抵抗を有すべく制御した。
"Effects" In contrast to the conventional use of superconducting materials only as leads with zero resistance, the present invention adds impurities to such strong conductive materials to shift Tco from its initial state.
It was controlled to have a desired resistance at a desired operating temperature (eg, liquid nitrogen temperature).

かくしてこの応用としてアクティブ素子の活性領域(即
ち絶縁ゲイト型電界効果半導体装置におけるチャネル形
成領域またはボイボーラトランジスタにおけるベース領
域)また抵抗等を同一主成分材料で作ることが可能とな
り、それぞれの領域の上面を概略同一表面を構成させ得
、多層配線が可能となった。
Thus, as an application of this method, it is possible to make the active region of an active element (i.e., the channel forming region in an insulated gate field effect semiconductor device or the base region of a Voi Bora transistor), the resistor, etc. with the same main component material, and the top surface of each region can be made from the same main component material. can be configured on roughly the same surface, making multilayer wiring possible.

本発明において、酸化物超電導材料の作製方法としてス
パッタ法のみならず、印刷法、MBE (分子エピタキ
シャル成長)法、気相法を用いることも可能である。
In the present invention, it is possible to use not only the sputtering method but also the printing method, the MBE (molecular epitaxial growth) method, and the vapor phase method as a method for producing the oxide superconducting material.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の不純物の添加方法の作製工程を示す。 第2図は本発明の実施例を示す。 第3図は本発明で得られた超電導材料の特性を示す。 (C) 老lω ヱ2(] FIG. 1 shows the manufacturing steps of the impurity addition method of the present invention. FIG. 2 shows an embodiment of the invention. FIG. 3 shows the characteristics of the superconducting material obtained by the present invention. (C) old lω E2(]

Claims (1)

【特許請求の範囲】 1、基板上に形成された超電導材料またはその出発材料
に対し選択的に不純物を添加し、該添加領域を抵抗領域
または活性領域とせしめたことを特徴とする超電導材料
の作製方法。 2、特許請求の範囲第1項において、不純物をイオン注
入法により添加した後、加熱処理をすることにより前記
添加領域を抵抗零の超電導特性を有する領域に連結され
た有限の抵抗を有する超電導領域または非超電導領域と
して形成することを特徴とする超電導材料の作製方法。
[Claims] 1. A superconducting material characterized in that an impurity is selectively added to a superconducting material formed on a substrate or a starting material thereof, and the doped region is made to be a resistance region or an active region. Fabrication method. 2. In claim 1, there is provided a superconducting region having a finite resistance in which impurities are added by ion implantation and then heat treatment is performed to connect the doped region to a region having superconducting characteristics of zero resistance. Alternatively, a method for producing a superconducting material, characterized in that it is formed as a non-superconducting region.
JP62093733A 1987-04-15 1987-04-15 Manufacture of superconductive material Pending JPS63258083A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP62093733A JPS63258083A (en) 1987-04-15 1987-04-15 Manufacture of superconductive material
AU14573/88A AU599223B2 (en) 1987-04-15 1988-04-13 Superconducting ceramic pattern and its manufacturing method
CN88102320A CN1018115B (en) 1987-04-15 1988-04-15 Supperconducting ceramic pattern and its manufacturing method
EP88303404A EP0287383B2 (en) 1987-04-15 1988-04-15 Superconducting ceramic film and a method of manufacturing the same
KR1019880004307A KR910004994B1 (en) 1987-04-15 1988-04-15 Superconducting ceramic pattern and its manufacturing method
DE3879536T DE3879536T3 (en) 1987-04-15 1988-04-15 Superconducting ceramic film and process for its production.
US07/488,252 US5098884A (en) 1987-04-15 1990-03-05 Method for producing a superconducting pattern by doping impurities
US08/443,170 US5877124A (en) 1987-04-15 1995-05-17 Superconducting ceramic pattern and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62093733A JPS63258083A (en) 1987-04-15 1987-04-15 Manufacture of superconductive material

Publications (1)

Publication Number Publication Date
JPS63258083A true JPS63258083A (en) 1988-10-25

Family

ID=14090611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62093733A Pending JPS63258083A (en) 1987-04-15 1987-04-15 Manufacture of superconductive material

Country Status (1)

Country Link
JP (1) JPS63258083A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63265473A (en) * 1987-04-23 1988-11-01 Agency Of Ind Science & Technol Manufacture of superconducting electronic circuit
JPS63265474A (en) * 1987-04-23 1988-11-01 Agency Of Ind Science & Technol Manufacture of superconductng electronic circuit
JPS6461321A (en) * 1987-08-31 1989-03-08 Kyocera Corp Oxide based superconductor and production thereof
US5229360A (en) * 1989-07-24 1993-07-20 The Furukawa Electric Co., Ltd. Method for forming a multilayer superconducting circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5873172A (en) * 1981-10-27 1983-05-02 Nippon Telegr & Teleph Corp <Ntt> Superconductive integrated circuit device
JPS5873712A (en) * 1981-10-27 1983-05-04 Nippon Steel Corp Recovering method for waste gas of top and bottom blown converter without combustion

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5873172A (en) * 1981-10-27 1983-05-02 Nippon Telegr & Teleph Corp <Ntt> Superconductive integrated circuit device
JPS5873712A (en) * 1981-10-27 1983-05-04 Nippon Steel Corp Recovering method for waste gas of top and bottom blown converter without combustion

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63265473A (en) * 1987-04-23 1988-11-01 Agency Of Ind Science & Technol Manufacture of superconducting electronic circuit
JPS63265474A (en) * 1987-04-23 1988-11-01 Agency Of Ind Science & Technol Manufacture of superconductng electronic circuit
JPS6461321A (en) * 1987-08-31 1989-03-08 Kyocera Corp Oxide based superconductor and production thereof
US5229360A (en) * 1989-07-24 1993-07-20 The Furukawa Electric Co., Ltd. Method for forming a multilayer superconducting circuit

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