JPS63251962A - Signal processor - Google Patents

Abstract

PURPOSE:To reduce the dropout of signals stored in a memory, by detecting the dropout quantities of the signals stored in the memory and supplied signals and causing rewriting to be performed in accordance with the compared results of the quantities with each other. CONSTITUTION:Horizontal synchronizing signals 28, vertical synchronizing signals 30, and dropout pulses 32 are supplied to a memory controlling circuit 46 which controls a memory circuit 36 from a reproduction processing circuit 22. From a dropout, for example, the envelope of input signals can be detected. The reproduction processing circuit 22 monitors the number of dropouts (DO number) of the same picture signal continuously sent from a reproducing amplifier 20 and sends its minimum value to a CPU 12 as the DO number signals of recording signals. Therefore, even when the dropout temporarily or suddenly increases in the supplied signals, the increase is automatically detected by a comparing means and memory freeze is retried. As a result, the optimum data can be stored in a memory.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal processing device, and for example, to a signal processing device that processes a reproduced image signal from a recording medium.

[Conventional technology and its problems]

2. Description of the Related Art Devices that record images on magnetic tapes, magnetic disks, optical disks, etc. and reproduce them as needed have become widespread. It has been proposed to transmit the reproduced video signal to a remote location or another device for various uses. An example of such systemization is an electronic still camera. In such an image transmission system, there is an opportunity for signal loss at each stage of the transmission system, transmission path, and reception system.
Therefore, it is necessary to keep the quality of the signal, specifically the dropout, as low as possible at the transmission stage.

However, signal dropouts occur in the playback circuit included in the transmission system, specifically in the playback head, due to environmental dust, etc., and the frame memory or field memory used as the transmission buffer memory is Video signals that are temporarily stored tend to have more dropouts than video signals that are stored on a recording medium. There is also a method of checking the contents of the transmission buffer memory by displaying it on a monitor device, but this requires a monitor device of a certain level of quality, and it is required to be simple and lightweight. However, as the quality of recorded images increases, which is not desirable in electronic still cameras, there are limits to such confirmation by the human eye.

Such problems are not limited to the above-mentioned electronic still camera system, but can generally occur in signal processing devices that store signals in memory. Therefore, a first object of the present invention is to provide a signal processing device that can minimize the dropout of signals stored in a memory. For this purpose, the present invention compares the number of dropouts of the supplied signal with the number of dropouts of the signal stored in memory, and automatically retries playback when the difference is greater than or equal to a predetermined value. Another object of the present invention is to provide an image reproducing device that performs the following operations.

[Means for solving problems]

A signal processing device according to the present invention is a signal processing device that stores a supplied signal in a memory, and includes a holding means for retaining a dropout amount of the signal stored in the memory, and a dropout amount of the supplied signal. The present invention is characterized by comprising a detection means for detecting the amount, and a control means for causing rewriting to the memory based on a comparison result between a value held by the holding means and a detected value by the detection means.

[Effect]

Even if the supplied signal temporarily or suddenly increases dropout for some reason, the comparison means will automatically detect this and retry the memory freeze, so the optimal data will be stored in the memory. can.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an example of a circuit when the method of the present invention is applied to a still image transmission device. On the magnetic sheet 10, video signals of one field are recorded forming concentric tracks. The magnetic sheet 10 is rotationally driven by a motor 15 controlled by a motor drive circuit 14 . Motor drive circuit 14 is also controlled by CPU 12. 16A
, 16B are playback heads, for example in-line heads, which perform field playback or frame playback.The playback head 16A is connected to the A terminal of the switch 18, and the playback head 16B is connected to the B terminal of the switch 18. . The switch 18 is switched by a switching signal from the CPU 12. The output of the switch 18 is supplied to a reproduction process circuit 22 via a reproduction amplifier 20, and the reproduction process circuit 22 receives a reproduction luminance signal (Y) 24, a line sequential color signal (R
/B) 26. Horizontal sync signal (Is) 28. Vertical sync signal '<VS) 30. Dropout pulse (DOP) generated in response to lack of playback envelope 32.
, a signal 34 indicating whether the reproduced video signal is color or monochrome, and a signal 35 indicating the number of dropouts of the recording signal of the magnetic sheet 10 (the details will be described later, but hereinafter referred to as the number of DOs).
form.

The head drive circuit 19 positions the heads 16A, 16B on the inside or outside of the magnetic sheet 10 in the radial direction according to a control signal from the CPU 12.

The reproduced luminance signal 24 and line sequential color signal 26 from the reproduction process circuit 22 are temporarily stored in a memory circuit 36, and the reproduced luminance signal 24 is sent to an adder 38 for video monitoring.
It is also supplied to the monitor device 40 via. The adder 38 is supplied with a font pattern signal 44 from a character generator 42 in order to superimpose a display such as a trunk number on the image displayed on the monitor device 40 . This character generator 42 outputs a font pattern signal 44 of a specified character under the control of the CPU 12. The memory circuit 36 also includes two field memories M, , M, as described later.

Equipped with.

41 is an NTSC signal generator that forms an NTSC signal from the output of the adder 38 and the line sequential color signal 26 of the reproduction process circuit 22;
It is an encoder, and its output signal is supplied to the output terminal 43. This NTSC encoder 41 is an NTSC encoder to be described later.
Depending on whether the C switch 83 is turned on or off, the CPU 12 puts it into an active state or a non-active state.

A memory control circuit 46 that controls the memory circuit 36 is supplied with a horizontal synchronization signal 28, a vertical synchronization signal 30, and a dropout pulse 32 from the reproduction process circuit 22.

Dropouts can be detected, for example, in the envelope of the input signal. 48 is an address bus, 50 is a data bus,
52 is a control line. A magnetic piece (not shown) is fixed to the magnetic sheet 10 for detecting the rotational phase, and the magnetic head 54 reads it. The amplifier 56 amplifies the output signal (PG pulse) of the magnetic head 54, and the output of the amplifier 56 is used as feedback to the motor drive circuit 14 to control the rotational phase of the magnetic sheet 10. 46 and is used to control the memory circuit 36.

Memory control circuit 46 also connects to CPU 12 via control line 58, data bus 60, and address bus 62. The playback video signal written from the playback process circuit 22 to the memory circuit 36 is sent to the CPUI via the data bus 50, memory control circuit 46, and data bus 60.
2, and the CPU 12 sends the video data to the transmission circuit 64. The transmission circuit 64 converts the input video data into a signal form suitable for transmission (AM, FM, etc.) and sends it out to the transmission path from the output terminal 66.

Various switches for specifying the operation of the CPU 12 are connected to the CPtJ12. Up switch 6
8 instructs the playback heads 16A, 16B to move in the direction of increasing track numbers, and the down switch 70 instructs them to move in the direction of decreasing track numbers. Reference numeral 72 denotes a start switch for a transmission operation that sends out the reproduced video signal written in the memory circuit 36 from the output terminal 66. 74
is a transmission stop switch for stopping transmission in the middle of transmission. 76, 78, and 80 are switches for specifying the transmission mode; closing switch 76 specifies monochrome field transmission, closing switch 78 specifies monochrome frame transmission, and closing switch 80 specifies monochrome frame transmission. specifies color field transmission. switch 76.78.8
Only one of the zeros should be closed. The switch 82 is for selecting the playback mode (field playback or frame playback), and the CPtJ 12 accordingly selects whether to continuously connect the switch 18 to either the A terminal or the B#1 child. Or alternately switch every l field. 83 is a switch for specifying activation or non-activation of the NTSC encoder 41;

It is Chi. It goes without saying that some of these switches 68-83 may be replaced by corresponding flag variables under program control.

The reproduction process circuit 22 monitors the number of dropouts (specifically, the number of lines with dropouts) of the same image signal that is continuously sent from the reproduction amplifier 20, and sets the minimum value to the Do of the recording signal. The signal is multiplied by 35 and sent to the CPU 12. By the way, this is it.

The number may be the number of dropout pixels, the number of areas where dropouts are present, etc., as will be described later.

84 is a transmission busy LED that lights up or blinks when a signal is sent out from the transmission circuit 64 to the transmission path; 86 is a transmission busy LED;
This is a Do warning LED that blinks or lights up when there is a predetermined dropout or more in the image data in the memory circuit 36.

FIG. 2 shows an example of the configuration of a Do number ratio calculation circuit in the reproduction process circuit 22. This Do number ratio calculation circuit counts the number of lines in which dropouts exist.

The Doo output circuit 100 generates a dropout pulse when detecting dropout of the reproduced image signal. D
Flip-flop 102 is clocked by its dropout pulse and the Q output becomes old gh. This Q output causes the NAND gate 104 to output the horizontal synchronizing pulse H19.
, is inverted and applied to the clock input of the counter 106. This causes the counter 106 to count up.

At the same time, the horizontal synchronizing pulse Hmyac resets the D flip-flop 102. In this way, the counter 10
6 counts the number of lines in which dropout of the reproduction signal from the reproduction amplifier 20 occurs.

The latch circuit 108 is a circuit that holds the minimum number of dropouts of reproduction signals (i.e., the same recorded signal) from the same trunk of the magnetic sheet 10, and is reset (actually preset to a default value) according to the trunk feed signal. There is. Comparison circuit 110 compares the counted value of counter 106 and the held value of launch circuit 108, and when the counted value of counter 106 is smaller, connects the output of switch 112 to the input of latch circuit 108, and vice versa. If the count values of are equal or larger, the output of the latch circuit 108 is connected to its input. Note that vertical synchronization pulses V sy, , c are applied to the clock terminal for input operation of the latch circuit 108, and are triggered by the fall of the pulses. The output of the launch circuit 108 is sent to the CPU 12 as a Do number signal.

FIGS. 3A and 3B generally show a routine for starting and ending head feeding and transmission operations. When the power is turned on, the transmission flag TX.

FLG is reset to "0" and the transmission busy LED 84 and DO warning LED 86 are turned off (33-1.2).The transmission flag TX and FLG are "1" during transmission, and "O" when not transmitting. Although not shown in FIG. 1, the presence or absence of the magnetic sheet 10 is detected from the output of a known loading detection device that detects whether the magnetic sheet 10 is loaded. Set IN and FLG to "1" (S3-3.4). When IN and PLG are sent, the magnetic sheet 10 has already been taken out, so the heads 16A and 16B are set to the innermost or outermost circumference. The heads 16A and 16B are moved to the reference position on the outer periphery and repositioned (S3-6).

Depending on whether the amplifier switch 68 or the down switch 70 is pressed (S3-7.8), the heads 16A and 16 are moved in the direction of increasing/decreasing track numbers, respectively.
B is sent (33-9, 11), and the track number held in the CPU 12 is incremented/decremented (S3-10.12). At this time, as the playback mode, either field playback or frame playback is selected according to the mode selection switch 82. Also, in step S3-10.12, the track number is incremented/
In response to the decrement, the display trunk number data of the character generator 42 is also changed in order to update the display of the track number on the monitor device 40.

According to the on/off state of the NTSC switch 83, the NTSC encoder 41 is activated or deactivated (S3-
13.14.15).

In the next step S3-16 (Fig. 3B), the transmission flags TX and FLG are checked, and if they are '0', that is, the non-transmission state, the process branches to step S3-17 and below, and if it is '1', that is, the transmission state, the process branches to step S3. -Branch to below 23.

In step S3-17, it is checked whether the transmission start switch 72 has been pressed, and if it has been pressed, the reproduction mode determined by the reproduction mode switch 82 and the transmission mode switch 7
6.78. ．． According to the transmission mode selected by 80,
A predetermined signal is frozen in the memory circuit 36 and refrozen depending on the Do number of image data in the memory circuit 36 (S3-18).

Note that details of this step S3-18 will be described later. In this embodiment, the two field memories Mo and M+ of the memory circuit 36 each have a capacity of 640 pixels in the horizontal direction and 256 horizontal scanning lines. Basically, the memory M0 stores the luminance signal Y, and the memo 'JMI stores the luminance signal or the color line sequential signal R/B.

When the reproduction mode switch 82 specifies field reproduction, the memory M6 stores the luminance signal Y, and the transmission mode is set to color field mode (switch 80).
Color line sequential signal R/B is sent to memory M only when
is accommodated. When the playback mode is field and the playback signal is mono, monochrome, frame,
When the mode (switch 78) is specified,
Only the luminance signal for one field is stored in the memory M0. When the color field transmission mode is set even though the actual playback signal is monochrome,
Only the luminance signal Y is stored in the memory M0, and nothing is written in the memory M.

When the playback mode switch 82 specifies frame playback, odd-numbered fields and even-numbered fields are repeatedly played for each field, but in the illustrated example, the field that appears after the transmission start switch 72 is pressed is It's about to be taken in.

FIGS. 5A and 5B schematically illustrate the storage state of video signals in the field memories M0 and M1.

FIG. 5A shows a state in which a color field signal is stored, and FIG. 5B shows a state in which a luminance signal for two fields of a frame signal is stored. is stored, the memory control circuit 46 directly accesses the dropout flag memory in the CPU 12 according to the generation timing of the dropout signal 32 supplied from the reproduction process circuit 22.
ss) to control.

FIG. 6 shows the configuration of the dropout flag memory within the CPU 12. One bit is assigned to each flag to each constituent pixel of the memory circuit 36. Column 640 (shaded area in FIG. 5) is provided to increase the search speed for dropout positions, and a flag in column 640 is set when there is even one dropout in the line.

The memory control circuit 46 receives D from the reproduction process circuit 22.
Set the corresponding flag to 1" according to the OP, and set the 64th flag corresponding to the line where the dropout exists.
Set the bit in the 0 column to 01m.

Returning to FIG. 3B, after completing the memory freeze operation and checking the number of DOs in step S3-18, the program proceeds to the dropout compensation routine (S3-25). In this dropout compensation routine, 1. Using the dropout flag memory shown in FIG. 6, the pixel data in which dropout has occurred is replaced with a value based on a known compensation method, such as the pixel data directly above or the average value of the pixel data above and below.

In step S3-19, the parameter I and other variables that determine whether or not to send two fields of data D, , D as the transmission mode are initialized. When sending only data D0, set I=1 when sending I-0, DO, and D+. Furthermore, the variable i for starting transmission from the first field is cleared to 0. Also, set the address (X, Y) for reading data in the field memory to (0,0).
Reset to . X is a horizontal pixel column number from θ to 639, and Y is a vertical pixel row number from θ to 255.

After initializing the transmission parameters, the transmission flag TX.

FLG, turn on or blink the transmission busy LED 84, and clear the flags iRQ and MsK that prohibit transmission interrupts to enable interrupt reception in order to start transmission (S3-19.20, 21.22), Step 53
- Return to 3.

On the other hand, if TX and PLG are set in step S3-16, indicating that transmission is in progress, it is checked whether the transmission stop switch 74 has been pressed (S3-23).
, if it is not pressed, the process goes to step 53-3; if it is pressed, iRQ and MsK are sent and subsequent interrupts are prohibited (53-24), and the process returns to step 53-1.

FIG. 4 is a flowchart showing in detail the memory freeze and Do number check routine of step S3-18 in FIG. 3B. 'First, set the freeze count variable FC to O (S4-1) and execute memory freeze (S4-1).
4-2), and reads the Do number signal from the reproduction process circuit 22 and assigns it to the variable DO,i (S4-3
). The variable DOPC for counting the number of dropout lines is set to 01, the horizontal address variable X of the dropout flag memory is set to 640, and the vertical address variable Y is set to 0 (S4-
4). Then, until Y reaches 255, the number of times the dropout flag F(X, Y) is 1 is counted in DOPC (S4-5.6.7.8).

This DOPC and Do! , % difference A is a predetermined reference value Ro
Check whether it is smaller than f (S4-9.10), and if it is not smaller, the transmission is inappropriate, so the Do warning LED 86 is turned on.
(S4-11), freeze counter FC
54-12) and executes memory freeze again (S4-2). In the example of FIG. 4,
Memory freeze is set to retry up to 3 times.
However, if the number of freeze data DOs is large (S
4-13) Return to step S3-25 in FIG. 3B. Also, if the number of freeze data DOs is small enough (S4-10), turn off the warning LED 86 (
S4-14), the process returns to step S3-25 in FIG. 3B.

The image data thus frozen and dropout compensated in the memory circuit 36 is transferred to the transmission mode switch mode by interrupt processing. The signal is processed so as to have the transmission signal format specified by 6, 78° 80, and the transmission circuit 6
4 and is sent out from the output terminal 66 to the transmission line. Since this transmission signal format is not directly related to the present invention, further explanation will be omitted.

In the routine shown in FIG. 3B, transmission is executed even if the number of Do's of freeze data exceeds a predetermined value, but as shown in FIG.
If 6 lights up or flashes, confirmation using the transmission start switch may be requested. That is, if the warning LED 86 is not lit or blinking in step S3-25, the process proceeds to step S3-19 or later to permit transmission, and if the warning LED 86 is lit or blinking, the transmission start switch 72 is activated. Only when reconfirmation is made, the process proceeds to step S3-19 and subsequent steps, and when any other switch is pressed, the process is forcibly returned to step S53-1.

FIG. 8 shows, as a modification of FIG. 2, an example of a circuit for counting the number of pixels in which dropouts occur within one screen of data. The same components as in FIG. 2 are given the same reference numerals. In this circuit, the AND gate 114 is opened and closed with the clock of the sampling period of each pixel value of the image signal, and the dropout pulse of the DO detection circuit 100 is detected by the counter 106.
clock input. Since the clock that opens and closes the 114 (and/or game) 114 is a signal with the same period as the freeze clock to the memory circuit 36, the circuit uses the freeze clock from the freeze clock generation circuit (not shown). . With this circuit configuration, the latch circuit 10
8 holds the number of dropout pixels of the recording signal of the magnetic sheet 10 and outputs it to the CPU 12.

In this case, in comparison with the number of dropouts of the image data frozen in the memory circuit 36, the dropout flag F (X,
It is sufficient to count the number of pixels in which Y) is 1.

The applicant of this application speeds up and simplifies dropout compensation by dividing a horizontal line of an image signal into multiple sections and providing a flag indicating the presence or absence of dropout in each moxibustion section. We are proposing a method to do so.

Figure 9 shows 8 sections (i.e. 80 pixels each) in the horizontal direction.
This is an example in which the circuit in FIG. 2 is modified so that the number of dropouts in each division is counted and held. The same components as in FIG. 2 are given the same reference numerals. 116
is a counter that generates a pulse every time it counts 80, which is the number of pixels constituting one section, and the clock applied to its clock input is the same as the clock to the AND gate 114 in FIG. This counter 116 is reset by its own output pulse or horizontal synchronization pulse H5ync. Due to the direction of these pulses, inverter 1
18 and an AND gate 120 are utilized. The output of the inverter 118 is applied to the reset input of the D flip-flop 102, and the AND gate 122 is opened and closed by the output pulse of the counter 116, so that the D flip-flop 102
The Q output of is applied to the clock input of counter 106.

Counter 106 counts the rising edge of the output of AND gate 122. As a result, the latch circuit 1°8 becomes 1
Assuming that the screen consists of 640 pixels x 256 lines, 8X
A Do number indicating how many of the 256 sections have experienced dropout is held and sent to the CPU 12.

In the case of FIG. 9, when counting the number of dropouts of the image data frozen in the memory circuit 36, the number of sections in which dropouts occur is correspondingly counted. In the above-mentioned application, the dropout flag for each horizontal scanning line is 8 bits, and the presence or absence of dropout in each section is identified by setting and resetting each bit. Therefore, in the case of FIG. 9, the total number of cent bits of the dropout flag corresponds to the number of DOs.

In the embodiments described above, a still image transmission device was taken as an example, but the present invention is applicable not only to devices that handle image data but also to other signal processing devices that store supplied signals in memory. It is clear that it can also be applied to devices.

〔Effect of the invention〕

As can be easily understood from the above explanation, according to the present invention, even if the number of dropouts of image data stored in the image memory increases temporarily or suddenly due to dust, dust, etc., the dropout can be automatically prevented. Since it detects this and retries the memory freeze, the most suitable image data can be sent and used.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the image reproducing apparatus of the present invention, FIG. 3
Figure B is a flowchart of the basic algorithm of the transmission sequence of the device in Figure 1, and Figure 4 is the flowchart of step S in Figure 3B.
3-18 is a more detailed flowchart, FIGS. 5A and 5B are diagrams showing the state of data storage in the image memory, and FIG.
7 shows a partial modification of the flowchart of FIG. 3B, and FIGS. 8 and 9 show modifications of the DO number detection circuit of FIG. 2. 10...Magnetic sheet 15-Motor 16A, 16B-
Reproduction head 18 - switch 24 - reproduction luminance signal (Y) 26 - line sequential color signal (R/B) 2
B-Horizontal synchronization signal (H5) 30-Vertical synchronization signal (
VS) 32-=dropout pulse (DOP)
44- Font pattern (No. 8 48.62-
・Address bus 50.60-・Data bus 5
2.58・-・Control line 66-・Output terminal 68-・-
・Up switch 70−・−・Down switch
72--Transmission start 9 switch 74--Transmission stop switch 76--Monochrome field transmission designation switch 78--Monochrome frame transmission designation switch 80--Color field transmission designation switch
82-Reproduction mode selection switch 83-NTSC
Switch 84--Transmission busy LED 86--
Dropout warning LED 100...Dropout detection circuit 102-D flip-flop 104
-NAND gate 106...-force counter 10B-launch circuit 110--comparison circuit 112--switch
114-and gate 116-octal counter
118... Inverter 120... AND Gate No. 9 Figure 3A Figure 7 Figure 4 ← 64〇 Gogame ← ← 640L element ← Figure 5A Figure 5B Figure 6

Claims (1)

[Claims] A signal processing device that stores a supplied signal in a memory, comprising a holding means for holding the dropout amount of the signal stored in the memory, a detection means for detecting the dropout amount of the supplied signal, and the holding means. A signal processing device comprising: control means for causing rewriting to the memory based on a comparison result between a value held by the means and a detected value by the detection means.