JP2718029B2 - Image signal processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing device, for example, to an image signal processing device that stores an image signal reproduced from a recording medium in a memory. [Related Art and its Problems] Devices for recording an image on a magnetic tape, a magnetic disk, an optical disk or the like and reproducing the image as necessary have become widespread. Then, it has been proposed to transmit the reproduced video signal to a remote place or another device and use it for various uses.
An example of such a system is an electronic still camera. In such an image transmission system, a transmission system,
There is an opportunity for a signal to be lost at each stage of the transmission path and the receiving system. Therefore, it is necessary to minimize the quality of the signal, specifically, the dropout of the signal at the stage of transmission. However, in the reproducing circuit included in the transmission system, specifically, in the reproducing head, signal loss occurs due to dust or dust caused by the environment, and the signal is lost in the frame memory or the field memory as the transmission buffer memory. A temporarily accommodated video signal tends to be a signal having more dropouts than a video signal accommodated in a recording medium. There is also a method of confirming the contents of the transmission buffer memory by displaying it on a monitor device. However, for this purpose, a monitor device of a certain quality must be prepared, and it is required to be simple and lightweight. It is not preferable for an electronic still camera to be used. If the quality of the recorded image is high, of course, there is a limit in such confirmation by the human eye. Such a problem can occur not only in the above-described electronic still camera system but also generally in a signal processing device that stores a signal in a memory. Accordingly, it is an object of the present invention to provide an image signal processing device capable of storing an image signal in a better state even if the state of occurrence of dropout in an input image signal changes for some reason. [Means for Solving the Problems] An image signal processing apparatus according to the present invention comprises: a storage unit for inputting an image signal for each screen and storing the input image signal for one screen; Dropout detection means for detecting the occurrence of a dropout in an input image signal for one screen; and dividing the input image signal for one screen into n (n is an integer of 2 or more) blocks. First dropout information forming means for forming first dropout information on the number of blocks of which dropout has been detected by the dropout detecting means, out of the n divided blocks; Holding means for holding, as second dropout information, information on the state of occurrence of the dropout detected by the detecting means; The number of blocks in which the occurrence of dropout indicated by the first dropout information formed by the dropout information forming means is detected, and the state of occurrence of dropout indicated by the second dropout information held by the holding means. Control means for controlling a rewriting operation of the image signal stored in the storage means in accordance with a result of comparison with the information. [Operation] With the configuration described above, even if the state of occurrence of dropout in the input image signal changes for some reason, the state of occurrence of the dropout is detected and the storage operation of the image signal is automatically controlled. Therefore, an image signal in a better state can be stored. Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows an example of a circuit when the method of the present invention is applied to a still image transmission device. On the magnetic sheet 10, a video signal of one field unit is recorded forming a concentric track. The magnetic sheet 10 is driven to rotate by a motor 15 controlled by a motor drive circuit 14. Motor drive circuit
14 is also controlled by the CPU 12. 16A and 16B are reproduction heads, for example, in-line heads, which perform field reproduction or frame reproduction. The reproducing head 16A is connected to the A terminal of the switch 18, and the reproducing head 16B is connected to the B terminal of the switch 18. The switch 18 is switched by a switching signal from the CPU 12. The output of the switch 18 is supplied to a reproduction process circuit 22 via a reproduction amplifier 20, and the reproduction process circuit 22 generates a reproduction luminance signal (Y) 24, a line-sequential color signal (R / B) 26, and a horizontal synchronization signal (HS). 28, vertical sync signal (V
S) 30, a dropout pulse (DOP) 32 generated in response to the lack of a playback envelope, a signal 34 indicating whether the playback video signal is color or monochrome, and the number of dropouts of the recording signal of the magnetic sheet 10 (the details will be described later). However, hereinafter, a signal 35 indicating the number of DOs) is formed. The head drive circuit 19, according to a control signal from the CPU 12,
The heads 16A and 16B are positioned inside or outside the magnetic sheet 10 in the radial direction. The reproduction luminance signal 24 and the line-sequential color signal 26 from the reproduction process circuit 22 are temporarily stored in a memory circuit 36, and the reproduction luminance signal 24 is supplied to a monitor device 40 via an adder 38 for monitoring an image. Is also supplied. The adder 38 includes a monitor device
In order to superimpose the display such as the track number on the video at 40,
A font pattern signal 44 is supplied from the character generator 42. This character generator
42 is the font of the specified character under the control of the CPU 12.
The pattern signal 44 is output. Further, the memory circuit 36 includes two field memories M ₀ and M ₁ as described later. Reference numeral 41 denotes an NTSC encoder for forming an NTSC signal from the output of the adder 38 and the line-sequential color signal 26 of the reproduction process circuit 22, and the output signal is supplied to an output terminal 43. This NTSC
The encoder 41 is activated or deactivated by the CPU 12 according to the on / off state of an NTSC switch 83 described later. The horizontal synchronization signal 28, the vertical synchronization signal 30, and the dropout pulse 32 are supplied from the reproduction process circuit 22 to the memory control circuit 46 for controlling the memory circuit 36. The dropout can be detected, for example, as an envelope of the input signal. 48
Is an address bus, 50 is a data bus, and 52 is a control line. A magnetic piece (not shown) is fixed to the magnetic sheet 10 for detecting a rotation phase, and is read by a magnetic head 54. The amplifier 56 amplifies the output signal (PG pulse) of the magnetic head 54, and the output of the amplifier 56 is used to feed back to the motor drive circuit 14 to control the rotation phase of the magnetic sheet 10, but the memory control circuit It is also supplied to 46 and used for controlling the memory circuit 36. The memory control circuit 46 also includes a control line 58, a data bus 60
And to the CUP 12 via the address bus 62. The playback video signal written from the playback process circuit 22 to the memory circuit 36 is taken into the CPU 12 via the data bus 50, the memory control circuit 46, and the data bus 60, and the CPU 12 sends the video data to the transmission circuit 64. I do. The transmission circuit 64 is a signal form suitable for transmitting the input video data (AM, FM, etc.)
, And sends it out of the output terminal 66 to the transmission path. Various switches for specifying the operation of the CPU 12 are connected to the CPU 12. The up switch 68 instructs the reproducing heads 16A and 16B to move in the increasing direction of the track number, and the down switch 70 instructs to move in the decreasing direction. Reference numeral 72 denotes a start switch for a transmission operation for transmitting the reproduced video signal written in the memory circuit 36 from the output terminal 66. Reference numeral 74 denotes a transmission stop switch for stopping transmission during transmission. Reference numerals 76, 78, and 80 are switches for designating the transmission mode. Closing switch 76 designates monochrome field transmission, closing switch 78 designates monocle frame transmission, and closing switch 80. Specifies color field transmission. Switches 76,78,
80 should have only one of them closed. The switch 82 is for selecting a reproduction mode (field reproduction or frame reproduction), and the CPU 12
The switch 18 is continuously connected to either the A terminal or the B terminal, or is alternately switched for each field.
Reference numeral 83 denotes a switch for designating activation or non-activation of the NTSC encoder 41. It goes without saying that some of these switches 68-83 may be replaced by corresponding flag variables under program control. The reproduction process circuit 22 monitors the number of dropouts of the same image signal continuously transmitted from the reproduction amplifier 20 (specifically, the number of lines having the dropouts), and determines the minimum value as the DO of the recording signal. The number signal 35 is sent to the CPU 12. still,
The number of DOs may be the number of dropout pixels, the number of areas in which the dropout exists, or the like, as described later. Reference numeral 84 denotes a transmission busy LED that lights or flashes when a signal is transmitted from the transmission circuit 64 to the transmission path, and reference numeral 86 denotes a DO warning that flashes or lights when there is a predetermined or more dropout in the image data of the memory circuit 36. LED. FIG. 2 shows a configuration example of the DO number detection circuit in the reproduction process circuit 22. This DO number detection circuit counts the number of lines where a dropout exists. When detecting the dropout of the reproduced image signal, the DO detection circuit 100 generates a dropout pulse. D flip-flop 102 is clocked by the dropout pulse and the Q output goes high. With this Q output, the NAND gate 104 reversely passes the horizontal synchronization pulse _Hsync and applies it to the clock input of the counter 106. This causes the counter 106 to count up. At the same time, the horizontal sync pulse _Hsync resets the D flip-flop 102. In this way,
The counter 106 counts the number of lines on which the reproduction signal from the reproduction amplifier 20 has dropped out. The latch circuit 108 is a circuit that holds the minimum value of the number of dropouts of a reproduction signal (ie, the same recording signal) from the same track as the magnetic sheet 10, and is reset (actually preset to a default value) in accordance with the track feed signal. I have.
The comparison circuit 110 calculates the count value of the counter 106 and the latch circuit 108
When the count value of the counter 106 is smaller, the output of the switch 112 is connected to the input of the latch circuit 108. Conversely, when the count value of the counter 106 is equal or larger, the output of the latch circuit 108 is changed. Connect to that input. Note that a vertical synchronization pulse _Vsync is applied to a clock terminal for input operation of the latch circuit 108, and is triggered by the falling edge. The output of the latch circuit 108 is
Sent to 12. 3A and 3B show a routine for starting and ending the head feeding and transmission operation as a whole. When the power is turned on, the transmission flag TX.FLG is reset to “0” and the transmission busy LED 84 and the DO warning LED 86 are turned off (S3-1,
2). The transmission flag TX.FLG is “1” during transmission, and is “0” when not transmitting. Although not shown in FIG. 1, the presence / absence of the magnetic sheet 10 is detected from the output of a known loading detector that detects the presence / absence of the magnetic sheet 10 and IN.FLG is loaded if the magnetic sheet 10 is not loaded. Set to “1” (S3
−3,4). When IN.FLG is set, since the magnetic sheet 10 has been taken out once, the heads 16A, 16B are temporarily moved to the innermost or outermost reference position, and the heads 16A, 16A,
Reposition 16B (S3-6). Depending on whether the up switch 68 or the down switch 70 has been pressed (S3-7, 8), the heads 16A, 16B are sent in the direction of increasing / decreasing the track number, respectively (S3-7).
−9, 11), and increment / decrement the track number held in the CPU 12 (S3-10, 12). At this time,
As the playback mode, according to the mode selection switch 82,
Either field reproduction or frame reproduction is selected. Further, in response to the track number being incremented / decremented in steps S3-10 and S12, the monitor device
To update the display of the track number at 40, the display track number data of the character generator 42 is also changed. NTSC encoder 83
41 is set to an operation state or a non-operation state (S3-13, 14, 15). In the next step S3-16 (FIG. 3B), the transmission flag TX.FLG is examined. If "0", that is, in the non-transmission state, the flow branches to step S3-17, and if "1", that is, in the transmission state, step S3. Branches to -23 or lower. In step S3-17, it is checked whether or not the transmission start switch 72 has been pressed.
Playback mode and transmission mode switches 76, 78, 80
A predetermined signal is frozen in the memory circuit 36 in accordance with the transmission mode selected by
It is re-frozen depending on the number of DOs (S3-18). The details of step S3-18 will be described later. In this embodiment, the capacity of each of the two field memories M ₀ and M ₁ of the memory circuit 36 is 640 pixels in the horizontal direction and 256 horizontal scanning lines. Basically the memory M ₀ is accommodated luminance signal Y, the memory M ₁ the luminance signal or the color line sequential signals R / B are housed. If the playback mode switch 82 specifies a field reproduction, the luminance signal Y is received in the memory M _0, the color only in the memory M ₁ when the transmission mode is the color field mode (switch 80) A line-sequential signal R / B is accommodated. A case and reproduction signal reproduction mode is in a field is a mono, when monochrome frame mode (switch 78) is specified, accommodates only the luminance signal of one field in the memory M _0. When the actual reproduction signal is set at a spite color fields transmission mode monochrome, only the luminance signal Y and accommodated in the memory M _0, the memory M ₁ does not write anything. When the playback mode switch 82 specifies frame playback, the odd field and the even field are repeatedly played for each field.In the illustrated example, the fields that appear after the transmission start switch 72 is pressed are displayed. It is being taken in. FIGS. 5A and 5B schematically show how the field memories M ₀ and M ₁ accommodate video signals. FIG. 5A shows a state in which a color field signal is accommodated, and FIG. 5B shows a state in which a luminance signal for two fields of a frame signal is accommodated. Further, when a video signal is accommodated in the field memories M ₀ and M ₁ , the memory control circuit 46 directly controls the dropout in the CPU 12 in accordance with the generation timing of the dropout signal 32 supplied from the reproduction process circuit 22. -DMA (Direct Memory Access) control of the flag memory. FIG. 6 shows the configuration of the memory for the dropout flag in the CPU 12. Flags are assigned to the constituent pixels of the memory circuit 36 one bit at a time. The 640th column (hatched portion in FIG. 5) is provided to increase the search speed of the dropout position. When even one dropout exists in the line, the flag of the 640th column is set. The memory control circuit 46 sets the flag of the corresponding portion to “1” in accordance with the DOP from the reproduction process circuit 22, and sets the bit of the 640th column corresponding to the line where the dropout exists to “1”. . Returning to FIG. 3B, when the memory freeze operation and the check of the number of DOs are completed in step S3-18, the process goes to a dropout compensation routine (S3-25). This dropout compensation routine uses the dropout flag memory shown in FIG. 6 to reduce the pixel data in which the dropout has occurred by a known compensation such as the immediately preceding pixel data or the average value of the upper and lower pixel data. Substitute with the method value. In step S3-19, a parameter I for determining whether or not to transmit data D ₀ and D ₁ for two fields as a transmission mode is set.
Initialize other variables. When sending only data D ₀ is when sending _{I = 0, D 0, D} 1 to I = 1. Furthermore, the first
The variable i for starting transmission from the field is cleared to zero. Also, the data reading address (X, Y) of the field memory is reset to (0, 0). X
Is a horizontal pixel column number from 0 to 639, and Y is a vertical pixel row number from 0 to 255. After initializing the transmission parameters, the transmission flag TX.FLG is set, the transmission busy LED 84 is turned on or blinks, and a flag iRQ.
Clear MSK and enable interrupts (S3-19, 20, 21,
22), and return to step S3-3. On the other hand, in step S3-16, TX.FLG is set,
If the transmission is in progress, the transmission stop switch
It is checked whether 74 has been pressed (S3-23). If the button has not been pressed, the flow proceeds to step S3-2. If the button has been pressed, iRQ.MSK is set, the subsequent interrupts are inhibited (S3-24), and the flow returns to step S3-1. FIG. 4 is a flowchart showing in detail a routine for checking a memory freeze and the number of DOs in step S3-18 in FIG. 3B. First, the variable FC of the number of freezes is set to 0 (S4
-1) A memory freeze is executed (S4-2). Then, the DO number signal from the reproduction process circuit 22 is read and assigned to the variable DO _min (S4-3). The variable DOPC for counting the number of dropout lines is set to 0, the dropout flag
The horizontal address variable X of the memory is set to 640 and the vertical address variable Y is set to 0 (S4-4). Then, the number of times that the dropout flag F (X, Y) is 1 is counted in the DOPC until Y reaches 255 (S4-5, 6, 7, 8). It is checked whether the difference A between DOPC and DO _min is smaller than a predetermined reference value Ref (S4−
9,10) If it is not small, transmission is inappropriate, so DO warning
The LED 86 blinks (S4-11), the freeze counter FC is incremented (S4-12), and the memory freeze is executed again (S4-2). In the example of FIG. 4, the retry of the memory freeze is set to up to three times. If the number of DOs of the freeze data is still large (S4-13), the third freeze is performed.
It returns to step S3-25 in the figure. In addition, freeze
If the DO number of data is small enough (S4-10), the warning LED86
Is turned off (S4-14), and the process returns to step S3-25 in FIG. 3B. The image data frozen in the memory circuit 36 in this manner and subjected to dropout compensation is signal-processed by an interrupt process so as to have a transmission signal format designated by the transmission mode switches 76, 78, 80, and is transmitted to the transmission circuit 64. And output from the output terminal 66 to the transmission path. Since this transmission signal format is not directly related to the present invention,
Further description is omitted. In the routine of FIG. 3B, the transmission is executed even if the number of DOs of the freeze data is equal to or more than a predetermined number. However, as shown in FIG. 7, when the warning LED 86 is turned on or blinks by step S3-18, as shown in FIG. May require confirmation by a transmission start switch. That is, if the warning LED 86 is not lit or blinking after step S3-25, step S3-25 is executed.
Proceed to step 3-19 and thereafter to permit transmission, and if the warning LED 86 is lit and blinking, proceed to step S3-19 and thereafter only when reconfirmed by the transmission start switch 72, and press any other switch. In step S3-1, the operation is forcibly returned to step S3-1. FIG. 8 shows, as a modification of FIG. 2, an example of a circuit for counting the number of pixels in which dropout occurs in data of one screen. The same components as those in FIG. 2 are denoted by the same reference numerals.
In this circuit, the AND gate 114 is opened and closed by a clock of a sampling cycle of each pixel value of an image signal, and a dropout pulse of the DO detection circuit 100 is applied to a clock input of the counter 106. Since the clock for opening and closing the AND gate 114 is a signal having the same cycle as the freeze clock to the memory circuit 36, the freeze clock from the freeze clock generation circuit (not shown) is diverted from a circuit viewpoint. With this circuit configuration, the latch circuit 108 holds the number of dropout pixels of the recording signal of the magnetic sheet 10 and
Output to 2. In this case, in comparison with the number of dropouts of the image data frozen in the memory circuit 36, the pixel in which the dropout flag F (X, Y) in FIG. What is necessary is just to count the number. The applicant of the present application divides a horizontal line of an image signal into a plurality of sections upon dropout compensation and provides a flag indicating the presence or absence of dropout in each section, thereby speeding up and simplifying dropout compensation. Suggest a way to do it. FIG. 9 shows an example in which the horizontal direction is divided into eight sections (that is, 80 pixels each), and the circuit of FIG. 2 is modified so as to count and hold the number of dropouts in each section. The same components as those in FIG. 2 are denoted by the same reference numerals. Reference numeral 116 denotes a counter which generates a pulse each time the number of pixels constituting one section is counted as 80, and the clock applied to its clock input is the AND of FIG.
Same as the clock to gate 114. This counter 116
Is reset by its own output pulse or horizontal synchronization pulse _Hsync . The inverter 118 and the AND gate 120 are used in relation to the direction of these pulses. The output of the inverter 118 is applied to the reset input of the D flip-flop 102, the output pulse of the counter 116 opens and closes the AND gate 122, and the Q output of the D flip-flop 102 is applied to the clock input of the counter 106. The counter 106 counts the rising of the output of the AND gate 122. As a result, assuming that one screen is composed of 640 pixels × 256 lines, the latch circuit 108 holds the number of DOs indicating how many of the 8 × 256 partitions have a dropout,
Send to CPU12. In the case of FIG. 9, when counting the number of dropouts of image data frozen in the memory circuit 36, the number of sections where dropouts occur is also counted. In the another application, a dropout flag is set to 8 bits for each horizontal scanning line, and the presence / absence of dropout for each section is identified by setting / resetting each bit. Therefore, in the case of FIG. 9, the total number of set bits of the dropout flag corresponds to the number of DOs. In the embodiment described above, the still image transmission device is taken as an example. However, the present invention is not limited to a device that handles image data as long as it is a signal processing device that stores a supplied signal in a memory. Obviously, it can be applied to the device. [Effects of the Invention] As described above, according to the present invention, even if the state of occurrence of dropouts in an input image signal changes for some reason, the state of occurrence of the dropouts is detected and automatically detected. Since the storage operation of the image signal is controlled in a controlled manner, the image signal in a better state can be stored.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of an embodiment of an image reproducing apparatus according to the present invention, FIG. 2 is a structural example of a dropout number detecting circuit in a reproducing process circuit 22 of FIG. Figures 3A and 3B
1 is a flowchart of a basic algorithm of a transmission sequence of the apparatus, FIG. 4 is a more detailed flowchart of step S3-18 in FIG. 3B, and FIGS. 5A and 5B are diagrams showing a data storage state in an image memory. 6, FIG. 6 is a diagram showing the accommodation state of the dropout flag memory, FIG. 7 is a partial modification of the flowchart of FIG. 3B, and FIGS.
It is a modification example of the DO number detection circuit. 10 ... magnetic sheet, 15 ... motor, 16A, 16B ... reproduction head, 18 ... switch, 24 ... reproduction luminance signal (Y), 26
…… Line sequential color signal (R / B), 28 …… horizontal synchronization signal (H
S), 30 Vertical sync signal (VS), 32 Dropout pulse (DOP), 44 Font pattern signal, 4
8,62 …… Address bus, 50,60 …… Data bus, 52,
58: Control line, 66: Output terminal, 68: Up switch, 70: Down switch, 72: Transmission start switch, 74: Transmission stop switch, 76: Monochrome field transmission designation switch , 78: Monochrome frame transmission designation switch, 80: Color field transmission designation switch, 82: Playback mode selection switch, 83: NTSC
Switch, 84: Transmission busy LED, 86: Dropout warning LED, 100: Dropout detection circuit, 102:
D flip-flop, 104 ... NAND gate, 106 ...
Counter, 108 Latch circuit, 110 Comparison circuit, 112
... switch, 114 ... AND gate, 116 ... 80-digit counter, 118 ... inverter, 120 ... AND gate

Claims (1)

(57) [Claims] Storage means for inputting an image signal for each screen and storing the input image signal for one screen; dropout detection for detecting occurrence of dropout in the input image signal for one screen Means for dividing the input image signal for one screen into n (n is an integer of 2 or more) blocks, and among the n blocks, the dropout detection means detects a dropout. First dropout information forming means for forming first dropout information relating to the number of blocks for which occurrence has been detected; and information relating to a dropout occurrence state detected by the dropout detection means as second dropout information. Holding means for holding, and the first drop-out information formed by the first drop-out information forming means indicate The number of blocks in which the occurrence of dropout has been detected is stored in the storage means in accordance with a result of comparison between the number of blocks in which dropout has been detected and information on the occurrence state of dropout indicated by the second dropout information held in the holding means. Control means for controlling the rewriting operation of the image signal being performed.