JPS63247796A - Input controller for electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of 4 Ming J] This invention relates to an input control device for an electronic musical instrument such as an electronic guitar, and in particular holds the peak level while attenuating it when the peak point cannot be detected for a predetermined period of time. This invention relates to an apparatus that can reliably catch the peak point of an input waveform even if the level of the input waveform suddenly drops by increasing the attenuation rate, and can successfully extract the fundamental frequency a (pitch) of the input waveform.

[Prior art] Conventionally, a pitch (fundamental frequency a) is extracted from a waveform signal generated by the performance operation of a natural musical instrument, and a sound source device composed of an electronic circuit is controlled to artificially obtain sounds such as musical tones. Various types of devices have been developed.

In this type of electronic musical instrument, when extracting the pitch of an input waveform signal, it is necessary to extract the pitch between the maximum peak points or minimum peak points of the input waveform, or between the zero cross points immediately after these peak points, or between the zero cross points immediately before the peak points. Measurement of the time interval between points related to the peak point has been considered. Among these, methods for measuring between peak points include Japanese Patent Publication No. 57-58672 and Japanese Patent Publication No. 55-55
There is No. 398.

FIGS. 15 and 16 show an example of the maximum peak detection circuit 4 and minimum peak detection circuit 5 for detecting the maximum peak point and minimum peak point. The input waveform signal is input to the + terminal of the operational amplifier 4-1, the output terminal of the operational amplifier 4-1 is connected to the 7 node side of the diode DI, and the cathode side of the diode DI is connected to the capacitor C and the resistor R1 connected in parallel. and is connected to one terminal of an operational amplifier 4-1, and the output of the operational amplifier 4-1 is output as a maximum peak detection signal through a resistor R2 and an inverter 4-2.

Assuming that a waveform as shown in Figure 17 (■) is applied to the child terminal of the operational amplifier 4-1, the capacitor C is charged when the waveform level rises, and when the waveform level falls at a speed corresponding to the time constant CRI. After being discharged, a waveform as shown in Figure 17 (■) is input to one terminal of the operational amplifier 4-1, and when the waveform level rises, the difference value between the child terminal and the other terminal is output, and this is the signal shown in Figure 17 (■). Output. This pulse-like signal shown at (2) is inverted by the inverter 4-2 and output in the form of a signal shown at @.

Further, the minimum peak detection circuit 5 is almost the same as the maximum peak detection circuit 4 described above, but the direction of the diode D2 is reversed, and the inverter 4-2 is replaced by the buffer 4-2.
4 is provided, and the capacitor C repeats charging and discharging in the reverse direction as shown in FIG. 17 (■), and a minimum peak detection signal as shown in FIG. 17 (■) is output.

The time constants of capacitor C and resistor R1 of such a peak detection circuit 4.5 are set to be very large, and the signal
■The attenuation rate is gradual. This occurs when there are many first harmonics and there are many peak points within one cycle.
This is because only the maximum or minimum peak point is detected.

[Problems with the Prior Art] However, for such maximum peak detection circuit 4 and minimum peak detection circuit 5, as shown in FIG. 18, when the level of only the first wave of the input waveform is large, There is a problem in that it is not possible to grasp the maximum peak point for several waves after the second wave, making it difficult to extract the pitch, making it impossible to properly emit musical tones according to the frequency of the input waveform. Ta.

In addition, as shown in Figure 19, by tremolo playing, etc.
When the next note is played continuously while the previous note is being played, the vibration of the first string is suppressed and the waveform level of the previous note is lowered at the moment when the drum comes into contact with the string to play the next note. As the value suddenly decreases, it becomes impossible to grasp the peak point, making it difficult to extract the pitch, making it difficult to properly emit musical tones according to the frequency of the input waveform, and also causing problems with the first-order sound. Since the waveform level is not much different from the waveform level before the shock hits, there is also the problem that the sound is erroneously determined to be one continuous sound, and the re-sounding process (relative on) is not performed.

[Object of the Invention] This invention has been made in view of the above circumstances, and it is possible to reliably catch the peak point of the input waveform even if the level of the input waveform suddenly drops, and to extract the fundamental frequency (pitch) of the input waveform well. An object of the present invention is to provide an input device for an electronic musical instrument that allows the user to perform the following functions.

[Summary of the Invention] In order to achieve the above-mentioned purpose, this invention
As shown in the figure and FIG. 13, the main point is that the attenuation rate for maintaining the peak level when the peak point cannot be detected for a predetermined period of time is increased.

The above-mentioned predetermined time may be a predetermined pitch 1, for example, one period of the highest note to improve responsiveness, or one period (pitch) of the lowest note, an open string, to improve pitch extraction accuracy. The time is taken before the sound starts, and after that, the time of one period (pitch) measured immediately before is allocated. Of course, you can also take other appropriate time.

[Embodiment] Hereinafter, an embodiment in which the present invention is applied to an electronic guitar will be described in detail with reference to the drawings.

In the following embodiment, as explained below, a resistor R and a capacitor C serve as holding means, and an operational amplifier 4-1. Diode D1. D2 is the detection means.

Pitch extraction circuits P1 to P6 and stage 2 SI9.32
The CPU 100 that executes step 6 uses the measurement means as step 52.
1.528, the CPU 100 executes steps S3s, S35. The CPU 100 that executes Ul and U3 serves as a determining means, and the CPU 100 executes Step U2.

CPU100 that executes U4. flip flop FF,
The transistor Tr and the resistor R/10 correspond to attenuation rate control means, respectively.

Figure 1 shows the overall circuit configuration of the same embodiment, and the signals from the six input terminals 1 are connected to each of the six strings strung on the electronic guitar body. This is a signal from a pickup that converts the vibration of the first string into an electrical signal.

Musical tone signals from input terminals l... are sent to respective amplifiers 2...
It is amplified by... and low pass filter (LPF) 3...
The high frequency component is cut and the basic waveform is extracted, and the maximum peak detection circuit (MAX) 4..., the minimum peak detection circuit (MIN) 5... and zero cross point detection are performed. It is given to the circuit (Zero) 6... The cutoff frequency of the low-pass filter 3 is set to 4f, which is four times the vibration sound frequency f of the open string of each string. This is based on the fact that the frequency of the output sound of each string is within two octaves. The maximum peak detection circuit 4 detects the maximum peak point of the musical tone signal, and at the rising edge of the detected pulse signal, the Q output of the flip-flop 14 connected to the subsequent stage becomes High. level, this flip-flop 14.
Output of... and zero cross point detection circuit 6...
The AND output of the inverter 30 . ...However, the minimum peak point of the musical tone signal is detected, and at the rising edge of the detected pulse signal, the Q output of the flip-flop 15 connected to the subsequent stage becomes High level.
The AND output of the output of the flip 7o knob 15 and the output of the zero cross point detection circuit 6 is sent to the interrupt command signal lNTb+ to lNTb6 via the AND gate 25... is given to the CPU 100 as

That is, the maximum peak point is detected and the flip-flop 14
When the waveform crosses from positive to negative while is at High level, the interrupt command signal I N Tar ~ I
N Tab is given to the CPU 100, and conversely, when the minimum peak point is detected and the flip-flop 15 is at Hi, gh level, when the waveform changes from negative to positive, the interrupt command signals lNTb+ to lNTb6 are sent to the CPU 10.
Enter 0.

Immediately after receiving these interrupt command signals, the CPU 100 activates the corresponding flip flop 14...
..., 15..., clear signal CLa1~
CLa6, CLb+-CLbs are generated and reset. Therefore, no matter how many times the zero cross point is passed until the primary maximum peak point or minimum peak point is detected, the corresponding flip-flop 14...

15... is in the reset state, so CPU1
00 means no interrupt will be generated.

Then, in the CPU 100, an interrupt command signal lNTa+ to 1NTab or lNT is generated based on the vibration output of the string.
b+ to lNTb6 are given, and a scale tone is generated according to at least one of the respective time intervals. Note that at the start of one sound generation, the generation of open string scale tones may be started, and the frequency may be corrected after pitch extraction.The operation at the time of the start of sound generation will be described later.

The above-mentioned time interval is determined using a counter 7 and a work memory lot, as will be described later. That is, the work memory 101 stores various data such as the count value of the counter 7 at the zero cross point immediately after the maximum peak point or the minimum peak point.

After the sound generation starts, the frequency of the musical tone being generated is variably controlled according to the time interval data determined sequentially. In other words, data specifying the scale is transferred from the CPU 100 to the frequency ROM.
As a result, frequency data indicating the corresponding frequency is read out and sent to the sound source circuit 9 to generate a musical tone signal, which is outputted from the sound system 10.

If a detection signal of the maximum peak point or minimum peak point of the input waveform is not given even after one cycle of the waveform of the open string sound has elapsed at the start of sound generation, or if the input waveform measured and extracted just before the sound generation is being produced, When the detection signal of the maximum peak point or minimum peak point of the input waveform is not given even after one period of time.

Set signals 5ETAI to 5ETA6.5E for increasing the attenuation rate for holding the peak level for the maximum peak detection circuit 4 and minimum peak detection circuit 5.
TBI-3ETB6 is output.

Further, the musical tone signals from the low-pass filters 3 are given to the A/D converters 11 and converted into digital data according to their waveform levels.

The outputs of the A/D converters 11... are latched by the latches 12.... The latch signal for this latch 12... is generated by the output of the flip-flops 14..., 15... via the OR gate 13...
Each time a maximum peak point or a minimum peak point is passed, a signal indicating the level of the waveform at that time is stored in the latch 12. Also, this orgate 13...
The latch signals L1 to L6 from ... are also given to the CPU 100. And latch 12...output is CP
This data is applied to U100, and controls such as start and stop of sound generation, output sound level (sound 1), etc. are performed in accordance with this data. Note that the peak values stored in the latches 12 . . . are sequentially written into the work memory 101.

That is, in the CPU 100, the A/D converter 11...
When the absolute value of the data indicating the waveform level given by ... exceeds a predetermined constant value, the sound generation of musical tones is started, and pitch (fundamental frequency) extraction is also started, and this data is set to a constant value. When the value falls below 0FFLEV, a mute instruction is given to end the sound emission. The details of the operation will be described later.

In FIG. 1, the A/D converters ti are provided independently in each of the pitch extraction circuits P1 to P6.
Of course, it is also possible to use the /D converter in a time-division manner.

The tone generator circuit 9 has at least six channels of musical tone generation system formed by time-division processing.

FIG. 2 shows a specific configuration of the maximum peak detection circuit 4, in which the musical tone signal from the low-pass filter 3 is input to the ten terminals of the operational amplifier 4-1, and the operational amplifier 4-. The output terminal of the diode D1 is connected to the anode side of the diode D1, and the cathode side of the diode D1 is grounded through a capacitor C and a resistor R connected in parallel, and is also connected to one terminal of the operational amplifier 4-1. The output of the operational amplifier 4-1 is output as a clock signal to the flip-flop 14 via the resistor R2 and the inverter 4-2.

Assuming that a waveform from the low-pass filter 3 as shown in Figure 17 (■) is applied to the child terminal of the operational amplifier 4-1, the capacitor C is charged when the waveform level rises, and when the waveform level falls, the time constant CH The waveform shown in Figure 17 (■) is input to one terminal of the operational amplifier 4-1, and only when the waveform level rises, the difference value between the child terminal and the first terminal is output. It is output as a signal shown in Figure 17 (■). This pulse-like signal shown in (2) is inverted by the inverter 4-2 and becomes an output such as @ at the time of its rise, the flip-flop 14 at the subsequent stage is set, and the latch signal is applied to the latch 12.

One end of a resistor R/10 is connected to the cathode side of the diode D1, and the other end of the resistor R/10 is connected to the cathode side of the diode D1. ! The emitter of the transistor T is connected to the collector of the transistor T, and the emitter of the transistor T is grounded.
The base of r is connected to the Q output terminal of a DT type flip-flop FF via a resistor R1.The D input terminal of this flip-flop FF is always given a high level signal from the VDD terminal, and CK(T)
The input terminal holds the peak level mentioned above.
A set signal 5ETA is provided to increase the attenuation rate. Therefore, when the Q output becomes High level by applying the set signal 5ETA, the transistor T becomes conductive and current also flows through the resistor R/10, so that the combined resistance becomes smaller and the time constant decreases. This increases the attenuation rate when holding the peak level while attenuating it.

As this attenuation rate increases, the peak point is detected again and the maximum peak detection signal shown in Figure 517@ is output, and this signal is input to the clear terminal ■ of the flip-flop FF. , the Q output is set to low level, and the transistor T' is made non-conductive.

Furthermore, the maximum peak detection circuit 4 can also be configured as shown in FIG. Note that the same parts as those in FIG. 2 are given the same symbols, that is, there is a die t-FD2 connected in the opposite direction to the diode DI in FIG. 2, and an operational amplifier 4-1(7)+ An operational amplifier 4-3 is connected to the terminal, and the input signal in is applied to one terminal of the operational amplifier 4-3 via a resistor R4, and its output is fed back to this one terminal via a resistor R3. ing. Further, a buffer 4-4 is provided in place of the inverter 4-2. The operation of the maximum peak detection circuit 4' shown in FIG. 4 is almost the same as the operation of the minimum peak detection circuit 5 described below, except that an operational amplifier 4-3 for signal inversion is connected to the input side. Omitted.

FIG. 3 shows a specific configuration of the minimum peak detection circuit 5,
This minimum peak detection circuit 5 is almost the same as the maximum peak detection circuit 4, but the direction of the diode D2 is reversed, a buffer 4-4 is provided in place of the inverter 4-2, and the capacitor C is Charging and discharging in the reverse direction as shown in FIG. 17 (2) is repeated, and when the signal rises as shown in FIG.

Also, a latch signal is given to the latch 12.

Then, when the set signal 5ETB is applied, the transistor Tr becomes conductive, the time constant becomes smaller, and the attenuation rate for holding the peak level becomes thicker, as in the case of the maximum peak detection circuit 4 described above. be.

Further, FIG. 5 shows a specific example of the zero-crossing point detection circuit 6, in which a waveform signal from the low-pass filter 3 is applied to the child terminal of the operational amplifier 6-1.

A ground level is connected to one terminal, and the output of this operational amplifier 6-1 is outputted via a resistor R5 and an amplifier 6-2. Therefore, when there is an input signal of a positive level, the amplifier 6-2 outputs a high level, and when there is an input signal of j nil level, the amplifier 6-2 outputs a low level. In other words, the output level is inverted each time the zero cross point is passed.

Next, the operation of this embodiment will be explained. Figure 6 shows the CPU
100 is the flow of the interrupt routine, FIG. i7 is the main flow, and FIGS. 8 and 9 are the subroutine flows. Note that although Figures 6 to 9 only show the processing for one string, the processing for all strings is exactly the same.

It may be considered that the CPU 100 executes processing for each string in a time-sharing manner.

Registers of Work Memory 101 Now, before explaining the specific operation of the CPU 100, the main registers in the work memory IO1 will be explained.

The 5TEP register has four stages: 0, 1.2.3,
The string vibrates (Figure 10 (&) or Figure 11 (
a)), t510 diagram (b) or 11th
The contents change as shown in Figure (b). This 5TE
When the P register is O, it indicates a note-off (mute) state.

The 5IGN register indicates whether the zero-crossing point for period measurement is the zero-crossing point next to the maximum peak (MAX) point or the zero-crossing point next to the minimum peak (MIN) point. The latter is the case.

The REVER3E register is a register that stores data for checking whether interrupt processing has been performed due to the arrival of a zero-crossing point after the peak point on the opposite side of the zero-crossing point represented by the above-mentioned 5IGNL/register. Used to check pitch (fundamental frequency) extraction control.

The T register stores the value of the counter 7 at a specific point for measuring the period of the input waveform. Note that the counter 7 performs a free running operation of counting at a predetermined clock.

The AMP(i) register is a register that stores the maximum or minimum peak value (actually the absolute value) latched from the A/D converter 11 to the latch 12.
is the register for the maximum peak, and AMP(2) is the register for the minimum peak.

Data representing the measured period is input to the PERIOD register, and based on the contents of this register, the CPU 10
0 performs frequency control on the frequency ROMg and the sound source circuit 9.

The CH(i) register is a register in which the pitch data of the period measured and extracted immediately before is set.CH(1) is set to the pitch data measured at the zero-crossing point next to the maximum peak point, and CH( 2) is set to the value measured at the next zero cross point after the minimum peak point. Note that when the 5TEP register is 1 or 2 at the start of sound generation, pitch data To is set in accordance with the period of a predetermined pitch, for example, the period of the waveform of the open string tone, which is the lowest note.

The t(f) register receives the interrupt command signal I N
Ta1NI N Ta6 or I N Tb+ ~I N
Store the value of counter 7 when Tbb is given,
At t(1), the interrupt command signal lN after the maximum peak point is
The value when Ta+~INTab is cleared is set, and the interrupt command signal l after the minimum peak point is set in t(2).
The value when NTb+ to lNTb5 are given is set.

Furthermore, as will be described later, this embodiment uses three methods for various judgments.
One constant (threshold level) is CPU100
is set within.

The first one is 0NLEVI, as shown in Figure 10(a).
, as shown in FIG. 11 (&), when the current note-off state is detected and a peak value larger than this 0NLEV I value is detected, assume that the string has been picked, etc., and the operation for period measurement is performed. The CPU 100 starts executing.

0NLEVn is a note-on (sounding) state,
If the difference between the previous detection level and the current detection level is greater than this value, it is assumed that there was an operation using tremolo playing, etc.
Started sweating again (relative on, relative a)
n) For processing.

0FFLEV is as shown in FIG. 14(L),
If a peak value less than this value is detected in the note-on (sounding) state, note-off (silence) processing is performed.

From the above explanation, it will be easy to understand the operations of the interrupt routine and main routine described below.

Looking at the assignment at the zero-crossing point, the CPU of the interrupt command signals lNTa and lNTb, which are the outputs of the AND gate 24 or AND gate 25.
100, the interrupt processing shown in FIG. 6 is performed.

That is, when the interrupt command signal lNTa is input, first step P! The C register in the CPU 100 is set to 1, and in order to wait for the input of the interrupt command signal lNTb, the C register is set to 2 by the process of step P2.

Then, in step P3, t in the CPU 100
Preset the value of counter 7 in the register. In the subsequent step P4, the peak level data of the A/D converter 11 is read from the latch 12 and set in the b register in the CPU 100.

Then, in step P5, the flip-flop 14
Or clear flip-flop 15.

In the following step P6, the contents of the a, b, and t registers are transferred and stored in the work memory 101, and the interrupt processing is ended.

In this way, each time a zero-crossing point is passed, the data (C register) indicating whether this zero-crossing point is after the maximum peak point or the minimum peak point, Peak level data (b register), count data (t
register) is being set.

In the main routine (FIG. 7), in step Sl, the work memory 101 is
The contents of a', b', and t' are shown as a', b', and t' because they are the same as a, b, and t above, and were recorded last time.
It judges whether or not the interrupt has been written, and if no interrupt processing is being performed, the judgment is NO, and after performing the processing of steps S34 and 335, which will be described later, the operation of executing step S1 is repeated.

If YES is determined in the above step S1, the process proceeds to the first step S2, and its content a'.

Read out b', t' Next, in step S3, read out the peak value of the same type (that is, maximum or minimum) of the peak point stored in the AMP (a') register to the C register in the CPU 100; The peak value b' extracted this time is set in the above AMP (a') register, and the count value at the zero crossing point is stored in the t register.
t(a') register related to the peak point (maximum or minimum).

Next, in steps 54 to S6, it is determined whether the contents of the 5TEP register are 3.2 and 1, respectively. If this is the first state, the 5TEP register is 0, so a NO determination is made in steps S4, Ss, and S6. Then, in step S1, it is determined whether the peak value b' detected this time is greater than 0NLEVI.

If the peak value b' is smaller than 0NLEVI, the process returns to step Sl since the process for starting sound generation is not yet performed. If 0 as shown in Figures 10(a) and 11(a),
If an input larger than NLEVI is obtained, the determination in step S7 is YES, and the process proceeds to step S8.

Then, in step S8, the 5TEP register is set to 1, then in step S9, the REVERSE register is set to O, and then in step SIo.

a' (that is, 1 at the zero cross point immediately after the maximum peak point)
, at the zero cross point immediately after the minimum peak point, set the value of 2) to 5
Input to IGN register.

Then, in step S, the value of t' is set in the T register, and in step S32, pitch data TO of the waveform period of the open string sound is set in the CH(a') register.

As a result, the contents of a' are stored in the 5IGN register (in the case of Figures 1θ (a) and il1 (a), 5IGN becomes 1), the contents of b' are stored in the AMP register, and the contents of t' are stored in the T This means that it is set in the register. And step S again! Return to

Now, with the above explanation, the processing of the main routine immediately after the zero cross point Zero in FIGS. 10(a) and 11(a) is completed.

Now, next, the processing in the main routine immediately after the zero cross point Zero2 will be explained. At that time, step 3
14 Data set processing and pronunciation stage discrimination processing of S2→S3→S4→S5→S6 are executed, and if YES is determined in step S6, the process proceeds to step S12.

Now, when the waveform changes in the positive direction at the time of input, as shown in FIGS. 10(a) and 11(a).

Since the 5IGN register is 1 and the peak in the negative direction has passed this time, the a register is 2, so the determination is NO. Incidentally, if a zero cross point arrives immediately after the peak value of the same polarity, a YES determination is made in step 512 and the process returns to step S1 without any further operation.

Now, in this step 512, the judgment is No, and the process goes to step S+3, where the 5TEP register is set to 2. (See FIG. 10(b) and FIG. 11(b)).

Then, following step 513, step S is executed to compare the previous peak value (AMP (SIGN)) and the current peak value (b'). Now, Figure 1θ (JL)
As in, the previous value XO is smaller than the current value I1 (x+>xo
), the answer is YES, and the current time t' is to be the starting point of cycle measurement (see Figure 510 (c)) Step 31
4, execute S+o, S++, and S32, set the 5IGN register to 2, transfer the contents of the t register to the T register, and transfer the pitch data To of the open string period to CH(a'
) register.

Conversely, if the previous peak value is larger than the current peak value, that is, as shown in Figure 11 (1k), X! If <x6, a No judgment is made in step S14 and step S15
The REVER3E register is set to 1 in step S32.
Pitch data of the waveform period of the open string sound To tcH
(a') Set in register. Note that the 5IGN register now maintains the previous value l. Therefore, in this case, the previous zero crossing point (Zerol) is the starting point for period measurement (see FIG. 11(C)).

Now, after passing the zero cross point Zero2, as shown in FIG. 12, when the maximum peak level drops sharply from the previous maximum peak level, the attenuation occurs according to the time constant CH of the capacitor C and the resistor R of the maximum peak detection circuit 4. Since the ratio is small, the maximum peak detection signal is not output, and as a result, the flip-flop 14 is not set, and the input command signal lNTa+ is not applied. Then, when a time of 10 minutes has passed since the previous zero cross point Zero, the CPU 100 executes a', b, after step Sl.
Step S3 performed when there is no new data in ', t'
4.53sfCHG1. Execute the CHG2 subroutine.

In the CHGI subroutine, in step U1, the count value at the zero-crossing point Zero of the register t(1) is subtracted from the current count value of the counter 7, and the time from the zero-crossing point Z6rol to the present is CH(1).
It is determined whether the period is longer than the open string period To in the register. In this case, since 10 minutes have already elapsed, the CPU 100 changes the set signal 5ETA for the flip-flop FF of the maximum peak detection circuit 4 from 0 to 1 in step U2, and then returns without a single pulse.

As a result, the flip-flop FF of the maximum peak detection circuit 4 is set, the transistor Tr becomes conductive, and the time constant of the maximum peak detection circuit 4 changes from CR to (1/l 1)CR.
, the attenuation rate for maintaining the peak level becomes thicker, and as shown by the dotted line in FIG. 12, it becomes possible to capture the maximum peak level again.

Subsequently, the process of step S35, that is, subroutine CH
G2 is performed, but a NO determination is made in step U3, and the process returns to step S1 without performing any processing, and thereafter steps S+, S34, and S35 are repeated to wait for the next interrupt.

In this way, at the next zero-crossing point, the interrupt command signal lNTa is output again, and even if the level of the input waveform suddenly drops, the peak point of the waveform can be reliably caught and the fundamental frequency (pitch) of the input waveform can be successfully extracted. be able to.

Similarly, in the CHG2 subroutine, the above t(
2) Subtract the count value at zero cross point Zero2 of the register. It is determined whether the time from zero cross point Zero2 to the present is longer than the open string period TO in the CH (2) register, and if it is longer,
In step U4, the set signal 5ETB for the flip-flop FF of the minimum peak detection circuit 5 is changed from 0 to 1,
One pulse is shining. In the example shown in FIG. 12, a negative determination is made in step U3, and the process returns to step Sl.

As a result, the flip-flop FF of the minimum peak detection circuit 5 is similarly set, the transistor Tr is made conductive, and the time constant of the minimum peak detection circuit 5 is changed from CR to (1/
l 1) CR becomes smaller, the attenuation rate of peak level maintenance becomes larger, and the minimum peak level can be captured again.

In this way, at the next zero-crossing point, the interrupt command signal lNTb is output again, and even if the level of the input waveform suddenly drops on the minimum peak point side, the peak point of the waveform is reliably caught and the fundamental frequency (pitch) of the input waveform is ) Extraction can be performed well.

Then, when the maximum peak detection signal or the minimum peak detection signal is output again, the flip-flops FF of the maximum peak detection circuit 4 or the minimum peak detection circuit 5 are
As shown in the figure, since the signal is passed to the clear terminal and cleared, the time constant returns to the original CR, and the attenuation rate returns to a gentle one again.

In this way, only for the part of the waveform where there was a sudden attenuation,
The attenuation rate can be changed.

Further, in steps U and U3 described above, if 10 minutes of the open string period has not elapsed since the previous zero-crossing point, the process returns directly.

Now, when executing the main flow for the first time after passing the first-order zero cross point (Zero3), select Y in step S5.
ES is judged and proceeds to step S+6, this time a
' is l, and in the case of Figure 1O, 5IGN is 2, 1st
In the case of Fig. 1, 5IGN is 1, so in the case of Fig. 10, the judgment of No is made in step SI6, and the process goes to step S+5 and step S! Return to In other words, the first peak (amplitude
), the CPU 100 recognizes that it has passed.

In the case of FIG. 11, in step 516, Y
After the ES is determined, the process goes to step 317 and REVER.
Judge whether the 3E register is 1 or not. If it is not 1, a NO judgment is made and the process returns to step S1, but as described above, this register has become 1 by executing step 315, and the process goes from step S17 to step sea, where the 5TEP register is set to 3 and the process shown in FIG. (b)), then in step 519, the value in the T register, that is, the time of the zero cross point Zerol, is subtracted from the value of the counter 7 that was accepted by the current interrupt in the T register, and the PE
Store in RIOD register.

In other words, the length shown in FIG. 11(C) is the length of one cycle, and in the subsequent step S2G, the contents of t' are transferred to the T register and a new cycle measurement is started.

Then, in step 321, the CPU 100 uses the contents of the above-mentioned PERIOD register to store the frequency ROM 8,
A sound generation command is issued to the sound source circuit 9, and therefore musical sounds are generated from this point onwards. Subsequently, in step 333, the CPU 100 sets pitch data t1 for one cycle of the input waveform obtained in step S+q above in the CH(1) register.

Now, in the case of Figure 1θ mentioned above, again in the main flow processing after the next zero cross point (Zero4),
Jumps from step S5 to step S8. now,
Since the 5IGN register is 2, the result is YE in step S16.
Determine S, and then proceed to step S l/+ in the same manner as above.
S 18 → 519 → 520 → 521 sound generation start processing is executed, and this time the zero cross point Zer shown in FIG. 10 (C) is executed.
The CPU 100 recognizes the period from o2 to Zero4 as one cycle, and starts producing a musical tone with a frequency based on this length,
Pitch data t2 for one period of the input waveform is set in the CH(2) register (see # in FIG. 10(d)).

In this way, period measurement processing starts from the zero-crossing point next to the peak point with a large value, and ends at the zero-crossing point next to the peak point on the same side as the peak point, and the low-pass filter One period of the waveform of 3 outputs is extracted.

After this sweating start processing, the main routine proceeds from step S4 to step S22, where it is judged whether or not the value of b', which is the beak image taken in this time, exceeds 0FFLEV as shown in FIG. do.

If it exceeds this level, the process advances to step S23, where it is judged whether relative on processing is to be performed. That is, specifically, the current peak value (b') is 0N lower than the previous peak value (C).
It is judged whether the extracted peak value is large by LEVII, that is, whether the extracted peak value suddenly becomes large during issuance.

If the string vibrates to its normal value, natural damping will occur, so the answer to step S23 will be NO. However, if the string is operated again before the previous string vibration has finished damping due to tremolo playing, etc. The determination in step S23 may be YES.

In that case, the judgment in step S23 is YES, the process jumps to step S8, and the preparation process for starting the sound generation in steps S59 to S is executed.

As a result, the 5TEP register becomes 1, and the same operation as that at the start of sweating described above is performed thereafter. In other words, the sound generation start process from step 316 to S2+ is then executed to perform the +1) sound generation start process.

Now, in the normal state, as described above, step S23 is followed by step S24 to compare the contents of a' and the contents of the 5IGN register, and if they do not match, proceed to step 315 and prepare for the next zero-crossing point interrupt processing. , if they match, then the peaks with opposite characteristics (positive/negative peaks) have already been passed +7) Te, Step S? Go to 5 and R
Judge whether the EVERSE register is 1 or not, and if NO
If so, the process returns to step S1 without performing any processing, but if YES is determined in step S25, the process proceeds from step 325 to step S26 and calculates a new period (pitch) from the contents of the t' register. T
Subtract the contents of the register and set it in the PE RI 00 register.

Then, in step S27, the contents of the t register are changed to T
The CPU 100 performs frequency (pitch) control on the frequency ROM 8 and the tone generator circuit 9 based on the value of the PERIOD register determined in step S2+3.

In other words, in this embodiment, changes in the vibration frequency of the string are detected moment by moment, and frequency control is performed in real time accordingly.

Then, proceeding from step 828 to step 329, R
Set the contents of the EVER5E register to 0, and proceed to step S33.
Then, the pitch data for one cycle of the input waveform obtained in step 326 is set in the CH(a') register, and the next cycle is measured.

Here, as shown in FIG. 13, due to the tremolo playing method described in 1-2, the bead 2 comes into contact with the string, the waveform level suddenly decreases, and the waveform level at the previous waveform synchronization t1. Even if a time longer than t2 has passed, the maximum or minimum peak detection signal is not obtained, and as a result, the interrupt command signal INT cannot be generated, and if new data is not set in the work memory 101 in step Sl, the above-mentioned Step 33
4.535 (step U, , U2 or U3, U4
) is executed, the peak point is captured, and one period (pitch) measurement is restarted.Similarly, even if the level of the input waveform suddenly drops, the peak point of the waveform is reliably captured and the input waveform is The fundamental frequency (pitch) can be extracted well. Furthermore, in the case of FIG. 13, the peak of the waveform increases rapidly, so that the above-mentioned relative-on processing can be performed reliably.

Then, as described above, when the first string vibration is attenuated and the peak value becomes less than 0FFLEV, the process goes from step S22 to step 330 and the 5TEP register is set to 0.
Then, in the subsequent step S31, note-off processing (silence processing) is performed, and the C
The PU 100 instructs the sound source circuit 9.

Note that when increasing the attenuation factor, it was increased by connecting a resistor R/10 in parallel, but a capacitor may be used instead of the resistor R/10. In this case, an inverter is connected to the Q output of the flip-flop FF. When increasing the attenuation factor by attaching R/10, the capacitor in place of the resistor R/10 may be disconnected to reduce the combined capacitance of the capacitors.

Further, in the above embodiment, the CPU 100 performs interrupt processing at the zero cross point immediately after each peak point to start sound generation.
Processing such as cycle calculation, relative on, and start of muting is performed, but these processes may be performed directly at the time of detecting each peak point, and in that case, exactly the same result can be obtained. In addition, for example, the same process as above may be performed by detecting the zero cross point immediately before the peak point.
The method of determining the reference points can be changed in various ways.

Furthermore, in the above embodiment, the value of the CH(a') register at the start of sound generation is set as the period of the open string scale to increase the precision of one frequency extraction. It may be set as a cycle, or a fixed time period from the start to the end of sound generation may be set in the CH(a'') register.

Further, in the above embodiment, each process is executed in the main flow, but similar processes may be executed in the interrupt process.

Further, in the above embodiment, the present invention is applied to an electronic guitar, but the present invention is not necessarily limited thereto, and pitch extraction may be performed from an audio signal or an electrical vibration signal input from a microphone, etc. Any type of system may be used as long as it generates an acoustic signal different from the original audio signal at a corresponding pitch or scale frequency. Specifically, a system with a keyboard such as an electronic piano may be used. The present invention can be similarly applied to digitized wind instruments and digitized one-string instruments, such as violins and kotos.

[Effects of the Invention] As detailed above, the present invention increases the attenuation rate for holding the peak level when no peak point is detected for a predetermined period of time, so that the level of the input waveform does not suddenly increase. In addition to being able to reliably grasp the peak point of the waveform and extract the frequency (pitch) of the input waveform well even when the waveform is depressed, it is also possible to detect the waveform level when the waveform level suddenly changes during the period when the finger or pitch is touching the string during tremolo playing. This has the advantage that the peak point of the waveform can be detected even when the waveform becomes small, and that it can be accurately determined that the peak level will suddenly increase in the next successive sound, thereby ensuring that the relative is turned on.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the overall circuit configuration of an input control device for an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a configuration diagram of a maximum peak detection circuit, and FIG. 3 is a configuration diagram of a minimum peak detection circuit. 4 is a circuit configuration diagram showing another example of the maximum peak detection circuit, FIG. 5 is a configuration diagram of a zero-crossing point detection circuit, and FIG. 6 is a diagram showing a flowchart of a CPU interrupt routine.
FIG. 7 is a flowchart of the main routine of the CPU, FIGS. 8 and 9 are flowcharts of the subroutine of the CPU, and FIGS. 1θ and 11 are time charts showing the operation of each part at the start of sound generation. 12 and 13 are time charts when there is a sudden attenuation of the input waveform, FIG. 14 is a time chart showing the operation at the start of muting, and FIGS. 1 is a diagram showing a conventional example. 1...Input terminal, 4...Maximum peak detection circuit, 5...Minimum peak detection circuit, 6...
...Za cross point detection circuit, 7...Counter, 9...Tone source circuit, 12...Latch,
14.15...Flip-flop, 100...
...CPU, 101...Work memory, P
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Claims (3)

[Claims] (1) A holding means for holding the peak level of an input waveform signal while attenuating it at a predetermined attenuation rate, a detecting means for detecting a new peak point that exceeds the holding level of this holding means, and a peak detected by this detecting means. a measuring means for measuring a time interval of a point or a point related to the peak point; an instructing means for instructing to generate a musical tone of a corresponding frequency based on the time interval measured by the measuring means; It is characterized by comprising a determining means for determining that no new peak point is detected by the detecting means for a predetermined period of time, and attenuation rate control means for increasing the attenuation rate of the holding means in accordance with the determination result of the determining means. Input control device for electronic musical instruments. (2) The predetermined time period for which the discrimination means makes the discrimination is characterized in that the input waveform signal corresponds to a time interval of one period of a predetermined pitch, or to the latest time interval measured by the measurement means. An input control device for an electronic musical instrument according to claim 1. (3) A patent claim characterized in that the attenuation rate control means includes means for returning the attenuation rate to its original size if a new peak point is discovered by increasing the attenuation rate. The input control device for an electronic musical instrument according to item 1.