JPH0648556Y2 - Input control device for electronic musical instruments - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an input control device for an electronic musical instrument such as an electronic guitar, and in particular, responds to a change in the level of an input waveform signal to reliably catch the peak point of the waveform, The present invention relates to a device capable of favorably extracting a fundamental frequency (pitch) of an input waveform.

[Prior Art] Conventionally, a pitch (frequency) is extracted from a waveform signal generated by a performance operation of a natural musical instrument, and a sound source device composed of an electronic circuit is controlled to artificially obtain a sound such as a musical sound. Various products have been developed.

In this type of electronic musical instrument, when extracting the pitch of the input waveform signal, such as between the maximum peak points or the minimum peak points of the input waveform or between the zero cross points immediately after these peak points or between the zero cross points immediately before the peak points. It is considered to measure the time interval between points related to the peak point. Among these, Japanese Patent Publication No. 57-58672 and Japanese Unexamined Patent Publication No. 55-55398 are used to measure the peak point.

16 and 17 show examples of the maximum peak detection circuit 4 and the minimum peak detection circuit 5 for detecting the maximum peak point and the minimum peak point. The input waveform signal is input to the + terminal of the operational amplifier 4-1, and the operational amplifier 4-
The output terminal of 1 is connected to the anode side of the diode D1, and the cathode side of the diode D1 is grounded via the capacitor C and the resistor R connected in parallel, and is also connected to the-terminal of the operational amplifier 4-1. The output of the operational amplifier 4-1 is output as the maximum peak detection signal via the resistor R2 and the inverter 4-2.

If a waveform as shown in FIG. 5 is given to the + terminal of the operational amplifier 4-1, the capacitor C is charged when the waveform level rises, and the time constant when the waveform level falls.
It is discharged at a rate according to CR, the waveform as shown in Fig. 5 is input to the-terminal of operational amplifier 4-1, and the difference value between the + terminal and the-terminal is output only when the waveform level rises. It is inverted by -2 and output in the form of the signal shown in.

Further, the minimum peak detection circuit 5 is almost the same as the maximum peak detection circuit 4 except that the direction of the diode D2 is reversed and the buffer 4-4 is used instead of the inverter 4-2.
The capacitor C is repeatedly charged and discharged in the opposite direction as shown in FIG. 5, and the minimum peak detection signal as shown in FIG. 5 is output.

The time constant between the capacitor C and the resistor R of the peak detecting circuits 4 and 5 is very large, and the signal attenuation rate is gentle. This is to detect only the maximum or minimum peak point when many harmonics are included and there are several peak points in one cycle.

[Problems of Prior Art] However, for example, when a string is strongly repelled in an electronic guitar and the string hits a fret or the like with respect to the maximum peak detection circuit 4 and the minimum peak detection circuit 5 as described above, If the input waveform signal decays rapidly, the peak hold level of the previous waveform cannot exceed the peak portion of the next waveform, making it difficult to extract the pitch. However, there is a problem in that the sound cannot be emitted well.

[Object of the Invention] The present invention has been made in view of the above circumstances. Even if the level of the input waveform fluctuates suddenly, the peak point of the waveform is surely caught to extract the fundamental frequency (pitch) of the input waveform. It is an object of the present invention to provide an input device for an electronic musical instrument which can be satisfactorily performed.

[Summary of the Invention] In order to achieve the above-mentioned object, the present invention is, as shown in FIG. 12, a peak level value held by a holding means for holding the peak level of an input waveform signal while attenuating it at a predetermined attenuation rate. The main point is to increase the attenuation rate for holding (holding) the peak level while attenuating the peak level.

As a result, even when the level of the input waveform is high and its attenuation rate is also high, the peak point of the waveform can be reliably caught and the fundamental frequency (pitch) of the input waveform
The extraction can be performed well.

First Embodiment Hereinafter, one embodiment in which the present invention is applied to an electronic guitar will be described in detail with reference to the drawings.

In the first embodiment, as will be described below, the resistor R and the capacitor C serve as holding means, the operational amplifier 4-1, the diodes D1 and D2 serve as detecting means, the maximum peak detecting circuit 4, the minimum peak detecting circuit 5, and the zero crossing. The point detection circuit 6, the flip-flops 14 and 15, the AND gates 24 and 25, the inverter 30, and the CPU 100 that executes steps S ₁₉ and S ₂₆ are the measuring means, and the CPU 100 that execute steps S ₂₁ and S ₂₈ are the instructing means. The Zener diode ZD corresponds to the discriminating means and the damping rate control means, respectively. In the second embodiment described later, the control unit 20 that executes step T ₈ is the holding means and the control unit 20 that executes steps T ₄ and T _2.
Corresponds to the detecting means, the control unit 20 executing step T _{6 corresponds} to the discriminating means, and the control unit 20 executing step T ₇ corresponds to the damping rate control means. The measuring means and the instructing means are the same as those in the first embodiment. Is.

Overall Circuit Configuration FIG. 1 shows the overall circuit configuration of the first embodiment.
The signal of one input terminal 1 is a signal from a pickup provided on each of the six strings stretched on the electronic guitar body and converting the vibration of the strings into an electric signal.

The tone signal from the input terminal 1 ...
P6 (In the figure, the internal structure is shown only for P1 of the first string.) It is amplified by each internal amplifier 2 ……, the high-frequency component is cut by the low pass filter (LPF) 3 ……, and the basic waveform is Maximum peak detection circuit (MAX) 4 extracted
.., to the minimum peak detection circuit (MIN) 5 ... and the zero-cross point detection circuit (Zero) 6. In the low-pass filter 3, ..., The cutoff frequency is set to 4f, which is four times the vibration sound frequency f of the open string of each string. This is because the frequency of the output sound of each string is within 2 octaves. The maximum peak detection circuit 4 ... Detects the maximum peak point of the musical tone signal, and the flip-flop 14 connected to the subsequent stage at the rising edge of the detected pulse signal.
The Q output of becomes high level, and this flip-flop 14
...... Output and zero-cross point detection circuit 6 …… Inverter 30
AND output and the inverting output of ... is given to the CPU100 as an interrupt command signal INT _a1 to INT _a6 through the AND gates 24 ..., similarly even the minimum peak detector 5 ..., the minimum peak point of the musical tone signal At the rising edge of the detected pulse signal, the Q output of the flip-flops 15 ... Connected to the subsequent stage becomes High level, and the flip-flops 15 ...
The AND output of the output of ... and the output of the zero-cross point detection circuit 6 ... is an interrupt command signal via the AND gate 25.
It is given to the CPU 100 as INT _{b1 to} INT _b6 .

That is, the maximum peak point is detected and the flip-flop 14 is
At high level, when the waveform crosses from positive to negative, the interrupt command signals INT _{a1 to} INT _a6 are given to the CPU100, and conversely the minimum peak point is detected and flip-flop
Interrupt command signals INT _{b1 to} INT _b6 are input to the CPU 100 when the waveform changes from negative to positive while 15 is at the high level.

Immediately after receiving these interrupt command signals, the CPU 100 resets the corresponding flip-flops 14 ..., 15 ... by generating clear signals CL _{a1 to} CL _a6 and CL _{b1 to} CL _b6 .

Then, the CPU 100, and an interrupt command signal INT _a1 to INT _a6 or INT _b1 to INT _b6 given by the vibration output of the strings, to generate a chromatic note in accordance with at least one of the time intervals of the respective time interval. It should be noted that at the start of sounding, generation of an open string scale tone may be started, and the pitch may be extracted and then corrected to the correct frequency. The operation at the start of sound generation will be described later.

Then, the above-mentioned time interval is set by the counter 7 as described later.
And the work memory 101. That is, the work memory 101 stores various data such as the count value of the counter 7 at the zero cross point immediately after the maximum peak point or immediately after the minimum peak point.

After the start of sound generation, the frequency of the musical tone being generated is variably controlled according to the time interval data that is sequentially obtained. I.e.
The CPU100 sends the data designating the scale to the frequency ROM8, and as a result, the frequency data showing the corresponding frequency is read out and sent to the tone generator circuit 9 to generate a musical tone signal, which is emitted from the sound system 10. .

The tone signal from the low pass filter 3 ...
It is given to the A / D converter 11 ... and converted into digital data according to its waveform level.

And the output of this A / D converter 11 ... is the latch 12 ...
Latched by ... The latch signal for the latch 12 ... Is generated by the output of the flip-flops 14 ..., 15 ... through the OR gate 13 ..., and is output to the latch 12 ... whenever the maximum peak point or the minimum peak point is passed. Stores a signal indicating the level of the waveform at that time. The latch signals L _{1 to} L ₆ from this OR gate 13 ...
Also given to U100. And the latch 12 ... Output is CPU1
It is given to 00, and the start and stop of sound generation, and the control of the sound emission level (volume) of the output sound are performed according to this data.
The peak value, which is the peak value stored in the latches 12 ... Is sequentially written in the work memory 101.

That is, in the CPU 100, when the absolute value of the data indicating the waveform level given by the A / D converter 11 ... becomes equal to or higher than a predetermined constant value, the tone generation is started and the pitch (fundamental frequency) is extracted. Also, when this data falls below a certain value, a mute instruction is issued and sound emission is ended. The details of the operation are as described later.

In FIG. 1, the A / D converter 11 is independently provided in each of the pitch extraction circuits P1 to P6, but it is of course possible to use one A / D converter in a time division manner.

The frequency ROM 8 and the tone generator circuit 9 form a tone generation system of at least 6 channels by time division processing.

Configurations of the maximum peak detection circuit 4, the minimum peak detection circuit 5, and the zero-cross point detection circuit 6 FIG. 2 shows the maximum peak detection circuit 4, and FIG. 3 shows the specific configuration of the minimum peak detection circuit 5, respectively. In the maximum peak detection circuit 4 and the minimum peak detection circuit 5,
The difference from the conventional maximum peak detection circuit 4 of FIG. 16 and the minimum peak detection circuit 5 of FIG. 17 is that a resistor R / 10 and a Zener diode ZD are provided. That is, the cathode side (the anode side in FIG. 3) of the Zener diode ZD is connected to the diodes D1 and D2 via the resistor R / 10, and the anode side (the cathode side in FIG. 3) of the Zener diode ZD is grounded. , The resistor R / 10 is connected in parallel with the resistor R and the capacitor C together with the Zener diode ZD. The breakdown voltage of this Zener diode ZD is 5.6V.

Therefore, when the peak level value of the input waveform signal exceeds 5.6V (when it is smaller than -5.6V in the minimum peak detection circuit 5), the Zener diode ZD becomes conductive and the resistance R / 10
Current also flows, and the combined resistance of the resistance R / 10 and the resistance R becomes smaller than R / 11 compared to the single resistance R,
The time constant determined by the capacitor C decreases from CR to R / 11, and the peak level is attenuated and held (hold).
The damping rate when doing is large.

Further, FIG. 4 shows a concrete configuration of the zero-cross point detection circuit 6, in which the waveform signal from the low-pass filter 3 is given to the + terminal of the operational amplifier 6-1, and the ground level is connected to the-terminal. The output of operational amplifier 6-1 is resistor R
5, output via amplifier 6-2. Therefore, when there is a positive level input signal, the amplifier 6-2 outputs High, and when there is a negative level input signal, the amplifier 6-2 outputs
Low output. That is, the output level is inverted every time the zero cross point is passed.

5 shows a time chart of the signal waveform of each part in the pitch extraction circuit P1, where the output of the low pass filter 3 is the output of the maximum peak detection circuit 4,
Is the output of the minimum peak detection circuit 5, is the output of the zero-cross point detection circuit 6, is the interrupt command signal INT _{a1 to} INT _a6 ,
Are interrupt command signals INT _{b1 to} INT _b6 .

Operation Next, the operation of this embodiment will be described. Figure 6 shows CPU100
7 is a main flow of the interrupt routine of FIG. Although FIG. 6 and FIG. 7 show only the processing for one string, the processing for all the strings is exactly the same, so if the CPU 100 executes the processing for each string in a time-division manner. good.

Registers in Work Memory 101 Now, before describing specific operations of the CPU 100, main registers in the work memory 101 will be described.

The STEP register has four stages of 0, 1, 2, and 3, and as string vibration is made (see FIG. 8 (a) or 9 (a)), FIG. 8 (b) or FIG. The contents change as shown in (b). When this STEP register is 0, it indicates a note-off (silence) state.

The SIGN register indicates whether the zero-cross point for period measurement is the next zero-cross point after the maximum peak (MAX) point or the minimum peak (MIN) point.
When it is 1, it is the former, and when it is 2, it is the latter.

In the REVERSE register, the zero crossing point at the time of this interrupt processing is the zero crossing point (the zero crossing point next to the maximum peak point or the zero crossing point next to the minimum peak point) indicated by the contents of the SIGN register and the peak point on the opposite side (minimum). The data for checking whether it is the zero cross point next to the peak point or the maximum peak point) is stored. That is, REVE
When the SIGN register is 1, the RSE register indicates the zero crossing point next to the maximum peak point. Therefore, the peak point on the opposite side, that is, the zero crossing point next to the minimum peak point, arrives. Stores the data for checking whether or not the interrupt process this time is performed, and is used for checking the pitch (fundamental frequency) extraction control for each cycle.

The T register stores the value of the counter 7 at a specific point for measuring the cycle of the input waveform. The counter 7 is performing a free running operation of counting with a predetermined clock.

The AMP (i) register is a register for storing the maximum or minimum peak value (actually an absolute value) latched in the latch 12 from the A / D converter 11, and AMP (1) is for the maximum peak and AMP (2) Is the register for the minimum peak.

Data representing the measured period is input to the PERIOD register, and the CPU100 determines the frequency based on the contents of this register.
Frequency control is performed on the ROM 8 and the tone generator circuit 9.

Furthermore, as will be described later, the present embodiment is not limited to 3 for various judgments.
Two constants (threshold levels) are set in CPU100.

The first one is ONLEVI, and as shown in FIG. 8 (a) and FIG. 9 (a), it is in the note-off state now, and when a peak value larger than this ONLEVI value is detected,
Assuming that the strings have been picked, the CPU 100 starts the operation for measuring the cycle.

ONLEVII is in the note-on state (while sounding), and if the difference between the previous detection level and the current detection level is more than this value, it is determined that there is an operation by the tremolo playing method etc., and sound is started again (relative on, Relative on) processing is performed.

As shown in FIG. 10 (a), the OFFLEV is in the note-on state (during sound generation), and when a peak value less than this value is detected, the note-off (silence) processing is performed.

From the above description, it will be easy to understand the operation of the interrupt routine and the main routine described below.

Attenuation rate and change operation of peak level Now, as shown in FIG. 11, when the peak level value of the input waveform signal of the maximum peak detection circuit 4 and the minimum peak detection circuit 5 is ± 5.6 V or less, the operational amplifier 4- The output voltage of 1 also becomes ± 5.6V or less, the anode side (cathode side in Fig. 3) voltage of the Zener diode ZD does not exceed the breakdown voltage 5.6V, the Zener diode ZD does not conduct, and the maximum peak detection circuit 4 The time constant of the CR circuit of the minimum peak detection circuit 5 is as large as CR, and the attenuation rate for holding the peak level is small.

On the other hand, when a waveform signal having a peak level value greatly exceeding 5.6V as shown in FIG. 12 is input to the maximum peak detection circuit 4 and the minimum peak detection circuit 5, the output voltage of the operational amplifier 4-1 is changed. Over 5.6V, Zener diode ZD
The anode side voltage (cathode side in Fig. 3) is the breakdown voltage 5.
Since it exceeds 6V, the Zener diode ZD becomes conductive, and the time constants of the CR circuits of the maximum peak detection circuit 4 and the minimum peak detection circuit 5 are reduced to CR / 11, so that the attenuation factor for maintaining the peak level changes to a large value. .

As a result, even when the level of the input waveform signal is high and the attenuation rate thereof is also high, the peak point of the waveform can be reliably caught, and the pitch extraction of the input waveform signal described later can be performed well.

Then, when the hold waveform signal of the peak level of the input waveform signal becomes 5.6V or lower (-5.6V or higher), the Zener diode ZD does not conduct again, so the CR circuits of the maximum peak detection circuit 4 and the minimum peak detection circuit 5 The time constant of returns to the original large CR, and the decay rate of the peak level retention returns to the small one again.

Interrupt processing at zero-cross point Now, when the interrupt command signals INT _a and INT _b output from the AND gate 24 or AND gate 25 arrive at the CPU 100, the interrupt processing of FIG. 6 is performed.

That is, the interrupt command signal to the INT _a at the input, first the process in step P _1, the a register in the CPU100 to 1, an interrupt command signal INT _b On input, first the process in step P ₂ in the a register 2 Set.

And then at step P _3, the t registers in CPU 100, presets the value of the counter 7. In the subsequent step P ₄ , the peak level data of the A / D converter 11 is read from the latch 12 and set in the b register in the CPU 100.

Then, in step P ₅ , the flip-flop 14 or the flip-flop 15 is cleared.

In a succeeding step P ₆ , the contents of the a, b and t registers are transferred and stored in the work memory 101 to complete the interrupt processing.

Main Processing In the main routine (FIG. 7), it is determined in step S ₁ whether the interrupt processing has been performed. Here, the interrupt processing shown in FIG.
b ', t' content of (the a, b, same as t a at that was last recorded ', b', denoted t '.) is in the case of being written proceeds to step S ₂ If there is no interrupt processing, make a NO decision and proceed to this step.
Repeat S ₁

Then, if YES is determined in the above step S ₁ , the process proceeds to the next step S ₂ to read the contents a ′, b ′, t ′.
Next, in step s ₃ , the peak value of the peak point of the same type (that is, the maximum or minimum) stored in the AMP (a ′) register is read into the c register in the CPU 100, and the peak value b ′ extracted this time is read. Set in the AMP (a ') register.

Now, next step S ₄ to S _6, the contents of the STEP register is judge whether each 3,2,1. Now
If it is the first state, the STEP register is 0, so
NO is determined in steps S ₄ , S ₅ , and S ₆ . Then, in step S _7, it is judged whether or not the peak value b ′ detected this time is larger than ONLEVI.

If it is smaller than the peak value b 'is ONLEVI, because still not processed pronunciation start returns to step S _1. If, Figure 8 (a), when a large input from ONLEVI as FIG. 9 (a) is obtained, the determination in step S ₇ is YES
And proceed to step S ₈ .

Then, in step S ₈ , 1 is set in the STEP register, then 0 is set in the REVERSE register in step S ₉ , and subsequently in step ₁₀ , a ′ (that is, 1 at the zero cross point immediately after the maximum peak point, the minimum peak At the zero-cross point immediately after the point, input the value of 2) to the SIGN register.

Then, in step S _11, it sets the value of t 'to the T register. As a result, the contents of a'are stored in the SIGN register (SIGN becomes 1 in FIG. 8 (a) and FIG. 9 (a)),
The content of b'is set in the AMP register, and the content of t'is set in the T register. Then return to step S ₁ again.

Now, with the above description, the processing of the main routine immediately after the zero-cross point Zero1 in FIGS. 8 (a) and 9 (a) is completed.

Now, the process in the main routine immediately after the zero-cross point Zero2 will be described. In that case, the above steps S ₁ → S ₂
→ S ₃ → S ₄ → S ₅ The data set process and the sounding stage control process are executed, and YES is determined in the next step S ₆ , and the process proceeds to step S ₁₂ .

Now, when the waveform changes in the positive direction at the time of input as shown in FIGS. 8 (a) and 9 (a), the SIGN register is 1, and since the peak in the negative direction has passed this time, a ' Since the register is 2, judge NO. Incidentally, if the time arrives zero-cross point immediately after the peak value of the same polarity, step without operation continues any by the determination of YES in step S ₁₂
Return to S ₁ .

Well, now snow to step S ₁₃ is the judge of step S ₁₂ in NO, the STEP register and 2. (Eighth
See FIG. 9B and FIG. 9B.

And performs step S ₁₄ following the step S _13, the previous peak value (AMP (SIGN)) between the current peak value (b ')
To compare. Now, as shown in FIG. 8A, if the previous value x ₀ is smaller than the current value (x ₁ > x ₀ ), the determination result is YES, and the current time t ′ should be set as the measurement start point of the cycle ( executing step S _10, S ₁₁ from FIG. 8 (c) refer) step S _14, SIGN
The register is set to 2, and the contents of the t'register are transferred to the T register.

REVERSE Conversely, larger than the previous peak value current peak value, i.e. if x ₁ <x ₀ as FIG. 9 (a), in step S ₁₅ the judgment NO at Step S ₁₄ Set the register to 1. The SIGN register will retain the previous value of 1. Therefore, in this case, the previous zero-cross point (Zero1) is the start point of the period measurement (see FIG. 9 (c)).

Then, after passing through the next zero cross point (Zero3), the first time to perform a main flow proceeds is the YES judge at step S ₅ to step S _16. This time, a'is 1, and in the case of FIG. 8, the SIGN is 2, and in the case of FIG. 9, the SIGN.
Since 1 is 1, in the case of FIG. 8, N in step S ₁₆
After being judged by O, he goes to step S ₁₅ and returns to step S ₁ . That is, the CPU 100 recognizes that the first peak (amplitude x ₂ ) has been passed from the beginning of the period measurement.

Further In the case of FIG. 9 is a determination of YES in step S _16, snow REVERSE register is judge whether 1 to step S _17. If it is not 1, NO is determined and the process returns to step S ₁ , but as described above, this register is set to 1 by executing step S ₁₅ , and step S ₁₇
And 3 snow STEP register to step S ₁₈ from (Figure 9 (b) refer), at step S ₁₉ to continue, the value from the value of the counter 7 which is accepted by the current interrupt in the t 'register to the T register That is, the time at the zero-cross point Zero1 is subtracted and stored in the PERIOD register.

That becomes a length of size of one cycle shown in FIG. 9 (c), the contents of t 'in the following step S ₂₀ is transferred to the T register to the start of a new period measurement.

In step S _21, with the contents of the above PERIOD register CPU100 frequency ROM 8, issues a sound command to the tone generator 9. Therefore, a musical sound is generated from this point.

Now, in the case of FIG. 8 described above, again in the processing of the main flow after the next zero cross point (ZERO4), it jumps from step S ₅ to step S _16. Now, SIGN register is 2, a determination of YES in step S _16, followed by performing the sounding start processing of also step _{S 17 → S 18 → S 19} → S 20 → S 21, this time 8 The CPU 100 recognizes the zero-cross points Zero2 to Zero4 shown in FIG. 7C as one cycle, and starts to produce a musical sound of a frequency based on this length (see FIG. 8D).

In this way, the process of period measurement is started from the zero cross point next to the maximum or minimum peak point, and the measurement is ended at the zero cross point next to the peak point on the same side as that peak point. One cycle of a 3-output waveform is extracted.

After the start of sounding processing in the main routine proceeds from step S ₄ to step S _22, the value of which b 'is captured peak time, as shown in FIG. 10
Judge whether or not it exceeds OFFLEV.

Now, the process proceeds to step S ₂₃ if I beyond this level,
Judge whether or not to process relative on (relative on). That is, specifically, it is judged whether or not the current peak value (b ') is larger than the previous peak value (c) by ONLEVII, that is, whether or not the extracted peak value suddenly increases during sound generation.

If vibration normal strings, since the natural attenuation, this step S ₂₃ is the determination NO, the the like if tremolo, while the previous string vibrations Finished attenuated, are operated string again, determination of step S ₂₃ is sometimes is YES.

In that case, step S ₂₃ is the step to a judge's YES
Jump to S _8, to perform the preparation process of the sound the start of the step S ₉ ~ step S _11. As a result, the STEP register becomes 1, and the operation exactly the same as the operation at the start of sounding is executed thereafter. That is, to the process of re-start of sounding and thereafter executes the sounding start processing in step S ₁₆ to S ₂₁ again.

Now, in the normal state by performing the steps S ₂₄ following the step S ₂₃ as described above, the coincidence comparison of the contents of content and SIGN register a ', the matched unless the process proceeds to S ₁₅ following the zero-crossing point interrupt provided to the process, if they match, so has the peak already have opposite characteristics (positive / negative peaks) in each pass, the process proceeds to step S _25, the rEVERSE register 1
Whether to judge, if it returns to step S ₁ without the NO if any processing, if the is a determination of YES in step S ₂₅ is made, a new cycle proceeds from step S ₂₅ to step S ₂₆ In order to obtain (pitch), the contents of the T register are subtracted from the contents of the t'register and set in the PERIOD register.

Then, the contents of t 'register in step S ₂₇ T
PERIO obtained in step S ₂₈ after being transferred to the register
The CPU 100 controls the frequency (pitch) for the frequency ROM 8 and the tone generator circuit 9 based on the value of the D register.

That is, in the present embodiment, the change in the vibration frequency of the string is grasped momentarily, and the frequency control corresponding to it is performed in real time.

Then, proceed from step S ₂₈ to step S ₂₉ to REVERSE
The next cycle is measured with the contents of the register set to 0.

Then, as described above, the string vibrations have decayed, the peak value becomes smaller than the lower OFFLEV as shown in FIG. 10, and 0 snow STEP register from step S ₂₂ to step S _30, the next step S _{At 31,} note-off processing (silence processing) is performed, and CP is used to mute the musical sound that has been produced so far.
U100 will give instructions to the tone generator circuit 9.

[Second Embodiment] FIGS. 13 to 15 show the second embodiment. In this embodiment, the maximum peak detection circuit 4 is constructed as shown in FIG. That is, the input waveform signal from the amplifier 2 is converted into digital data by the A / D converter 11 after passing through the low-pass filter 3, the peak point is caught by the control unit 20, and when the waveform level starts to fall from the peak point, a predetermined value is obtained. This peak level data is subtracted at the attenuation rate of and the peak hold is performed. The peak level or peak hold level is 5V.
In the above cases, it is as large as 1/300 of the peak value and the attenuation rate is large. When it is less than 5V, it is as small as 1/3000 of the peak value and the attenuation rate is also small. While the above peak point is being caught, the control unit 20 outputs the maximum peak detection signal of Low level, and when it is in the peak hold state, the control unit 20
The high-level minimum peak detection signal is output (see Fig. 15).

A microcomputer is used as the control unit 20,
The ROM 21 and the RAM 22 are built in to store processing programs, processing data, and the like. When the data to be A / D converted by the A / D converter 11 becomes smaller than a predetermined value, an end signal is given to the control unit 20 to notify that the input of the waveform signal is completed.

The control unit 20 performs the processing shown in FIG. 14, and first judges in step T ₁ whether or not the end signal is given from the A / D converter 11. If a waveform signal is being input now, the end signal will not be given, so make a NO determination and proceed to step T ₂ where the data in the MAX register in RAM 22 is the waveform of the input waveform signal from A / D converter 11. Judge whether it is higher than the level.

The first value of MAX register "0", because greater in level of the input waveform signal, the control unit 20 proceeds to step T _3, a maximum peak detection signal of "0 (binary logic level Lo
w state) ”, in step T ₄ , the level value of the input waveform signal from the A / D converter 11 is set in the MAX register and the MAX value is updated. Then, as long as the rising edge of the input waveform signal continues, the processing of steps T _{1 to} T ₄ is repeated, and MA
As the X value is updated, the maximum peak detection signal is set to "0" as shown in FIG.

Then, after the level of the input waveform signal reaches the peak point,
Starting lowered, because this time the level of the input waveform signal is less than the MAX value of the MAX register, NO judge is made in step T _2, the control unit 20, at step T _5, the maximum peak detection signal "1 ( Binary logic level high state) "
As a result, in step T ₆ , it is determined whether or not the MAX value is 5V. If it is 5V or more, proceed to step T ₈ and subtract 1/300 of the MAX value.If it is less than 5V, proceed to step T ₇ and subtract 1/3000 of the MAX value, This subtraction process is continued as long as the level of the input waveform signal is smaller than the MAX value.

By changing the subtraction value with 5V as the boundary, the attenuation rate for maintaining the peak level can be increased above 5V, and the attenuation rate can be decreased below 5V. The level of the input waveform signal is high and the attenuation rate is also Even if it is large, the peak point of the waveform can be reliably caught and the pitch of the input waveform signal can be extracted well.

Then, when the input waveform signal rises again during the subtraction processing of steps T ₁ → T ₂ → T ₅ → T ₆ → T ₇ and T ₈ described above,
Judgment of YES is performed at T ₂ , the maximum peak detection signal is set to “0” at steps T ₃ and T ₄ , and the MAX value is updated to the same level value as the level of the input waveform signal.

The minimum peak detection circuit 5 can also be realized by the circuit exactly the same as that in FIG. 13, and in the processing flow of FIG. 14, in the step T ₂ , A / D output ≧ MAX is satisfied instead of A / D output ≧ MAX. determination is made, the minimum peak detection signal each step T _3, T ₅ is set to "0", "1", at step T _4, MAX ← a / D instead of the output setting process of the MIN ← a / D output been conducted, MIN value in step T ₆ is -5V following determination is made, step
For T ₇ and T ₈ , MIN ← (MIN + MIN / 3000) and MIN (MIN + MI)
N / 300) will be subtracted. Other than that, the operation is the same as that of the first embodiment.

In the above embodiment, the CPU100 performs interrupt processing at the zero-cross point immediately after each peak point, starts sounding, calculates the cycle,
Although processes such as relative on and mute start are performed, these processes may be directly performed at each peak point detection. In that case, the exact same result can be obtained. In addition, the same processing as above may be performed, for example, by detecting the zero-cross point immediately before the peak point. In addition, the way of taking the reference points can be variously changed.

Further, in the above embodiment, each process is executed in the main flow, but the same process may be executed in the interrupt process.

Furthermore, although the present invention is applied to an electronic guitar in the above embodiment, the present invention is not necessarily limited to this, and pitch extraction is performed from a voice signal or an electric vibration signal input from a microphone or the like, Any form may be used as long as it is a system that generates an acoustic signal different from the original voice signal at a corresponding pitch or scale frequency. Specifically, it can be similarly applied to those having a keyboard, such as an electronic piano, an electronic wind instrument, and an electronic string instrument such as a violin or a koto.

[Effect of the Invention] As described in detail above, the present invention provides a peak value when the peak level held by the holding means for holding the peak level of the input waveform signal while attenuating the peak level of the input waveform signal exceeds a predetermined value. Since the attenuation rate for holding (holding) the level while attenuating is increased, the peak point of the waveform can be reliably grasped and input when the level of the input waveform is large and the attenuation rate is also large. There is an effect such that the fundamental frequency (pitch) of the waveform can be favorably extracted.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall circuit configuration of an input control device for an electronic musical instrument which is an embodiment to which the present invention is applied, FIG. 2, FIG.
4 and 5 are diagrams showing the concrete circuit configurations of the maximum peak detection circuit 4, the minimum peak detection circuit 5, and the zero-cross point detection circuit 6, respectively, and FIG. 5 is the waveforms appearing in the respective parts in FIG. Fig. 6 shows a flowchart of the CPU interrupt routine, Fig. 7 shows a flowchart of the CPU main routine, and Figs. 8 and 9 show the operation of each part at the start of sound generation. Time chart diagram showing the 10th
FIG. 11 is a time chart showing the operation at the time of muffling, FIGS. 11 and 12 are diagrams showing changes in the attenuation rate of the peak hold level with respect to the input waveform, and FIGS. 13 to 15 are the maximum peaks of the second embodiment. The circuit diagram of the detection circuit 4, the operation flow chart of the control unit 20, the operation time chart, and FIGS. 16 and 17 are circuit diagrams showing the conventional maximum peak detection circuit 4 and minimum peak detection circuit 5. 1 ... Input terminal, 4 ... Maximum peak detection circuit, 5 ... Minimum peak detection circuit, 6 ... Zero cross point detection circuit, 7 ...
… Counter, 9 …… Sound source circuit, 12 …… Latch, 14,15…
… Flip-flops, 20… Control unit, 100… CPU, 101
...... Work memory, P1 to P6 ...... Pitch extraction circuit.

Claims (1)

[Scope of utility model registration request] 1. A holding means for holding a peak level of an input waveform signal while attenuating it at a predetermined attenuation rate, a detecting means for detecting the arrival of a new peak point exceeding the holding level of the holding means, and this detecting means. Measuring means for measuring the time interval of each of the detected peak points or points related to this peak point, and an instruction for instructing to generate a tone of a corresponding frequency based on the time interval measured by this measuring means. In the input control device of the electronic musical instrument, the determining means determines whether the value of the peak level held by the holding means is equal to or more than a predetermined value; An input control device for an electronic musical instrument, comprising: an attenuation rate control means for increasing an attenuation rate of a holding means;