JPS6324669A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6324669A JPS6324669A JP61168734A JP16873486A JPS6324669A JP S6324669 A JPS6324669 A JP S6324669A JP 61168734 A JP61168734 A JP 61168734A JP 16873486 A JP16873486 A JP 16873486A JP S6324669 A JPS6324669 A JP S6324669A
- Authority
- JP
- Japan
- Prior art keywords
- film
- melting point
- point metal
- high melting
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 41
- 238000002844 melting Methods 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 29
- 230000008018 melting Effects 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000010438 heat treatment Methods 0.000 claims abstract description 15
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 10
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910000838 Al alloy Inorganic materials 0.000 claims abstract description 9
- 150000004767 nitrides Chemical class 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 5
- 239000010936 titanium Substances 0.000 description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 11
- 229910052719 titanium Inorganic materials 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 229910021341 titanium silicide Inorganic materials 0.000 description 8
- 238000005121 nitriding Methods 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005255 carburizing Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052861 titanite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置の製造方法に係り、特に大規模集
積回路（以下、ＬＳＩと称する）Ｋおける電極・配線膜
の形成方法に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for forming electrodes and wiring films in a large-scale integrated circuit (hereinafter referred to as LSI) K. be.
近年、ＬＳＩの高集積化に伴ってその素子の電極・配線
に、チタン（Ｔｉ）やモリブデン（Ｍｏ）などの高融点
金属とそのシリコン化合物を使用する技術が種々提案さ
れているが、そのうちチタンのナイトライド化を例にと
って第２図を参照して説明する０
第２図は、例えば特開昭５８−４６６３１号公報に示さ
れた従来の半導体装置の製造方法を示すコンタクトホー
ル部分の断面図である。これは、第２図に示すように、
シリコン基板１上のシリコン酸化膜２の表面にコンタク
トホール３を形成し、次いで、このコンタクトホール３
を含むシリコン基板１上にチタン膜を形成した後、４５
０℃、１５分間の熱処理をすることにより、チタンシリ
サイドＭ５ａを形成する。次に、シリコン酸化膜２上の
未反応チタン膜を除去したうえ、反応性スパッタリング
法によフチタンナイト２イド膜６ａを形成する。そして
、アルミニウム合金膜Ｔを形成した後にパターニングを
行うことにより、コンタクトホール３のバリア金属とし
て、チタンシリサイド膜５ｍとチタンナイトライド膜６
息の２層膜を形成するのである。In recent years, with the increasing integration of LSIs, various technologies have been proposed to use high-melting point metals such as titanium (Ti) and molybdenum (Mo) and their silicon compounds for the electrodes and wiring of the devices. This will be explained with reference to FIG. 2, taking as an example the nitriding of It is. This is as shown in Figure 2.
A contact hole 3 is formed on the surface of the silicon oxide film 2 on the silicon substrate 1, and then this contact hole 3 is
After forming a titanium film on the silicon substrate 1 containing
Titanium silicide M5a is formed by heat treatment at 0° C. for 15 minutes. Next, the unreacted titanium film on the silicon oxide film 2 is removed, and then a titanite dianide film 6a is formed by a reactive sputtering method. Then, by patterning after forming the aluminum alloy film T, a titanium silicide film 5m and a titanium nitride film 6 are used as the barrier metal of the contact hole 3.
It forms the two-layer membrane of breath.
しかし、このような従来の半導体装置の製造方法では、
シリコン半導体基板１上にチタンシリサイド膜５ａを形
成した後、チタンナイトライド膜６ａとアルミニウム合
金膜Ｔを形成しているため、工程が複雑になるという問
題点があった。さらには、チタンは非常に活性な金属で
あるため、チタンシリサイド膜の形成を通常の電気炉で
行なうと、その表面に酸化膜が形成されやすく、コンタ
クト不良が起こりやすいという問題点もあった。However, in such conventional semiconductor device manufacturing methods,
Since the titanium nitride film 6a and the aluminum alloy film T are formed after the titanium silicide film 5a is formed on the silicon semiconductor substrate 1, there is a problem that the process becomes complicated. Furthermore, since titanium is a very active metal, if a titanium silicide film is formed in an ordinary electric furnace, an oxide film is likely to be formed on its surface, resulting in poor contact.
本発明は上記のような問題点を解消するためになされた
もので、工程が簡単で、チタンなどの高融点金属の表面
に酸化膜が形成され々いようにした半導体装置の製造方
法を提供することを目的とする。The present invention has been made to solve the above-mentioned problems, and provides a method for manufacturing a semiconductor device that has a simple process and prevents the formation of an oxide film on the surface of a high-melting point metal such as titanium. The purpose is to
本発明に係る半導体装置の製造方法は、シリコン基板上
の絶縁膜表面にそのコンタクトホールを介して電極・配
線膜を形成する工程において、前記コンタクトホールの
形成後、そのコンタクトホールを含むシリコン基板上に
高融点金属膜を形成する工程と、前記高融点金属膜を同
一雰囲気中で熱処理することによシ、高融点金属窒化膜
／高融点金属シリサイド膜、高融点金属炭化物／高融点
金属シリサイド膜、高融点金属硼化物／高融点金属シリ
サイド膜のいずれかの２層膜を形成する工程と、前記２
層膜上にアルミニウム膜またはアルミニウム合金膜を形
成する工程を具備するものである。In the method for manufacturing a semiconductor device according to the present invention, in the step of forming an electrode/wiring film on the surface of an insulating film on a silicon substrate through the contact hole, after forming the contact hole, By forming a high-melting point metal film on the substrate and heat-treating the high-melting point metal film in the same atmosphere, a high-melting point metal nitride film/a high-melting point metal silicide film, a high-melting point metal carbide/a high-melting point metal silicide film can be formed. , forming a two-layer film of high melting point metal boride/high melting point metal silicide film;
This method includes a step of forming an aluminum film or an aluminum alloy film on the layer film.
本発明における半導体装置の製造方法では、シリコン基
板上のコンタクトホールのバリア金属として高融点金属
窒化膜、高融点金属炭化物、高融点金属硼化膜のいずれ
かと高融点金属シリサイド膜の２層膜を同時に形成する
ことによシ、工程が簡略化されるとともに、熱処理をラ
ンプ加熱法で行うことによって、チタンなどの高融点金
属表面に酸化膜が形成されることがなくなる。In the method for manufacturing a semiconductor device according to the present invention, a two-layer film of a high melting point metal nitride film, a high melting point metal carbide, or a high melting point metal boride film and a high melting point metal silicide film is used as a barrier metal for a contact hole on a silicon substrate. By forming them simultaneously, the process is simplified, and by performing the heat treatment using a lamp heating method, an oxide film is not formed on the surface of a high melting point metal such as titanium.
以下、本発明を図面に示す実施例に基づいて説明する。 Hereinafter, the present invention will be explained based on embodiments shown in the drawings.
第１図は本発明による半導体装置の製造方法の一実施例
を示す工程断面図である。この実施例では、第１図（、
）に示すように１シリコン基板１上に従来と同様の方法
にてシリコン酸化膜２を形成するとともに、コンタクト
ホール３を形成した後、このコンタクトホール３を含む
シリコン基板１上にチタン膜４をスパッタリング法等に
よシ形成する。次に、これを窒化雰囲気１例えばアンモ
ニア中でランプ加熱法によシ熱処理すると、第１図伽）
に示すよう、シリコン基板１上にはチタンシリサイド膜
５とチタンナイトライド膜６の２層膜が、シリコン酸化
膜２上にはチタンナイトライド膜６のみが形成される。FIG. 1 is a process sectional view showing an embodiment of a method for manufacturing a semiconductor device according to the present invention. In this example, FIG.
), a silicon oxide film 2 is formed on a silicon substrate 1 by a method similar to the conventional method, and a contact hole 3 is formed, and then a titanium film 4 is formed on the silicon substrate 1 including the contact hole 3. It is formed by sputtering method or the like. Next, this is heat-treated by lamp heating in a nitriding atmosphere 1, for example, ammonia.
As shown in FIG. 2, a two-layer film of a titanium silicide film 5 and a titanium nitride film 6 is formed on a silicon substrate 1, and only a titanium nitride film 6 is formed on a silicon oxide film 2.
このとき、ランプ加熱による熱処理プロセスは、例えば
、ハロゲンランプを用い、６００℃（３０秒）Ｋ予備加
熱したうえ、さらに８００℃（３０秒）Ｋ昇温させる２
ステツプ法、あるいは最初から８００℃（数〜３０秒）
に昇温させる１ステツプ法によシ容易に行なえる。次い
で、上記チタンナイトライドｇＸ６の上に、第１図（Ｃ
）に示すように、アルミニウム合金膜Ｔを形成した後、
これをパターニングすることによシ、チタンシリサイド
Ｍ５とチタンナイトライド膜６０２層膜をコンタクトホ
ール３のバリア金属とし、かつアルミニウム合金膜Ｔを
その電極・配線膜として形成することができる。なお、
図中、同一符号は同一または相当部分を示している。At this time, the heat treatment process by lamp heating is performed by preheating to 600°C (30 seconds) K using a halogen lamp, and then increasing the temperature to 800°C (30 seconds) K.
Step method or 800℃ from the beginning (several to 30 seconds)
This can be easily done by a one-step method in which the temperature is raised to . Next, on top of the titanium nitride gX6, as shown in FIG.
), after forming the aluminum alloy film T,
By patterning this, the titanium silicide M5 and the titanium nitride film 602 can be used as the barrier metal of the contact hole 3, and the aluminum alloy film T can be formed as its electrode/wiring film. In addition,
In the drawings, the same reference numerals indicate the same or corresponding parts.
このように上記実施例によると、シリコン基板１上のシ
リコン酸化膜２にコンタクトホール３を形成した後、チ
タン膜を形成して、これを窒化雰囲気中でランプ加熱法
にて熱処理することによシ、チタン膜の表面に酸化膜の
形成されないチタンシリサイド膜５とチタンナイトライ
ド膜１を同時に形成できるので、その２層膜を容易に、
しかも再現性良く形成することが可能となる。According to the above embodiment, after forming the contact hole 3 in the silicon oxide film 2 on the silicon substrate 1, a titanium film is formed, and this is heat-treated by lamp heating in a nitriding atmosphere. Since the titanium silicide film 5 and the titanium nitride film 1, which do not have an oxide film formed on the surface of the titanium film, can be formed at the same time, the two-layer film can be easily formed.
Moreover, it becomes possible to form the film with good reproducibility.
々お、上記実施例では、絶縁膜としてシリコン酸化膜を
用いたが、シリコン酸化膜中に砒素、リン、硼素いずれ
か１つ以上の不純物を含むものを用いてもよい。In the above embodiment, a silicon oxide film is used as the insulating film, but a silicon oxide film containing one or more impurities of arsenic, phosphorus, and boron may also be used.
また、以上ではチタンのナイトライド化を例にとシ説明
したが、本発明は、その他のＩＶ、Ｖ、ＶＩ族の金属の
窒化、炭化、硼化のいずれであっても同様に実施するこ
とができる。Further, although the above description has been made using the nitriding of titanium as an example, the present invention can be similarly carried out in the case of nitriding, carburizing, or boriding other group IV, V, or VI metals. Can be done.
さらに１本発明は、熱処理としてランプ加熱法によるも
のに限らず、酸素を取シ込まない構造の熱処理チャンバ
を用いた任意の熱源にて熱処理を行うこともできる。ま
た、アルミニウム合金膜に代えてアルミニウム膜を用い
ることもできる。Furthermore, in the present invention, the heat treatment is not limited to the lamp heating method, but can also be performed using any heat source using a heat treatment chamber having a structure that does not introduce oxygen. Furthermore, an aluminum film can be used instead of the aluminum alloy film.
以上のように本発明によれば、高融点金屑窒化膜、高融
点金属炭化膜、高融点金属硼化膜のいずれかと高融点金
属シリサイド膜の２層膜を同時に形成することにより、
工程が簡略化されるとともに、熱処理をランプ加熱法で
行うことによって、高融点金属の表面に酸化膜が形成さ
れず、コンタクトホールのコンタクトを良好ならしめる
ことができる効果がある。As described above, according to the present invention, by simultaneously forming a two-layer film of a high melting point metal nitride film, a high melting point metal carbide film, a high melting point metal boride film, and a high melting point metal silicide film,
In addition to simplifying the process, by performing the heat treatment using the lamp heating method, an oxide film is not formed on the surface of the high-melting point metal, and the contact of the contact hole can be improved.
第１図（、）ないしくｅ）は本発明による半導体装置の
製造方法の一実施例を示す工程断面図、第２図は従来方
法の一例の説明に供する半導体装置のコンタクトホール
部分の断面図である。
１・・１１＠シリコン基板、２・命ＩＩＩ＋シリコン酸
化膜、３・・・・コンタクトホール、４Φ・拳・チタン
膜、５φ・・・チタンシリサイド膜、６・ψ・・チタン
ナイトライド膜、７＠・・・アルミニウム合金膜。FIGS. 1(a) to 1e) are process cross-sectional views showing an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a cross-sectional view of a contact hole portion of a semiconductor device for explaining an example of a conventional method. It is. 1...11@Silicon substrate, 2.Life III+silicon oxide film, 3...Contact hole, 4Φ・Fist/Titanium film, 5φ...Titanium silicide film, 6.ψ...Titanium nitride film, 7 @...Aluminum alloy film.
Claims (3)
ールを介して電極・配線膜を形成する工程において、前
記コンタクトホールの形成後、そのコンタクトホールを
含むシリコン基板上に高融点金属膜を形成する工程と、
前記高融点金属膜を同一の雰囲気中で熱処理することに
より、高融点金属窒化膜／高融点金属シリサイド膜、高
融点金属炭化物／高融点金属シリサイド膜、高融点金属
硼化物／高融点金属シリサイド膜のいずれかの２層膜を
形成する工程と、前記２層膜上にアルミニウム膜または
アルミニウム合金膜を形成する工程を具備することを特
徴とする半導体装置の製造方法。(1) In the step of forming an electrode/wiring film on the surface of an insulating film on a silicon substrate via the contact hole, after forming the contact hole, a high melting point metal film is formed on the silicon substrate including the contact hole. process and
By heat-treating the high melting point metal film in the same atmosphere, a high melting point metal nitride film/high melting point metal silicide film, a high melting point metal carbide/high melting point metal silicide film, a high melting point metal boride/high melting point metal silicide film A method for manufacturing a semiconductor device, comprising the steps of forming any two-layer film, and forming an aluminum film or an aluminum alloy film on the two-layer film.
とを特徴とする特許請求の範囲第１項記載の半導体装置
の製造方法。(2) The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment of the high melting point metal film is performed by a lamp heating method.
かとすることを特徴とする特許請求の範囲第１項ないし
第２項のいずれかに記載の半導体装置の製造方法。(3) The method for manufacturing a semiconductor device according to any one of claims 1 to 2, characterized in that the high melting point metal film is made of a metal of group IV, V, or VI.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61168734A JPH063800B2 (en) | 1986-07-16 | 1986-07-16 | Method for manufacturing semiconductor device |
| KR1019870006103A KR900004441B1 (en) | 1986-07-16 | 1987-06-16 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61168734A JPH063800B2 (en) | 1986-07-16 | 1986-07-16 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6324669A true JPS6324669A (en) | 1988-02-02 |
| JPH063800B2 JPH063800B2 (en) | 1994-01-12 |
Family
ID=15873426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61168734A Expired - Lifetime JPH063800B2 (en) | 1986-07-16 | 1986-07-16 | Method for manufacturing semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH063800B2 (en) |
| KR (1) | KR900004441B1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04226025A (en) * | 1990-04-16 | 1992-08-14 | Applied Materials Inc | Method forming titanium silicide con- ducting layer on silicon wafer |
| JPH05102075A (en) * | 1991-03-29 | 1993-04-23 | Applied Materials Inc | Method for forming tungsten contact having low resistance and low defect density for silicon semiconductor wafer |
| JPH07111252A (en) * | 1990-04-20 | 1995-04-25 | Applied Materials Inc | Method for formation of titanium nitride on semiconductor wafer by reaction of nitrogen-contained gas with titanium in integrated treatment system |
-
1986
- 1986-07-16 JP JP61168734A patent/JPH063800B2/en not_active Expired - Lifetime
-
1987
- 1987-06-16 KR KR1019870006103A patent/KR900004441B1/en not_active IP Right Cessation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04226025A (en) * | 1990-04-16 | 1992-08-14 | Applied Materials Inc | Method forming titanium silicide con- ducting layer on silicon wafer |
| JPH07111252A (en) * | 1990-04-20 | 1995-04-25 | Applied Materials Inc | Method for formation of titanium nitride on semiconductor wafer by reaction of nitrogen-contained gas with titanium in integrated treatment system |
| JPH05102075A (en) * | 1991-03-29 | 1993-04-23 | Applied Materials Inc | Method for forming tungsten contact having low resistance and low defect density for silicon semiconductor wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| KR880002263A (en) | 1988-04-30 |
| JPH063800B2 (en) | 1994-01-12 |
| KR900004441B1 (en) | 1990-06-25 |
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